gwj / at91sam9263 · Commits

Commit b25deda7ca528d8658304bed0479c9609add061e

Authored by blueswir1
1 parent 77b087cd

Temporary fix for i386 host 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3994 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 27 additions and 0 deletions
target-sparc/op_mem.h
  View file @b25deda
@@ -4,6 +4,16 @@ @@ -4,6 +4,16 @@
4 #define ADDR(x) (x) 4 #define ADDR(x) (x)
5 #endif 5 #endif
6 6
  7 +#ifdef __i386__
  8 +/*** Integer store ***/
  9 +void OPPROTO glue(op_std, MEMSUFFIX)(void)
  10 +{
  11 + uint64_t tmp = ((uint64_t)T1 << 32) | (uint64_t)(T2 & 0xffffffff);
  12 +
  13 + glue(stq, MEMSUFFIX)(ADDR(T0), tmp);
  14 +}
  15 +
  16 +#endif /* __i386__ */
7 /*** Floating-point store ***/ 17 /*** Floating-point store ***/
8 void OPPROTO glue(op_stf, MEMSUFFIX) (void) 18 void OPPROTO glue(op_stf, MEMSUFFIX) (void)
9 { 19 {
target-sparc/translate.c
  View file @b25deda
@@ -192,6 +192,9 @@ GEN32(gen_op_store_QT1_fpr, gen_op_store_QT1_fpr_fprf); @@ -192,6 +192,9 @@ GEN32(gen_op_store_QT1_fpr, gen_op_store_QT1_fpr_fprf);
192 #endif 192 #endif
193 193
194 #ifndef CONFIG_USER_ONLY 194 #ifndef CONFIG_USER_ONLY
  195 +#ifdef __i386__
  196 +OP_LD_TABLE(std);
  197 +#endif /* __i386__ */
195 OP_LD_TABLE(stf); 198 OP_LD_TABLE(stf);
196 OP_LD_TABLE(stdf); 199 OP_LD_TABLE(stdf);
197 OP_LD_TABLE(ldf); 200 OP_LD_TABLE(ldf);
@@ -231,6 +234,13 @@ static inline void gen_movl_reg_T1(int reg) @@ -231,6 +234,13 @@ static inline void gen_movl_reg_T1(int reg)
231 gen_movl_reg_TN(reg, cpu_T[1]); 234 gen_movl_reg_TN(reg, cpu_T[1]);
232 } 235 }
233 236
  237 +#ifdef __i386__
  238 +static inline void gen_movl_reg_T2(int reg)
  239 +{
  240 + gen_movl_reg_TN(reg, cpu_T[2]);
  241 +}
  242 +
  243 +#endif /* __i386__ */
234 static inline void gen_movl_TN_reg(int reg, TCGv tn) 244 static inline void gen_movl_TN_reg(int reg, TCGv tn)
235 { 245 {
236 if (reg == 0) 246 if (reg == 0)
@@ -3275,6 +3285,7 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3275,6 +3285,7 @@ static void disas_sparc_insn(DisasContext * dc)
3275 case 0x7: /* store double word */ 3285 case 0x7: /* store double word */
3276 if (rd & 1) 3286 if (rd & 1)
3277 goto illegal_insn; 3287 goto illegal_insn;
  3288 +#ifndef __i386__
3278 else { 3289 else {
3279 TCGv r_dword, r_low; 3290 TCGv r_dword, r_low;
3280 3291
@@ -3286,6 +3297,12 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3286,6 +3297,12 @@ static void disas_sparc_insn(DisasContext * dc)
3286 r_low); 3297 r_low);
3287 tcg_gen_qemu_st64(r_dword, cpu_T[0], dc->mem_idx); 3298 tcg_gen_qemu_st64(r_dword, cpu_T[0], dc->mem_idx);
3288 } 3299 }
  3300 +#else /* __i386__ */
  3301 + gen_op_check_align_T0_7();
  3302 + flush_T2(dc);
  3303 + gen_movl_reg_T2(rd + 1);
  3304 + gen_op_ldst(std);
  3305 +#endif /* __i386__ */
3289 break; 3306 break;
3290 #if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64) 3307 #if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
3291 case 0x14: /* store word alternate */ 3308 case 0x14: /* store word alternate */