gwj / at91sam9263 · Commits

Commit b158a785d2f58469b5c78c2484a7c1b22e9dbaaa

Authored by blueswir1
1 parent d81fd722

Implement UA2005 hypervisor traps 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 3 changed files with 23 additions and 18 deletions
target-sparc/helper.h
  View file @b158a78
... ... @@ -38,8 +38,6 @@ DEF_HELPER(void, helper_tick_set_count, (void *opaque, uint64_t count))
38 38 DEF_HELPER(uint64_t, helper_tick_get_count, (void *opaque))
39 39 DEF_HELPER(void, helper_tick_set_limit, (void *opaque, uint64_t limit))
40 40 #endif
41   -DEF_HELPER(void, helper_trap, (target_ulong nb_trap))
42   -DEF_HELPER(void, helper_trapcc, (target_ulong nb_trap, target_ulong do_trap))
43 41 DEF_HELPER(void, helper_check_align, (target_ulong addr, uint32_t align))
44 42 DEF_HELPER(void, helper_debug, (void))
45 43 DEF_HELPER(void, helper_save, (void))
... ...
target-sparc/op_helper.c
  View file @b158a78
... ... @@ -55,20 +55,6 @@ void raise_exception(int tt)
55 55 cpu_loop_exit();
56 56 }
57 57  
58   -void helper_trap(target_ulong nb_trap)
59   -{
60   - env->exception_index = TT_TRAP + (nb_trap & 0x7f);
61   - cpu_loop_exit();
62   -}
63   -
64   -void helper_trapcc(target_ulong nb_trap, target_ulong do_trap)
65   -{
66   - if (do_trap) {
67   - env->exception_index = TT_TRAP + (nb_trap & 0x7f);
68   - cpu_loop_exit();
69   - }
70   -}
71   -
72 58 static inline void set_cwp(int new_cwp)
73 59 {
74 60 cpu_set_cwp(env, new_cwp);
... ...
target-sparc/translate.c
  View file @b158a78
... ... @@ -93,6 +93,9 @@ typedef struct DisasContext {
93 93 #define QFPREG(r) (r & 0x1c)
94 94 #endif
95 95  
  96 +#define UA2005_HTRAP_MASK 0xff
  97 +#define V8_TRAP_MASK 0x7f
  98 +
96 99 static int sign_extend(int x, int len)
97 100 {
98 101 len = 32 - len;
... ... @@ -2019,9 +2022,16 @@ static void disas_sparc_insn(DisasContext * dc)
2019 2022 cond = GET_FIELD(insn, 3, 6);
2020 2023 if (cond == 0x8) {
2021 2024 save_state(dc, cpu_cond);
2022   - tcg_gen_helper_0_1(helper_trap, cpu_dst);
  2025 + if ((dc->def->features & CPU_FEATURE_HYPV) &&
  2026 + supervisor(dc))
  2027 + tcg_gen_andi_tl(cpu_dst, cpu_dst, UA2005_HTRAP_MASK);
  2028 + else
  2029 + tcg_gen_andi_tl(cpu_dst, cpu_dst, V8_TRAP_MASK);
  2030 + tcg_gen_addi_tl(cpu_dst, cpu_dst, TT_TRAP);
  2031 + tcg_gen_helper_0_1(raise_exception, cpu_dst);
2023 2032 } else if (cond != 0) {
2024 2033 TCGv r_cond = tcg_temp_new(TCG_TYPE_TL);
  2034 + int l1;
2025 2035 #ifdef TARGET_SPARC64
2026 2036 /* V9 icc/xcc */
2027 2037 int cc = GET_FIELD_SP(insn, 11, 12);
... ... @@ -2037,7 +2047,18 @@ static void disas_sparc_insn(DisasContext * dc)
2037 2047 save_state(dc, cpu_cond);
2038 2048 gen_cond(r_cond, 0, cond);
2039 2049 #endif
2040   - tcg_gen_helper_0_2(helper_trapcc, cpu_dst, r_cond);
  2050 + l1 = gen_new_label();
  2051 + tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
  2052 +
  2053 + if ((dc->def->features & CPU_FEATURE_HYPV) &&
  2054 + supervisor(dc))
  2055 + tcg_gen_andi_tl(cpu_dst, cpu_dst, UA2005_HTRAP_MASK);
  2056 + else
  2057 + tcg_gen_andi_tl(cpu_dst, cpu_dst, V8_TRAP_MASK);
  2058 + tcg_gen_addi_tl(cpu_dst, cpu_dst, TT_TRAP);
  2059 + tcg_gen_helper_0_1(raise_exception, cpu_dst);
  2060 +
  2061 + gen_set_label(l1);
2041 2062 tcg_temp_free(r_cond);
2042 2063 }
2043 2064 gen_op_next_insn();
... ...