Commit b09ea7d55cfab5a75912bb56ed1fcd757604a759

Authored by Gleb Natapov
Committed by Anthony Liguori
1 parent 6eaa6847

Handle init/sipi in a main cpu exec loop. (v2)

This should fix compilation problem in case of CONFIG_USER_ONLY.

Currently INIT/SIPI is handled in the context of CPU that sends IPI.
This patch changes this to handle them like all other events in a main
cpu exec loop. When KVM will gain thread per vcpu capability it will
be much more clear to handle those event by cpu thread itself and not
modify one cpu's state from the context of the other.

Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
cpu-all.h
@@ -768,6 +768,8 @@ extern int use_icount; @@ -768,6 +768,8 @@ extern int use_icount;
768 #define CPU_INTERRUPT_DEBUG 0x80 /* Debug event occured. */ 768 #define CPU_INTERRUPT_DEBUG 0x80 /* Debug event occured. */
769 #define CPU_INTERRUPT_VIRQ 0x100 /* virtual interrupt pending. */ 769 #define CPU_INTERRUPT_VIRQ 0x100 /* virtual interrupt pending. */
770 #define CPU_INTERRUPT_NMI 0x200 /* NMI pending. */ 770 #define CPU_INTERRUPT_NMI 0x200 /* NMI pending. */
  771 +#define CPU_INTERRUPT_INIT 0x400 /* INIT pending. */
  772 +#define CPU_INTERRUPT_SIPI 0x800 /* SIPI pending. */
771 773
772 void cpu_interrupt(CPUState *s, int mask); 774 void cpu_interrupt(CPUState *s, int mask);
773 void cpu_reset_interrupt(CPUState *env, int mask); 775 void cpu_reset_interrupt(CPUState *env, int mask);
cpu-exec.c
@@ -380,7 +380,14 @@ int cpu_exec(CPUState *env1) @@ -380,7 +380,14 @@ int cpu_exec(CPUState *env1)
380 } 380 }
381 #endif 381 #endif
382 #if defined(TARGET_I386) 382 #if defined(TARGET_I386)
383 - if (env->hflags2 & HF2_GIF_MASK) { 383 + if (interrupt_request & CPU_INTERRUPT_INIT) {
  384 + svm_check_intercept(SVM_EXIT_INIT);
  385 + do_cpu_init(env);
  386 + env->exception_index = EXCP_HALTED;
  387 + cpu_loop_exit();
  388 + } else if (interrupt_request & CPU_INTERRUPT_SIPI) {
  389 + do_cpu_sipi(env);
  390 + } else if (env->hflags2 & HF2_GIF_MASK) {
384 if ((interrupt_request & CPU_INTERRUPT_SMI) && 391 if ((interrupt_request & CPU_INTERRUPT_SMI) &&
385 !(env->hflags & HF_SMM_MASK)) { 392 !(env->hflags & HF_SMM_MASK)) {
386 svm_check_intercept(SVM_EXIT_SMI); 393 svm_check_intercept(SVM_EXIT_SMI);
hw/apic.c
@@ -85,6 +85,8 @@ typedef struct APICState { @@ -85,6 +85,8 @@ typedef struct APICState {
85 int64_t initial_count_load_time, next_time; 85 int64_t initial_count_load_time, next_time;
86 uint32_t idx; 86 uint32_t idx;
87 QEMUTimer *timer; 87 QEMUTimer *timer;
  88 + int sipi_vector;
  89 + int wait_for_sipi;
88 } APICState; 90 } APICState;
89 91
90 static int apic_io_memory; 92 static int apic_io_memory;
@@ -93,7 +95,6 @@ static int last_apic_idx = 0; @@ -93,7 +95,6 @@ static int last_apic_idx = 0;
93 static int apic_irq_delivered; 95 static int apic_irq_delivered;
94 96
95 97
96 -static void apic_init_ipi(APICState *s);  
97 static void apic_set_irq(APICState *s, int vector_num, int trigger_mode); 98 static void apic_set_irq(APICState *s, int vector_num, int trigger_mode);
98 static void apic_update_irq(APICState *s); 99 static void apic_update_irq(APICState *s);
99 static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, 100 static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
@@ -249,7 +250,7 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask, @@ -249,7 +250,7 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask,
249 case APIC_DM_INIT: 250 case APIC_DM_INIT:
250 /* normal INIT IPI sent to processors */ 251 /* normal INIT IPI sent to processors */
251 foreach_apic(apic_iter, deliver_bitmask, 252 foreach_apic(apic_iter, deliver_bitmask,
252 - apic_init_ipi(apic_iter) ); 253 + cpu_interrupt(apic_iter->cpu_env, CPU_INTERRUPT_INIT) );
253 return; 254 return;
254 255
255 case APIC_DM_EXTINT: 256 case APIC_DM_EXTINT:
@@ -454,10 +455,14 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, @@ -454,10 +455,14 @@ static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
454 } 455 }
455 456
456 457
457 -static void apic_init_ipi(APICState *s) 458 +void apic_init_reset(CPUState *env)
458 { 459 {
  460 + APICState *s = env->apic_state;
459 int i; 461 int i;
460 462
  463 + if (!s)
  464 + return;
  465 +
461 s->tpr = 0; 466 s->tpr = 0;
462 s->spurious_vec = 0xff; 467 s->spurious_vec = 0xff;
463 s->log_dest = 0; 468 s->log_dest = 0;
@@ -474,22 +479,31 @@ static void apic_init_ipi(APICState *s) @@ -474,22 +479,31 @@ static void apic_init_ipi(APICState *s)
474 s->initial_count = 0; 479 s->initial_count = 0;
475 s->initial_count_load_time = 0; 480 s->initial_count_load_time = 0;
476 s->next_time = 0; 481 s->next_time = 0;
  482 + s->wait_for_sipi = 1;
477 483
478 - cpu_reset(s->cpu_env);  
479 -  
480 - s->cpu_env->halted = !(s->apicbase & MSR_IA32_APICBASE_BSP); 484 + env->halted = !(s->apicbase & MSR_IA32_APICBASE_BSP);
481 } 485 }
482 486
483 -/* send a SIPI message to the CPU to start it */  
484 static void apic_startup(APICState *s, int vector_num) 487 static void apic_startup(APICState *s, int vector_num)
485 { 488 {
486 - CPUState *env = s->cpu_env;  
487 - if (!env->halted) 489 + s->sipi_vector = vector_num;
  490 + cpu_interrupt(s->cpu_env, CPU_INTERRUPT_SIPI);
  491 +}
  492 +
  493 +void apic_sipi(CPUState *env)
  494 +{
  495 + APICState *s = env->apic_state;
  496 +
  497 + cpu_reset_interrupt(env, CPU_INTERRUPT_SIPI);
  498 +
  499 + if (!s->wait_for_sipi)
488 return; 500 return;
  501 +
489 env->eip = 0; 502 env->eip = 0;
490 - cpu_x86_load_seg_cache(env, R_CS, vector_num << 8, vector_num << 12, 503 + cpu_x86_load_seg_cache(env, R_CS, s->sipi_vector << 8, s->sipi_vector << 12,
491 0xffff, 0); 504 0xffff, 0);
492 env->halted = 0; 505 env->halted = 0;
  506 + s->wait_for_sipi = 0;
493 } 507 }
494 508
495 static void apic_deliver(APICState *s, uint8_t dest, uint8_t dest_mode, 509 static void apic_deliver(APICState *s, uint8_t dest, uint8_t dest_mode,
@@ -894,7 +908,8 @@ static void apic_reset(void *opaque) @@ -894,7 +908,8 @@ static void apic_reset(void *opaque)
894 s->apicbase = 0xfee00000 | 908 s->apicbase = 0xfee00000 |
895 (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; 909 (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
896 910
897 - apic_init_ipi(s); 911 + cpu_reset(s->cpu_env);
  912 + apic_init_reset(s->cpu_env);
898 913
899 if (bsp) { 914 if (bsp) {
900 /* 915 /*
target-i386/cpu.h
@@ -888,4 +888,8 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, @@ -888,4 +888,8 @@ static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
888 (env->eflags & (IOPL_MASK | TF_MASK | RF_MASK | VM_MASK)); 888 (env->eflags & (IOPL_MASK | TF_MASK | RF_MASK | VM_MASK));
889 } 889 }
890 890
  891 +void apic_init_reset(CPUState *env);
  892 +void apic_sipi(CPUState *env);
  893 +void do_cpu_init(CPUState *env);
  894 +void do_cpu_sipi(CPUState *env);
891 #endif /* CPU_I386_H */ 895 #endif /* CPU_I386_H */
target-i386/exec.h
@@ -345,6 +345,8 @@ static inline int cpu_has_work(CPUState *env) @@ -345,6 +345,8 @@ static inline int cpu_has_work(CPUState *env)
345 work = (env->interrupt_request & CPU_INTERRUPT_HARD) && 345 work = (env->interrupt_request & CPU_INTERRUPT_HARD) &&
346 (env->eflags & IF_MASK); 346 (env->eflags & IF_MASK);
347 work |= env->interrupt_request & CPU_INTERRUPT_NMI; 347 work |= env->interrupt_request & CPU_INTERRUPT_NMI;
  348 + work |= env->interrupt_request & CPU_INTERRUPT_INIT;
  349 + work |= env->interrupt_request & CPU_INTERRUPT_SIPI;
348 350
349 return work; 351 return work;
350 } 352 }
target-i386/helper.c
@@ -1738,3 +1738,25 @@ CPUX86State *cpu_x86_init(const char *cpu_model) @@ -1738,3 +1738,25 @@ CPUX86State *cpu_x86_init(const char *cpu_model)
1738 1738
1739 return env; 1739 return env;
1740 } 1740 }
  1741 +
  1742 +#if !defined(CONFIG_USER_ONLY)
  1743 +void do_cpu_init(CPUState *env)
  1744 +{
  1745 + int sipi = env->interrupt_request & CPU_INTERRUPT_SIPI;
  1746 + cpu_reset(env);
  1747 + env->interrupt_request = sipi;
  1748 + apic_init_reset(env);
  1749 +}
  1750 +
  1751 +void do_cpu_sipi(CPUState *env)
  1752 +{
  1753 + apic_sipi(env);
  1754 +}
  1755 +#else
  1756 +void do_cpu_init(CPUState *env)
  1757 +{
  1758 +}
  1759 +void do_cpu_sipi(CPUState *env)
  1760 +{
  1761 +}
  1762 +#endif