Commit afdfa781e66b689c6c8ee37b7da66bda59df73d2

Authored by ths
1 parent cd75cf10

MIPS RTC emulation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2231 c046a42c-6fe2-441c-8c8c-71466251a162
Makefile.target
@@ -358,7 +358,7 @@ DEFINES += -DHAS_AUDIO @@ -358,7 +358,7 @@ DEFINES += -DHAS_AUDIO
358 endif 358 endif
359 ifeq ($(TARGET_ARCH), mips) 359 ifeq ($(TARGET_ARCH), mips)
360 VL_OBJS+= mips_r4k.o mips_timer.o dma.o vga.o serial.o i8254.o i8259.o ide.o 360 VL_OBJS+= mips_r4k.o mips_timer.o dma.o vga.o serial.o i8254.o i8259.o ide.o
361 -#VL_OBJS+= #pckbd.o fdc.o m48t59.o 361 +VL_OBJS+= mc146818rtc.o #pckbd.o fdc.o m48t59.o
362 endif 362 endif
363 ifeq ($(TARGET_BASE_ARCH), sparc) 363 ifeq ($(TARGET_BASE_ARCH), sparc)
364 ifeq ($(TARGET_ARCH), sparc64) 364 ifeq ($(TARGET_ARCH), sparc64)
hw/mips_r4k.c
@@ -135,6 +135,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, @@ -135,6 +135,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
135 unsigned long bios_offset; 135 unsigned long bios_offset;
136 int ret; 136 int ret;
137 CPUState *env; 137 CPUState *env;
  138 + static RTCState *rtc_state;
138 int i; 139 int i;
139 140
140 env = cpu_init(); 141 env = cpu_init();
@@ -179,12 +180,15 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, @@ -179,12 +180,15 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
179 cpu_mips_clock_init(env); 180 cpu_mips_clock_init(env);
180 cpu_mips_irqctrl_init(); 181 cpu_mips_irqctrl_init();
181 182
  183 + rtc_state = rtc_init(0x70, 8);
  184 +
182 /* Register 64 KB of ISA IO space at 0x14000000 */ 185 /* Register 64 KB of ISA IO space at 0x14000000 */
183 isa_mmio_init(0x14000000, 0x00010000); 186 isa_mmio_init(0x14000000, 0x00010000);
184 isa_mem_base = 0x10000000; 187 isa_mem_base = 0x10000000;
185 188
186 isa_pic = pic_init(pic_irq_request, env); 189 isa_pic = pic_init(pic_irq_request, env);
187 pit = pit_init(0x40, 0); 190 pit = pit_init(0x40, 0);
  191 +
188 serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]); 192 serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
189 isa_vga_init(ds, phys_ram_base + ram_size, ram_size, 193 isa_vga_init(ds, phys_ram_base + ram_size, ram_size,
190 vga_ram_size); 194 vga_ram_size);