Commit af5ad10728f8265846f64274edd69c01e6da77e5
1 parent
ac9eb073
infer access type
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@530 c046a42c-6fe2-441c-8c8c-71466251a162
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36 additions
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2 deletions
translate-all.c
| ... | ... | @@ -25,7 +25,7 @@ |
| 25 | 25 | |
| 26 | 26 | #include "config.h" |
| 27 | 27 | |
| 28 | -#define IN_OP_I386 | |
| 28 | +#define NO_CPU_IO_DEFS | |
| 29 | 29 | #include "cpu.h" |
| 30 | 30 | #include "exec-all.h" |
| 31 | 31 | #include "disas.h" |
| ... | ... | @@ -192,7 +192,41 @@ int cpu_restore_state(TranslationBlock *tb, |
| 192 | 192 | #elif defined(TARGET_SPARC) |
| 193 | 193 | env->pc = gen_opc_pc[j]; |
| 194 | 194 | #elif defined(TARGET_PPC) |
| 195 | - env->nip = gen_opc_pc[j]; | |
| 195 | + { | |
| 196 | + int type; | |
| 197 | + /* for PPC, we need to look at the micro operation to get the | |
| 198 | + access type */ | |
| 199 | + env->nip = gen_opc_pc[j]; | |
| 200 | + switch(c) { | |
| 201 | +#if defined(CONFIG_USER_ONLY) | |
| 202 | +#define CASE3(op)\ | |
| 203 | + case INDEX_op_ ## op ## _raw | |
| 204 | +#else | |
| 205 | +#define CASE3(op)\ | |
| 206 | + case INDEX_op_ ## op ## _raw:\ | |
| 207 | + case INDEX_op_ ## op ## _user:\ | |
| 208 | + case INDEX_op_ ## op ## _kernel | |
| 209 | +#endif | |
| 210 | + | |
| 211 | + CASE3(stfd): | |
| 212 | + CASE3(stfs): | |
| 213 | + CASE3(lfd): | |
| 214 | + CASE3(lfs): | |
| 215 | + type = ACCESS_FLOAT; | |
| 216 | + break; | |
| 217 | + CASE3(stwcx): | |
| 218 | + type = ACCESS_RES; | |
| 219 | + break; | |
| 220 | + CASE3(eciwx): | |
| 221 | + CASE3(ecowx): | |
| 222 | + type = ACCESS_EXT; | |
| 223 | + break; | |
| 224 | + default: | |
| 225 | + type = ACCESS_INT; | |
| 226 | + break; | |
| 227 | + } | |
| 228 | + env->access_type = type; | |
| 229 | + } | |
| 196 | 230 | #endif |
| 197 | 231 | return 0; |
| 198 | 232 | } | ... | ... |