gwj / at91sam9263 · Commits

Commit af58f9ca434064ef6193bb7aab0ea6faea5167c0

Authored by aurel32
1 parent d94536f4

target-mips: optimize gen_movci() 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6956 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 17 additions and 15 deletions
target-mips/translate.c
  View file @af58f9c
... ... @@ -5693,29 +5693,31 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs)
5693 5693  
5694 5694 static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
5695 5695 {
5696   - int l1 = gen_new_label();
5697   - uint32_t ccbit;
  5696 + int l1;
5698 5697 TCGCond cond;
5699   - TCGv t0 = tcg_temp_local_new();
5700   - TCGv_i32 r_tmp = tcg_temp_new_i32();
  5698 + TCGv_i32 t0;
  5699 +
  5700 + if (rd == 0) {
  5701 + /* Treat as NOP. */
  5702 + return;
  5703 + }
5701 5704  
5702   - if (cc)
5703   - ccbit = 1 << (24 + cc);
5704   - else
5705   - ccbit = 1 << 23;
5706 5705 if (tf)
5707 5706 cond = TCG_COND_EQ;
5708 5707 else
5709 5708 cond = TCG_COND_NE;
5710 5709  
5711   - gen_load_gpr(t0, rd);
5712   - tcg_gen_andi_i32(r_tmp, fpu_fcr31, ccbit);
5713   - tcg_gen_brcondi_i32(cond, r_tmp, 0, l1);
5714   - tcg_temp_free_i32(r_tmp);
5715   - gen_load_gpr(t0, rs);
  5710 + l1 = gen_new_label();
  5711 + t0 = tcg_temp_new_i32();
  5712 + tcg_gen_andi_i32(t0, fpu_fcr31, get_fp_bit(cc));
  5713 + tcg_gen_brcondi_i32(cond, t0, 0, l1);
  5714 + if (rs == 0) {
  5715 + tcg_gen_movi_tl(cpu_gpr[rd], 0);
  5716 + } else {
  5717 + tcg_gen_mov_tl(cpu_gpr[rd], cpu_gpr[rs]);
  5718 + }
5716 5719 gen_set_label(l1);
5717   - gen_store_gpr(t0, rd);
5718   - tcg_temp_free(t0);
  5720 + tcg_temp_free_i32(t0);
5719 5721 }
5720 5722  
5721 5723 static inline void gen_movcf_s (int fs, int fd, int cc, int tf)
... ...