Commit af4b6c54c141c1e2d3637fc15b912e82b88828cf
1 parent
ed1dda53
target-ppc: avoid nop to override next instruction
While searching PC, always store the pc of a new instruction. Instructions that didn't generate tcg code (such as nop) prevented the next one to be referenced. Based on patch for target-alpha, r6930. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6931 c046a42c-6fe2-441c-8c8c-71466251a162
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3 deletions
target-ppc/translate.c
... | ... | @@ -8213,10 +8213,10 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, |
8213 | 8213 | lj++; |
8214 | 8214 | while (lj < j) |
8215 | 8215 | gen_opc_instr_start[lj++] = 0; |
8216 | - gen_opc_pc[lj] = ctx.nip; | |
8217 | - gen_opc_instr_start[lj] = 1; | |
8218 | - gen_opc_icount[lj] = num_insns; | |
8219 | 8216 | } |
8217 | + gen_opc_pc[lj] = ctx.nip; | |
8218 | + gen_opc_instr_start[lj] = 1; | |
8219 | + gen_opc_icount[lj] = num_insns; | |
8220 | 8220 | } |
8221 | 8221 | LOG_DISAS("----------------\n"); |
8222 | 8222 | LOG_DISAS("nip=" ADDRX " super=%d ir=%d\n", | ... | ... |