Commit aef3a282a44e1a3009a6b77dd0c28b4b14ded672

Authored by balrog
1 parent 15b18ec2

Fix 64-bit targets compilation on ARM host.

Only fix compilation, probably doesn't run.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5947 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 6 additions and 6 deletions
tcg/arm/tcg-target.c
@@ -858,10 +858,10 @@ static inline void tcg_out_qemu_ld(TCGContext *s, int cond, @@ -858,10 +858,10 @@ static inline void tcg_out_qemu_ld(TCGContext *s, int cond,
858 else 858 else
859 data_reg2 = 0; /* surpress warning */ 859 data_reg2 = 0; /* surpress warning */
860 addr_reg = *args++; 860 addr_reg = *args++;
861 -#if TARGET_LONG_BITS == 64  
862 - addr_reg2 = *args++;  
863 -#endif  
864 #ifdef CONFIG_SOFTMMU 861 #ifdef CONFIG_SOFTMMU
  862 +# if TARGET_LONG_BITS == 64
  863 + addr_reg2 = *args++;
  864 +# endif
865 mem_index = *args; 865 mem_index = *args;
866 s_bits = opc & 3; 866 s_bits = opc & 3;
867 867
@@ -1036,10 +1036,10 @@ static inline void tcg_out_qemu_st(TCGContext *s, int cond, @@ -1036,10 +1036,10 @@ static inline void tcg_out_qemu_st(TCGContext *s, int cond,
1036 else 1036 else
1037 data_reg2 = 0; /* surpress warning */ 1037 data_reg2 = 0; /* surpress warning */
1038 addr_reg = *args++; 1038 addr_reg = *args++;
1039 -#if TARGET_LONG_BITS == 64  
1040 - addr_reg2 = *args++;  
1041 -#endif  
1042 #ifdef CONFIG_SOFTMMU 1039 #ifdef CONFIG_SOFTMMU
  1040 +# if TARGET_LONG_BITS == 64
  1041 + addr_reg2 = *args++;
  1042 +# endif
1043 mem_index = *args; 1043 mem_index = *args;
1044 s_bits = opc & 3; 1044 s_bits = opc & 3;
1045 1045