gwj / at91sam9263 · Commits

Commit adf3c8b6e9287810d20edea22e2aaa8bea0b79a9

Authored by aurel32
1 parent 6ad02592

alpha: fix a missing literal sign issue 

Reported by Tristan Gingold

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5248 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 4 additions and 4 deletions
target-alpha/translate.c
  View file @adf3c8b
@@ -390,7 +390,7 @@ static always_inline void gen_arith3 (DisasContext *ctx, @@ -390,7 +390,7 @@ static always_inline void gen_arith3 (DisasContext *ctx,
390 static always_inline void gen_cmov (DisasContext *ctx, 390 static always_inline void gen_cmov (DisasContext *ctx,
391 TCGCond inv_cond, 391 TCGCond inv_cond,
392 int ra, int rb, int rc, 392 int ra, int rb, int rc,
393 - int islit, int8_t lit, int mask) 393 + int islit, uint8_t lit, int mask)
394 { 394 {
395 int l1; 395 int l1;
396 396
@@ -477,7 +477,7 @@ static always_inline void gen_itf (DisasContext *ctx, @@ -477,7 +477,7 @@ static always_inline void gen_itf (DisasContext *ctx,
477 /* EXTWH, EXTWH, EXTLH, EXTQH */ 477 /* EXTWH, EXTWH, EXTLH, EXTQH */
478 static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1), 478 static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
479 int ra, int rb, int rc, 479 int ra, int rb, int rc,
480 - int islit, int8_t lit) 480 + int islit, uint8_t lit)
481 { 481 {
482 if (unlikely(rc == 31)) 482 if (unlikely(rc == 31))
483 return; 483 return;
@@ -508,7 +508,7 @@ static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1), @@ -508,7 +508,7 @@ static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
508 /* EXTBL, EXTWL, EXTWL, EXTLL, EXTQL */ 508 /* EXTBL, EXTWL, EXTWL, EXTLL, EXTQL */
509 static always_inline void gen_ext_l(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1), 509 static always_inline void gen_ext_l(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),
510 int ra, int rb, int rc, 510 int ra, int rb, int rc,
511 - int islit, int8_t lit) 511 + int islit, uint8_t lit)
512 { 512 {
513 if (unlikely(rc == 31)) 513 if (unlikely(rc == 31))
514 return; 514 return;
@@ -567,7 +567,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) @@ -567,7 +567,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn)
567 int32_t disp21, disp16, disp12; 567 int32_t disp21, disp16, disp12;
568 uint16_t fn11, fn16; 568 uint16_t fn11, fn16;
569 uint8_t opc, ra, rb, rc, sbz, fpfn, fn7, fn2, islit; 569 uint8_t opc, ra, rb, rc, sbz, fpfn, fn7, fn2, islit;
570 - int8_t lit; 570 + uint8_t lit;
571 int ret; 571 int ret;
572 572
573 /* Decode all instruction fields */ 573 /* Decode all instruction fields */