Commit add69063e86c1dec66f285687c8bd923269c0c75

Authored by aurel32
1 parent c24135ff

target-mips: fix mft* helpers/call

This patch attempts to fix mft* helpers and the associated TCG calls.
mft* helpers do not take a register in argument, however:
- some helpers are called with an argument while they do not take one.
- some helpers are declared with an argument they don't use.

Acked-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5674 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips/helper.h
@@ -137,11 +137,11 @@ DEF_HELPER(void, do_mtc0_taghi, (target_ulong t0)) @@ -137,11 +137,11 @@ DEF_HELPER(void, do_mtc0_taghi, (target_ulong t0))
137 DEF_HELPER(void, do_mtc0_datahi, (target_ulong t0)) 137 DEF_HELPER(void, do_mtc0_datahi, (target_ulong t0))
138 138
139 /* MIPS MT functions */ 139 /* MIPS MT functions */
140 -DEF_HELPER(target_ulong, do_mftgpr, (target_ulong t0, uint32_t sel))  
141 -DEF_HELPER(target_ulong, do_mftlo, (target_ulong t0, uint32_t sel))  
142 -DEF_HELPER(target_ulong, do_mfthi, (target_ulong t0, uint32_t sel))  
143 -DEF_HELPER(target_ulong, do_mftacx, (target_ulong t0, uint32_t sel))  
144 -DEF_HELPER(target_ulong, do_mftdsp, (target_ulong t0)) 140 +DEF_HELPER(target_ulong, do_mftgpr, (uint32_t sel))
  141 +DEF_HELPER(target_ulong, do_mftlo, (uint32_t sel))
  142 +DEF_HELPER(target_ulong, do_mfthi, (uint32_t sel))
  143 +DEF_HELPER(target_ulong, do_mftacx, (uint32_t sel))
  144 +DEF_HELPER(target_ulong, do_mftdsp, (void))
145 DEF_HELPER(void, do_mttgpr, (target_ulong t0, uint32_t sel)) 145 DEF_HELPER(void, do_mttgpr, (target_ulong t0, uint32_t sel))
146 DEF_HELPER(void, do_mttlo, (target_ulong t0, uint32_t sel)) 146 DEF_HELPER(void, do_mttlo, (target_ulong t0, uint32_t sel))
147 DEF_HELPER(void, do_mtthi, (target_ulong t0, uint32_t sel)) 147 DEF_HELPER(void, do_mtthi, (target_ulong t0, uint32_t sel))
target-mips/op_helper.c
@@ -1358,7 +1358,7 @@ void do_mtc0_status_irqraise_debug(void) @@ -1358,7 +1358,7 @@ void do_mtc0_status_irqraise_debug(void)
1358 #endif /* !CONFIG_USER_ONLY */ 1358 #endif /* !CONFIG_USER_ONLY */
1359 1359
1360 /* MIPS MT functions */ 1360 /* MIPS MT functions */
1361 -target_ulong do_mftgpr(target_ulong t0, uint32_t sel) 1361 +target_ulong do_mftgpr(uint32_t sel)
1362 { 1362 {
1363 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 1363 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
1364 1364
@@ -1368,7 +1368,7 @@ target_ulong do_mftgpr(target_ulong t0, uint32_t sel) @@ -1368,7 +1368,7 @@ target_ulong do_mftgpr(target_ulong t0, uint32_t sel)
1368 return env->tcs[other_tc].gpr[sel]; 1368 return env->tcs[other_tc].gpr[sel];
1369 } 1369 }
1370 1370
1371 -target_ulong do_mftlo(target_ulong t0, uint32_t sel) 1371 +target_ulong do_mftlo(uint32_t sel)
1372 { 1372 {
1373 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 1373 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
1374 1374
@@ -1378,7 +1378,7 @@ target_ulong do_mftlo(target_ulong t0, uint32_t sel) @@ -1378,7 +1378,7 @@ target_ulong do_mftlo(target_ulong t0, uint32_t sel)
1378 return env->tcs[other_tc].LO[sel]; 1378 return env->tcs[other_tc].LO[sel];
1379 } 1379 }
1380 1380
1381 -target_ulong do_mfthi(target_ulong t0, uint32_t sel) 1381 +target_ulong do_mfthi(uint32_t sel)
1382 { 1382 {
1383 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 1383 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
1384 1384
@@ -1388,7 +1388,7 @@ target_ulong do_mfthi(target_ulong t0, uint32_t sel) @@ -1388,7 +1388,7 @@ target_ulong do_mfthi(target_ulong t0, uint32_t sel)
1388 return env->tcs[other_tc].HI[sel]; 1388 return env->tcs[other_tc].HI[sel];
1389 } 1389 }
1390 1390
1391 -target_ulong do_mftacx(target_ulong t0, uint32_t sel) 1391 +target_ulong do_mftacx(uint32_t sel)
1392 { 1392 {
1393 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 1393 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
1394 1394
@@ -1398,7 +1398,7 @@ target_ulong do_mftacx(target_ulong t0, uint32_t sel) @@ -1398,7 +1398,7 @@ target_ulong do_mftacx(target_ulong t0, uint32_t sel)
1398 return env->tcs[other_tc].ACX[sel]; 1398 return env->tcs[other_tc].ACX[sel];
1399 } 1399 }
1400 1400
1401 -target_ulong do_mftdsp(target_ulong t0) 1401 +target_ulong do_mftdsp(void)
1402 { 1402 {
1403 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 1403 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
1404 1404
target-mips/translate.c
@@ -5179,25 +5179,25 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd, @@ -5179,25 +5179,25 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
5179 case 2: 5179 case 2:
5180 switch (sel) { 5180 switch (sel) {
5181 case 1: 5181 case 1:
5182 - tcg_gen_helper_1_1(do_mftc0_tcstatus, t0, t0); 5182 + tcg_gen_helper_1_0(do_mftc0_tcstatus, t0);
5183 break; 5183 break;
5184 case 2: 5184 case 2:
5185 - tcg_gen_helper_1_1(do_mftc0_tcbind, t0, t0); 5185 + tcg_gen_helper_1_0(do_mftc0_tcbind, t0);
5186 break; 5186 break;
5187 case 3: 5187 case 3:
5188 - tcg_gen_helper_1_1(do_mftc0_tcrestart, t0, t0); 5188 + tcg_gen_helper_1_0(do_mftc0_tcrestart, t0);
5189 break; 5189 break;
5190 case 4: 5190 case 4:
5191 - tcg_gen_helper_1_1(do_mftc0_tchalt, t0, t0); 5191 + tcg_gen_helper_1_0(do_mftc0_tchalt, t0);
5192 break; 5192 break;
5193 case 5: 5193 case 5:
5194 - tcg_gen_helper_1_1(do_mftc0_tccontext, t0, t0); 5194 + tcg_gen_helper_1_0(do_mftc0_tccontext, t0);
5195 break; 5195 break;
5196 case 6: 5196 case 6:
5197 - tcg_gen_helper_1_1(do_mftc0_tcschedule, t0, t0); 5197 + tcg_gen_helper_1_0(do_mftc0_tcschedule, t0);
5198 break; 5198 break;
5199 case 7: 5199 case 7:
5200 - tcg_gen_helper_1_1(do_mftc0_tcschefback, t0, t0); 5200 + tcg_gen_helper_1_0(do_mftc0_tcschefback, t0);
5201 break; 5201 break;
5202 default: 5202 default:
5203 gen_mfc0(env, ctx, t0, rt, sel); 5203 gen_mfc0(env, ctx, t0, rt, sel);
@@ -5207,7 +5207,7 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd, @@ -5207,7 +5207,7 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
5207 case 10: 5207 case 10:
5208 switch (sel) { 5208 switch (sel) {
5209 case 0: 5209 case 0:
5210 - tcg_gen_helper_1_1(do_mftc0_entryhi, t0, t0); 5210 + tcg_gen_helper_1_0(do_mftc0_entryhi, t0);
5211 break; 5211 break;
5212 default: 5212 default:
5213 gen_mfc0(env, ctx, t0, rt, sel); 5213 gen_mfc0(env, ctx, t0, rt, sel);
@@ -5216,7 +5216,7 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd, @@ -5216,7 +5216,7 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
5216 case 12: 5216 case 12:
5217 switch (sel) { 5217 switch (sel) {
5218 case 0: 5218 case 0:
5219 - tcg_gen_helper_1_1(do_mftc0_status, t0, t0); 5219 + tcg_gen_helper_1_0(do_mftc0_status, t0);
5220 break; 5220 break;
5221 default: 5221 default:
5222 gen_mfc0(env, ctx, t0, rt, sel); 5222 gen_mfc0(env, ctx, t0, rt, sel);
@@ -5225,7 +5225,7 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd, @@ -5225,7 +5225,7 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
5225 case 23: 5225 case 23:
5226 switch (sel) { 5226 switch (sel) {
5227 case 0: 5227 case 0:
5228 - tcg_gen_helper_1_1(do_mftc0_debug, t0, t0); 5228 + tcg_gen_helper_1_0(do_mftc0_debug, t0);
5229 break; 5229 break;
5230 default: 5230 default:
5231 gen_mfc0(env, ctx, t0, rt, sel); 5231 gen_mfc0(env, ctx, t0, rt, sel);
@@ -5238,49 +5238,49 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd, @@ -5238,49 +5238,49 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd,
5238 } else switch (sel) { 5238 } else switch (sel) {
5239 /* GPR registers. */ 5239 /* GPR registers. */
5240 case 0: 5240 case 0:
5241 - tcg_gen_helper_1_1i(do_mftgpr, t0, t0, rt); 5241 + tcg_gen_helper_1_i(do_mftgpr, t0, rt);
5242 break; 5242 break;
5243 /* Auxiliary CPU registers */ 5243 /* Auxiliary CPU registers */
5244 case 1: 5244 case 1:
5245 switch (rt) { 5245 switch (rt) {
5246 case 0: 5246 case 0:
5247 - tcg_gen_helper_1_1i(do_mftlo, t0, t0, 0); 5247 + tcg_gen_helper_1_i(do_mftlo, t0, 0);
5248 break; 5248 break;
5249 case 1: 5249 case 1:
5250 - tcg_gen_helper_1_1i(do_mfthi, t0, t0, 0); 5250 + tcg_gen_helper_1_i(do_mfthi, t0, 0);
5251 break; 5251 break;
5252 case 2: 5252 case 2:
5253 - tcg_gen_helper_1_1i(do_mftacx, t0, t0, 0); 5253 + tcg_gen_helper_1_i(do_mftacx, t0, 0);
5254 break; 5254 break;
5255 case 4: 5255 case 4:
5256 - tcg_gen_helper_1_1i(do_mftlo, t0, t0, 1); 5256 + tcg_gen_helper_1_i(do_mftlo, t0, 1);
5257 break; 5257 break;
5258 case 5: 5258 case 5:
5259 - tcg_gen_helper_1_1i(do_mfthi, t0, t0, 1); 5259 + tcg_gen_helper_1_i(do_mfthi, t0, 1);
5260 break; 5260 break;
5261 case 6: 5261 case 6:
5262 - tcg_gen_helper_1_1i(do_mftacx, t0, t0, 1); 5262 + tcg_gen_helper_1_i(do_mftacx, t0, 1);
5263 break; 5263 break;
5264 case 8: 5264 case 8:
5265 - tcg_gen_helper_1_1i(do_mftlo, t0, t0, 2); 5265 + tcg_gen_helper_1_i(do_mftlo, t0, 2);
5266 break; 5266 break;
5267 case 9: 5267 case 9:
5268 - tcg_gen_helper_1_1i(do_mfthi, t0, t0, 2); 5268 + tcg_gen_helper_1_i(do_mfthi, t0, 2);
5269 break; 5269 break;
5270 case 10: 5270 case 10:
5271 - tcg_gen_helper_1_1i(do_mftacx, t0, t0, 2); 5271 + tcg_gen_helper_1_i(do_mftacx, t0, 2);
5272 break; 5272 break;
5273 case 12: 5273 case 12:
5274 - tcg_gen_helper_1_1i(do_mftlo, t0, t0, 3); 5274 + tcg_gen_helper_1_i(do_mftlo, t0, 3);
5275 break; 5275 break;
5276 case 13: 5276 case 13:
5277 - tcg_gen_helper_1_1i(do_mfthi, t0, t0, 3); 5277 + tcg_gen_helper_1_i(do_mfthi, t0, 3);
5278 break; 5278 break;
5279 case 14: 5279 case 14:
5280 - tcg_gen_helper_1_1i(do_mftacx, t0, t0, 3); 5280 + tcg_gen_helper_1_i(do_mftacx, t0, 3);
5281 break; 5281 break;
5282 case 16: 5282 case 16:
5283 - tcg_gen_helper_1_1(do_mftdsp, t0, t0); 5283 + tcg_gen_helper_1_0(do_mftdsp, t0);
5284 break; 5284 break;
5285 default: 5285 default:
5286 goto die; 5286 goto die;