gwj / at91sam9263 · Commits

Commit acb98efbbff1c51cd9a594af7daa4fe8b4560916

Authored by aurel32
1 parent 4e14008f

bios: add support to memory above the pci hole 

(Izik Eidus)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4237 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 127 additions and 3 deletions
pc-bios/bios.bin
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pc-bios/bios.diff
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  1 +Index: rombios.c
  2 +===================================================================
  3 +RCS file: /cvsroot/bochs/bochs/bios/rombios.c,v
  4 +retrieving revision 1.205
  5 +diff -u -d -p -r1.205 rombios.c
  6 +--- rombios.c 21 Mar 2008 19:06:31 -0000 1.205
  7 ++++ rombios.c 10 Apr 2008 09:47:48 -0000
  8 +@@ -4395,22 +4395,25 @@ BX_DEBUG_INT15("case default:\n");
  9 + #endif // BX_USE_PS2_MOUSE
  10 +
  11 +
  12 +-void set_e820_range(ES, DI, start, end, type)
  13 ++void set_e820_range(ES, DI, start, end, extra_start, extra_end, type)
  14 + Bit16u ES;
  15 + Bit16u DI;
  16 + Bit32u start;
  17 + Bit32u end;
  18 ++ Bit8u extra_start;
  19 ++ Bit8u extra_end;
  20 + Bit16u type;
  21 + {
  22 + write_word(ES, DI, start);
  23 + write_word(ES, DI+2, start >> 16);
  24 +- write_word(ES, DI+4, 0x00);
  25 ++ write_word(ES, DI+4, extra_start);
  26 + write_word(ES, DI+6, 0x00);
  27 +
  28 + end -= start;
  29 ++ extra_end -= extra_start;
  30 + write_word(ES, DI+8, end);
  31 + write_word(ES, DI+10, end >> 16);
  32 +- write_word(ES, DI+12, 0x0000);
  33 ++ write_word(ES, DI+12, extra_end);
  34 + write_word(ES, DI+14, 0x0000);
  35 +
  36 + write_word(ES, DI+16, type);
  37 +@@ -4423,7 +4426,9 @@ int15_function32(regs, ES, DS, FLAGS)
  38 + Bit16u ES, DS, FLAGS;
  39 + {
  40 + Bit32u extended_memory_size=0; // 64bits long
  41 ++ Bit32u extra_lowbits_memory_size=0;
  42 + Bit16u CX,DX;
  43 ++ Bit8u extra_highbits_memory_size=0;
  44 +
  45 + BX_DEBUG_INT15("int15 AX=%04x\n",regs.u.r16.ax);
  46 +
  47 +@@ -4497,11 +4502,18 @@ ASM_END
  48 + extended_memory_size += (1L * 1024 * 1024);
  49 + }
  50 +
  51 ++ extra_lowbits_memory_size = inb_cmos(0x5c);
  52 ++ extra_lowbits_memory_size <<= 8;
  53 ++ extra_lowbits_memory_size |= inb_cmos(0x5b);
  54 ++ extra_lowbits_memory_size *= 64;
  55 ++ extra_lowbits_memory_size *= 1024;
  56 ++ extra_highbits_memory_size = inb_cmos(0x5d);
  57 ++
  58 + switch(regs.u.r16.bx)
  59 + {
  60 + case 0:
  61 + set_e820_range(ES, regs.u.r16.di,
  62 +- 0x0000000L, 0x0009fc00L, 1);
  63 ++ 0x0000000L, 0x0009fc00L, 0, 0, 1);
  64 + regs.u.r32.ebx = 1;
  65 + regs.u.r32.eax = 0x534D4150;
  66 + regs.u.r32.ecx = 0x14;
  67 +@@ -4510,7 +4522,7 @@ ASM_END
  68 + break;
  69 + case 1:
  70 + set_e820_range(ES, regs.u.r16.di,
  71 +- 0x0009fc00L, 0x000a0000L, 2);
  72 ++ 0x0009fc00L, 0x000a0000L, 0, 0, 2);
  73 + regs.u.r32.ebx = 2;
  74 + regs.u.r32.eax = 0x534D4150;
  75 + regs.u.r32.ecx = 0x14;
  76 +@@ -4519,7 +4531,7 @@ ASM_END
  77 + break;
  78 + case 2:
  79 + set_e820_range(ES, regs.u.r16.di,
  80 +- 0x000e8000L, 0x00100000L, 2);
  81 ++ 0x000e8000L, 0x00100000L, 0, 0, 2);
  82 + regs.u.r32.ebx = 3;
  83 + regs.u.r32.eax = 0x534D4150;
  84 + regs.u.r32.ecx = 0x14;
  85 +@@ -4529,7 +4541,7 @@ ASM_END
  86 + case 3:
  87 + set_e820_range(ES, regs.u.r16.di,
  88 + 0x00100000L,
  89 +- extended_memory_size - ACPI_DATA_SIZE, 1);
  90 ++ extended_memory_size - ACPI_DATA_SIZE ,0, 0, 1);
  91 + regs.u.r32.ebx = 4;
  92 + regs.u.r32.eax = 0x534D4150;
  93 + regs.u.r32.ecx = 0x14;
  94 +@@ -4539,7 +4551,7 @@ ASM_END
  95 + case 4:
  96 + set_e820_range(ES, regs.u.r16.di,
  97 + extended_memory_size - ACPI_DATA_SIZE,
  98 +- extended_memory_size, 3); // ACPI RAM
  99 ++ extended_memory_size ,0, 0, 3); // ACPI RAM
  100 + regs.u.r32.ebx = 5;
  101 + regs.u.r32.eax = 0x534D4150;
  102 + regs.u.r32.ecx = 0x14;
  103 +@@ -4549,7 +4561,20 @@ ASM_END
  104 + case 5:
  105 + /* 256KB BIOS area at the end of 4 GB */
  106 + set_e820_range(ES, regs.u.r16.di,
  107 +- 0xfffc0000L, 0x00000000L, 2);
  108 ++ 0xfffc0000L, 0x00000000L ,0, 0, 2);
  109 ++ if (extra_highbits_memory_size || extra_lowbits_memory_size)
  110 ++ regs.u.r32.ebx = 6;
  111 ++ else
  112 ++ regs.u.r32.ebx = 0;
  113 ++ regs.u.r32.eax = 0x534D4150;
  114 ++ regs.u.r32.ecx = 0x14;
  115 ++ CLEAR_CF();
  116 ++ return;
  117 ++ case 6:
  118 ++ /* Maping of memory above 4 GB */
  119 ++ set_e820_range(ES, regs.u.r16.di, 0x00000000L,
  120 ++ extra_lowbits_memory_size, 1, extra_highbits_memory_size
  121 ++ + 1, 1);
  122 + regs.u.r32.ebx = 0;
  123 + regs.u.r32.eax = 0x534D4150;
  124 + regs.u.r32.ecx = 0x14;
1 125 Index: rombios.h
2 126 ===================================================================
3 127 RCS file: /cvsroot/bochs/bochs/bios/rombios.h,v
4 128 retrieving revision 1.6
5 129 diff -u -d -p -r1.6 rombios.h
6 130 --- rombios.h 26 Jan 2008 09:15:27 -0000 1.6
7   -+++ rombios.h 28 Mar 2008 10:22:04 -0000
  131 ++++ rombios.h 10 Apr 2008 09:47:48 -0000
8 132 @@ -19,7 +19,7 @@
9 133 // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
10 134  
... ... @@ -20,7 +144,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios32.c,v
20 144 retrieving revision 1.24
21 145 diff -u -d -p -r1.24 rombios32.c
22 146 --- rombios32.c 6 Mar 2008 20:18:20 -0000 1.24
23   -+++ rombios32.c 28 Mar 2008 10:22:04 -0000
  147 ++++ rombios32.c 10 Apr 2008 09:47:48 -0000
24 148 @@ -477,7 +477,12 @@ void smp_probe(void)
25 149 sipi_vector = AP_BOOT_ADDR >> 12;
26 150 writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
... ... @@ -40,7 +164,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios32start.S,v
40 164 retrieving revision 1.4
41 165 diff -u -d -p -r1.4 rombios32start.S
42 166 --- rombios32start.S 26 Jan 2008 09:15:27 -0000 1.4
43   -+++ rombios32start.S 28 Mar 2008 10:22:04 -0000
  167 ++++ rombios32start.S 10 Apr 2008 09:47:48 -0000
44 168 @@ -42,7 +42,7 @@ _start:
45 169 smp_ap_boot_code_start:
46 170 xor %ax, %ax
... ...