Commit ac2e9d66b2007c71311e4ad5da9d82924b7fcbb2

Authored by blueswir1
1 parent 88fdf56f

Fix broken TCX vram, restore Sun4u PROM_SIZE_MAX

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4263 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 2 changed files with 18 additions and 15 deletions
hw/sun4m.c
@@ -76,6 +76,9 @@ @@ -76,6 +76,9 @@
76 #define PROM_VADDR 0xffd00000 76 #define PROM_VADDR 0xffd00000
77 #define PROM_FILENAME "openbios-sparc32" 77 #define PROM_FILENAME "openbios-sparc32"
78 78
  79 +// Control plane, 8-bit and 24-bit planes
  80 +#define TCX_SIZE (9 * 1024 * 1024)
  81 +
79 #define MAX_CPUS 16 82 #define MAX_CPUS 16
80 #define MAX_PILS 16 83 #define MAX_PILS 16
81 84
@@ -1213,70 +1216,70 @@ QEMUMachine ss5_machine = { @@ -1213,70 +1216,70 @@ QEMUMachine ss5_machine = {
1213 "SS-5", 1216 "SS-5",
1214 "Sun4m platform, SPARCstation 5", 1217 "Sun4m platform, SPARCstation 5",
1215 ss5_init, 1218 ss5_init,
1216 - PROM_SIZE_MAX + 0x00100000, 1219 + PROM_SIZE_MAX + TCX_SIZE,
1217 }; 1220 };
1218 1221
1219 QEMUMachine ss10_machine = { 1222 QEMUMachine ss10_machine = {
1220 "SS-10", 1223 "SS-10",
1221 "Sun4m platform, SPARCstation 10", 1224 "Sun4m platform, SPARCstation 10",
1222 ss10_init, 1225 ss10_init,
1223 - PROM_SIZE_MAX + 0x00100000, 1226 + PROM_SIZE_MAX + TCX_SIZE,
1224 }; 1227 };
1225 1228
1226 QEMUMachine ss600mp_machine = { 1229 QEMUMachine ss600mp_machine = {
1227 "SS-600MP", 1230 "SS-600MP",
1228 "Sun4m platform, SPARCserver 600MP", 1231 "Sun4m platform, SPARCserver 600MP",
1229 ss600mp_init, 1232 ss600mp_init,
1230 - PROM_SIZE_MAX + 0x00100000, 1233 + PROM_SIZE_MAX + TCX_SIZE,
1231 }; 1234 };
1232 1235
1233 QEMUMachine ss20_machine = { 1236 QEMUMachine ss20_machine = {
1234 "SS-20", 1237 "SS-20",
1235 "Sun4m platform, SPARCstation 20", 1238 "Sun4m platform, SPARCstation 20",
1236 ss20_init, 1239 ss20_init,
1237 - PROM_SIZE_MAX + 0x00100000, 1240 + PROM_SIZE_MAX + TCX_SIZE,
1238 }; 1241 };
1239 1242
1240 QEMUMachine ss2_machine = { 1243 QEMUMachine ss2_machine = {
1241 "SS-2", 1244 "SS-2",
1242 "Sun4c platform, SPARCstation 2", 1245 "Sun4c platform, SPARCstation 2",
1243 ss2_init, 1246 ss2_init,
1244 - PROM_SIZE_MAX + 0x00100000, 1247 + PROM_SIZE_MAX + TCX_SIZE,
1245 }; 1248 };
1246 1249
1247 QEMUMachine voyager_machine = { 1250 QEMUMachine voyager_machine = {
1248 "Voyager", 1251 "Voyager",
1249 "Sun4m platform, SPARCstation Voyager", 1252 "Sun4m platform, SPARCstation Voyager",
1250 vger_init, 1253 vger_init,
1251 - PROM_SIZE_MAX + 0x00100000, 1254 + PROM_SIZE_MAX + TCX_SIZE,
1252 }; 1255 };
1253 1256
1254 QEMUMachine ss_lx_machine = { 1257 QEMUMachine ss_lx_machine = {
1255 "LX", 1258 "LX",
1256 "Sun4m platform, SPARCstation LX", 1259 "Sun4m platform, SPARCstation LX",
1257 ss_lx_init, 1260 ss_lx_init,
1258 - PROM_SIZE_MAX + 0x00100000, 1261 + PROM_SIZE_MAX + TCX_SIZE,
1259 }; 1262 };
1260 1263
1261 QEMUMachine ss4_machine = { 1264 QEMUMachine ss4_machine = {
1262 "SS-4", 1265 "SS-4",
1263 "Sun4m platform, SPARCstation 4", 1266 "Sun4m platform, SPARCstation 4",
1264 ss4_init, 1267 ss4_init,
1265 - PROM_SIZE_MAX + 0x00100000, 1268 + PROM_SIZE_MAX + TCX_SIZE,
1266 }; 1269 };
1267 1270
1268 QEMUMachine scls_machine = { 1271 QEMUMachine scls_machine = {
1269 "SPARCClassic", 1272 "SPARCClassic",
1270 "Sun4m platform, SPARCClassic", 1273 "Sun4m platform, SPARCClassic",
1271 scls_init, 1274 scls_init,
1272 - PROM_SIZE_MAX + 0x00100000, 1275 + PROM_SIZE_MAX + TCX_SIZE,
1273 }; 1276 };
1274 1277
1275 QEMUMachine sbook_machine = { 1278 QEMUMachine sbook_machine = {
1276 "SPARCbook", 1279 "SPARCbook",
1277 "Sun4m platform, SPARCbook", 1280 "Sun4m platform, SPARCbook",
1278 sbook_init, 1281 sbook_init,
1279 - PROM_SIZE_MAX + 0x00100000, 1282 + PROM_SIZE_MAX + TCX_SIZE,
1280 }; 1283 };
1281 1284
1282 static const struct sun4d_hwdef sun4d_hwdefs[] = { 1285 static const struct sun4d_hwdef sun4d_hwdefs[] = {
@@ -1300,7 +1303,7 @@ static const struct sun4d_hwdef sun4d_hwdefs[] = { @@ -1300,7 +1303,7 @@ static const struct sun4d_hwdef sun4d_hwdefs[] = {
1300 .ledma_base = 0x800040000ULL, 1303 .ledma_base = 0x800040000ULL,
1301 .le_base = 0x800060000ULL, 1304 .le_base = 0x800060000ULL,
1302 .sbi_base = 0xf02800000ULL, 1305 .sbi_base = 0xf02800000ULL,
1303 - .vram_size = 0x00100000, 1306 + .vram_size = TCX_SIZE,
1304 .nvram_size = 0x2000, 1307 .nvram_size = 0x2000,
1305 .esp_irq = 3, 1308 .esp_irq = 3,
1306 .le_irq = 4, 1309 .le_irq = 4,
@@ -1333,7 +1336,7 @@ static const struct sun4d_hwdef sun4d_hwdefs[] = { @@ -1333,7 +1336,7 @@ static const struct sun4d_hwdef sun4d_hwdefs[] = {
1333 .ledma_base = 0x800040000ULL, 1336 .ledma_base = 0x800040000ULL,
1334 .le_base = 0x800060000ULL, 1337 .le_base = 0x800060000ULL,
1335 .sbi_base = 0xf02800000ULL, 1338 .sbi_base = 0xf02800000ULL,
1336 - .vram_size = 0x00100000, 1339 + .vram_size = TCX_SIZE,
1337 .nvram_size = 0x2000, 1340 .nvram_size = 0x2000,
1338 .esp_irq = 3, 1341 .esp_irq = 3,
1339 .le_irq = 4, 1342 .le_irq = 4,
@@ -1513,12 +1516,12 @@ QEMUMachine ss1000_machine = { @@ -1513,12 +1516,12 @@ QEMUMachine ss1000_machine = {
1513 "SS-1000", 1516 "SS-1000",
1514 "Sun4d platform, SPARCserver 1000", 1517 "Sun4d platform, SPARCserver 1000",
1515 ss1000_init, 1518 ss1000_init,
1516 - PROM_SIZE_MAX + 0x00100000, 1519 + PROM_SIZE_MAX + TCX_SIZE,
1517 }; 1520 };
1518 1521
1519 QEMUMachine ss2000_machine = { 1522 QEMUMachine ss2000_machine = {
1520 "SS-2000", 1523 "SS-2000",
1521 "Sun4d platform, SPARCcenter 2000", 1524 "Sun4d platform, SPARCcenter 2000",
1522 ss2000_init, 1525 ss2000_init,
1523 - PROM_SIZE_MAX + 0x00100000, 1526 + PROM_SIZE_MAX + TCX_SIZE,
1524 }; 1527 };
hw/sun4u.c
@@ -35,7 +35,7 @@ @@ -35,7 +35,7 @@
35 #define KERNEL_LOAD_ADDR 0x00404000 35 #define KERNEL_LOAD_ADDR 0x00404000
36 #define CMDLINE_ADDR 0x003ff000 36 #define CMDLINE_ADDR 0x003ff000
37 #define INITRD_LOAD_ADDR 0x00300000 37 #define INITRD_LOAD_ADDR 0x00300000
38 -#define PROM_SIZE_MAX (512 * 1024) 38 +#define PROM_SIZE_MAX (4 * 1024 * 1024)
39 #define PROM_ADDR 0x1fff0000000ULL 39 #define PROM_ADDR 0x1fff0000000ULL
40 #define PROM_VADDR 0x000ffd00000ULL 40 #define PROM_VADDR 0x000ffd00000ULL
41 #define APB_SPECIAL_BASE 0x1fe00000000ULL 41 #define APB_SPECIAL_BASE 0x1fe00000000ULL