Commit ab86bb3b0802aab0c12bcc6953ec4359f74d494d
1 parent
c38ac98d
ETRAX: Support timer count reads and correct frequencies.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6206 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
1 changed file
with
7 additions
and
26 deletions
hw/etraxfs_timer.c
... | ... | @@ -75,15 +75,6 @@ struct fs_timer_t { |
75 | 75 | uint32_t r_masked_intr; |
76 | 76 | }; |
77 | 77 | |
78 | -static uint32_t timer_rinvalid (void *opaque, target_phys_addr_t addr) | |
79 | -{ | |
80 | - struct fs_timer_t *t = opaque; | |
81 | - CPUState *env = t->env; | |
82 | - cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n", | |
83 | - addr); | |
84 | - return 0; | |
85 | -} | |
86 | - | |
87 | 78 | static uint32_t timer_readl (void *opaque, target_phys_addr_t addr) |
88 | 79 | { |
89 | 80 | struct fs_timer_t *t = opaque; |
... | ... | @@ -91,9 +82,10 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr) |
91 | 82 | |
92 | 83 | switch (addr) { |
93 | 84 | case R_TMR0_DATA: |
85 | + r = ptimer_get_count(t->ptimer_t0); | |
94 | 86 | break; |
95 | 87 | case R_TMR1_DATA: |
96 | - D(printf ("R_TMR1_DATA\n")); | |
88 | + r = ptimer_get_count(t->ptimer_t1); | |
97 | 89 | break; |
98 | 90 | case R_TIME: |
99 | 91 | r = qemu_get_clock(vm_clock) / 10; |
... | ... | @@ -111,15 +103,6 @@ static uint32_t timer_readl (void *opaque, target_phys_addr_t addr) |
111 | 103 | return r; |
112 | 104 | } |
113 | 105 | |
114 | -static void | |
115 | -timer_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value) | |
116 | -{ | |
117 | - struct fs_timer_t *t = opaque; | |
118 | - CPUState *env = t->env; | |
119 | - cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n", | |
120 | - addr); | |
121 | -} | |
122 | - | |
123 | 106 | #define TIMER_SLOWDOWN 1 |
124 | 107 | static void update_ctrl(struct fs_timer_t *t, int tnum) |
125 | 108 | { |
... | ... | @@ -155,7 +138,7 @@ static void update_ctrl(struct fs_timer_t *t, int tnum) |
155 | 138 | case 4: freq_hz = 29493000; break; |
156 | 139 | case 5: freq_hz = 32000000; break; |
157 | 140 | case 6: freq_hz = 32768000; break; |
158 | - case 7: freq_hz = 100001000; break; | |
141 | + case 7: freq_hz = 100000000; break; | |
159 | 142 | default: |
160 | 143 | abort(); |
161 | 144 | break; |
... | ... | @@ -163,8 +146,8 @@ static void update_ctrl(struct fs_timer_t *t, int tnum) |
163 | 146 | |
164 | 147 | D(printf ("freq_hz=%d div=%d\n", freq_hz, div)); |
165 | 148 | div = div * TIMER_SLOWDOWN; |
166 | - div >>= 10; | |
167 | - freq_hz >>= 10; | |
149 | + div /= 1000; | |
150 | + freq_hz /= 1000; | |
168 | 151 | ptimer_set_freq(timer, freq_hz); |
169 | 152 | ptimer_set_limit(timer, div, 0); |
170 | 153 | |
... | ... | @@ -309,14 +292,12 @@ timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value) |
309 | 292 | } |
310 | 293 | |
311 | 294 | static CPUReadMemoryFunc *timer_read[] = { |
312 | - &timer_rinvalid, | |
313 | - &timer_rinvalid, | |
295 | + NULL, NULL, | |
314 | 296 | &timer_readl, |
315 | 297 | }; |
316 | 298 | |
317 | 299 | static CPUWriteMemoryFunc *timer_write[] = { |
318 | - &timer_winvalid, | |
319 | - &timer_winvalid, | |
300 | + NULL, NULL, | |
320 | 301 | &timer_writel, |
321 | 302 | }; |
322 | 303 | ... | ... |