Commit aae6b32ae6253f7a6d7ebb1d77f9e34cc2e12553
1 parent
4d07272d
CRIS: Convert divide step to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4313 c046a42c-6fe2-441c-8c8c-71466251a162
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18 additions
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1 deletions
target-cris/translate.c
... | ... | @@ -375,6 +375,23 @@ static void t_gen_lz_i32(TCGv d, TCGv x) |
375 | 375 | tcg_gen_discard_i32(n); |
376 | 376 | } |
377 | 377 | |
378 | +static void t_gen_cris_dstep(TCGv d, TCGv s) | |
379 | +{ | |
380 | + int l1; | |
381 | + | |
382 | + l1 = gen_new_label(); | |
383 | + | |
384 | + /* | |
385 | + * d <<= 1 | |
386 | + * if (d >= s) | |
387 | + * d -= s; | |
388 | + */ | |
389 | + tcg_gen_shli_tl(d, d, 1); | |
390 | + tcg_gen_brcond_tl(TCG_COND_LTU, d, s, l1); | |
391 | + tcg_gen_sub_tl(d, d, s); | |
392 | + gen_set_label(l1); | |
393 | +} | |
394 | + | |
378 | 395 | /* Extended arithmetics on CRIS. */ |
379 | 396 | static inline void t_gen_add_flag(TCGv d, int flag) |
380 | 397 | { |
... | ... | @@ -725,7 +742,7 @@ static void crisv32_alu_op(DisasContext *dc, int op, int rd, int size) |
725 | 742 | } |
726 | 743 | break; |
727 | 744 | case CC_OP_DSTEP: |
728 | - gen_op_dstep_T0_T1(); | |
745 | + t_gen_cris_dstep(cpu_T[0], cpu_T[1]); | |
729 | 746 | break; |
730 | 747 | case CC_OP_BOUND: |
731 | 748 | { | ... | ... |