Commit aab33094073678d459ccaac5c60ea7533e8d1d8e
1 parent
05f3fb8d
more physical memory access functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1587 c046a42c-6fe2-441c-8c8c-71466251a162
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cpu-all.h
@@ -735,9 +735,15 @@ static inline void cpu_physical_memory_write(target_phys_addr_t addr, | @@ -735,9 +735,15 @@ static inline void cpu_physical_memory_write(target_phys_addr_t addr, | ||
735 | { | 735 | { |
736 | cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1); | 736 | cpu_physical_memory_rw(addr, (uint8_t *)buf, len, 1); |
737 | } | 737 | } |
738 | +uint32_t ldub_phys(target_phys_addr_t addr); | ||
739 | +uint32_t lduw_phys(target_phys_addr_t addr); | ||
738 | uint32_t ldl_phys(target_phys_addr_t addr); | 740 | uint32_t ldl_phys(target_phys_addr_t addr); |
741 | +uint64_t ldq_phys(target_phys_addr_t addr); | ||
739 | void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val); | 742 | void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val); |
743 | +void stb_phys(target_phys_addr_t addr, uint32_t val); | ||
744 | +void stw_phys(target_phys_addr_t addr, uint32_t val); | ||
740 | void stl_phys(target_phys_addr_t addr, uint32_t val); | 745 | void stl_phys(target_phys_addr_t addr, uint32_t val); |
746 | +void stq_phys(target_phys_addr_t addr, uint64_t val); | ||
741 | 747 | ||
742 | int cpu_memory_rw_debug(CPUState *env, target_ulong addr, | 748 | int cpu_memory_rw_debug(CPUState *env, target_ulong addr, |
743 | uint8_t *buf, int len, int is_write); | 749 | uint8_t *buf, int len, int is_write); |
exec.c
@@ -2284,6 +2284,30 @@ uint32_t ldl_phys(target_phys_addr_t addr) | @@ -2284,6 +2284,30 @@ uint32_t ldl_phys(target_phys_addr_t addr) | ||
2284 | return val; | 2284 | return val; |
2285 | } | 2285 | } |
2286 | 2286 | ||
2287 | +/* XXX: optimize */ | ||
2288 | +uint32_t ldub_phys(target_phys_addr_t addr) | ||
2289 | +{ | ||
2290 | + uint8_t val; | ||
2291 | + cpu_physical_memory_read(addr, &val, 1); | ||
2292 | + return val; | ||
2293 | +} | ||
2294 | + | ||
2295 | +/* XXX: optimize */ | ||
2296 | +uint32_t lduw_phys(target_phys_addr_t addr) | ||
2297 | +{ | ||
2298 | + uint16_t val; | ||
2299 | + cpu_physical_memory_read(addr, (uint8_t *)&val, 2); | ||
2300 | + return tswap16(val); | ||
2301 | +} | ||
2302 | + | ||
2303 | +/* XXX: optimize */ | ||
2304 | +uint64_t ldq_phys(target_phys_addr_t addr) | ||
2305 | +{ | ||
2306 | + uint64_t val; | ||
2307 | + cpu_physical_memory_read(addr, (uint8_t *)&val, 8); | ||
2308 | + return tswap64(val); | ||
2309 | +} | ||
2310 | + | ||
2287 | /* warning: addr must be aligned. The ram page is not masked as dirty | 2311 | /* warning: addr must be aligned. The ram page is not masked as dirty |
2288 | and the code inside is not invalidated. It is useful if the dirty | 2312 | and the code inside is not invalidated. It is useful if the dirty |
2289 | bits are used to track modified PTEs */ | 2313 | bits are used to track modified PTEs */ |
@@ -2345,6 +2369,27 @@ void stl_phys(target_phys_addr_t addr, uint32_t val) | @@ -2345,6 +2369,27 @@ void stl_phys(target_phys_addr_t addr, uint32_t val) | ||
2345 | } | 2369 | } |
2346 | } | 2370 | } |
2347 | 2371 | ||
2372 | +/* XXX: optimize */ | ||
2373 | +void stb_phys(target_phys_addr_t addr, uint32_t val) | ||
2374 | +{ | ||
2375 | + uint8_t v = val; | ||
2376 | + cpu_physical_memory_write(addr, &v, 1); | ||
2377 | +} | ||
2378 | + | ||
2379 | +/* XXX: optimize */ | ||
2380 | +void stw_phys(target_phys_addr_t addr, uint32_t val) | ||
2381 | +{ | ||
2382 | + uint16_t v = tswap16(val); | ||
2383 | + cpu_physical_memory_write(addr, (const uint8_t *)&v, 2); | ||
2384 | +} | ||
2385 | + | ||
2386 | +/* XXX: optimize */ | ||
2387 | +void stq_phys(target_phys_addr_t addr, uint64_t val) | ||
2388 | +{ | ||
2389 | + val = tswap64(val); | ||
2390 | + cpu_physical_memory_write(addr, (const uint8_t *)&val, 8); | ||
2391 | +} | ||
2392 | + | ||
2348 | #endif | 2393 | #endif |
2349 | 2394 | ||
2350 | /* virtual memory access for debug */ | 2395 | /* virtual memory access for debug */ |