gwj / at91sam9263 · Commits

Commit a94fd955eb70b629032afebcd323355323452f96

Authored by blueswir1
1 parent 27a3deca

Fix APB 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6265 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 28 additions and 13 deletions
hw/apb_pci.c
  View file @a94fd95
@@ -22,12 +22,23 @@ @@ -22,12 +22,23 @@
22 * THE SOFTWARE. 22 * THE SOFTWARE.
23 */ 23 */
24 24
25 -/* XXX This file and most of its contests are somewhat misnamed. The 25 +/* XXX This file and most of its contents are somewhat misnamed. The
26 Ultrasparc PCI host is called the PCI Bus Module (PBM). The APB is 26 Ultrasparc PCI host is called the PCI Bus Module (PBM). The APB is
27 the secondary PCI bridge. */ 27 the secondary PCI bridge. */
28 28
29 #include "hw.h" 29 #include "hw.h"
30 #include "pci.h" 30 #include "pci.h"
  31 +
  32 +/* debug APB */
  33 +//#define DEBUG_APB
  34 +
  35 +#ifdef DEBUG_APB
  36 +#define APB_DPRINTF(fmt, args...) \
  37 +do { printf("APB: " fmt , ##args); } while (0)
  38 +#else
  39 +#define APB_DPRINTF(fmt, args...)
  40 +#endif
  41 +
31 typedef target_phys_addr_t pci_addr_t; 42 typedef target_phys_addr_t pci_addr_t;
32 #include "pci_host.h" 43 #include "pci_host.h"
33 44
@@ -37,13 +48,13 @@ static void pci_apb_config_writel (void *opaque, target_phys_addr_t addr, @@ -37,13 +48,13 @@ static void pci_apb_config_writel (void *opaque, target_phys_addr_t addr,
37 uint32_t val) 48 uint32_t val)
38 { 49 {
39 APBState *s = opaque; 50 APBState *s = opaque;
40 - int i;  
41 51
42 - for (i = 11; i < 32; i++) {  
43 - if ((val & (1 << i)) != 0)  
44 - break;  
45 - }  
46 - s->config_reg = (1 << 16) | (val & 0x7FC) | (i << 11); 52 +#ifdef TARGET_WORDS_BIGENDIAN
  53 + val = bswap32(val);
  54 +#endif
  55 + APB_DPRINTF("config_writel addr " TARGET_FMT_plx " val %x\n", addr,
  56 + val);
  57 + s->config_reg = val;
47 } 58 }
48 59
49 static uint32_t pci_apb_config_readl (void *opaque, 60 static uint32_t pci_apb_config_readl (void *opaque,
@@ -51,10 +62,13 @@ static uint32_t pci_apb_config_readl (void *opaque, @@ -51,10 +62,13 @@ static uint32_t pci_apb_config_readl (void *opaque,
51 { 62 {
52 APBState *s = opaque; 63 APBState *s = opaque;
53 uint32_t val; 64 uint32_t val;
54 - int devfn;  
55 65
56 - devfn = (s->config_reg >> 8) & 0xFF;  
57 - val = (1 << (devfn >> 3)) | ((devfn & 0x07) << 8) | (s->config_reg & 0xFC); 66 + val = s->config_reg;
  67 +#ifdef TARGET_WORDS_BIGENDIAN
  68 + val = bswap32(val);
  69 +#endif
  70 + APB_DPRINTF("config_readl addr " TARGET_FMT_plx " val %x\n", addr,
  71 + val);
58 return val; 72 return val;
59 } 73 }
60 74
@@ -259,5 +273,5 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base, @@ -259,5 +273,5 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
259 "Advanced PCI Bus secondary bridge 1"); 273 "Advanced PCI Bus secondary bridge 1");
260 pci_bridge_init(s->bus, 9, 0x108e5000, pci_apb_map_irq, 274 pci_bridge_init(s->bus, 9, 0x108e5000, pci_apb_map_irq,
261 "Advanced PCI Bus secondary bridge 2"); 275 "Advanced PCI Bus secondary bridge 2");
262 - return secondary; 276 + return s->bus;
263 } 277 }
hw/sun4u.c
  View file @a94fd95
@@ -465,8 +465,9 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size, @@ -465,8 +465,9 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
465 pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL); 465 pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL);
466 isa_mem_base = VGA_BASE; 466 isa_mem_base = VGA_BASE;
467 vga_ram_offset = qemu_ram_alloc(vga_ram_size); 467 vga_ram_offset = qemu_ram_alloc(vga_ram_size);
468 - pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + vga_ram_offset,  
469 - vga_ram_offset, vga_ram_size); 468 + pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_offset,
  469 + vga_ram_offset, vga_ram_size,
  470 + 0, 0);
470 471
471 i = 0; 472 i = 0;
472 if (hwdef->console_serial_base) { 473 if (hwdef->console_serial_base) {