Commit a6e92a658b99b4ab3b19b2f32352005e6190556f

Authored by aurel32
1 parent 9bf3eb2c

target-mips: gen_compute_branch1()

Optimize code generation in gen_compute_branch1():
- Directly use I32 variables instead of converting values from _tl to
  _i32 and back to _tl.
- Write the result directly to bcond instead of passing by a local
  variable.
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5684 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 41 additions and 81 deletions
target-mips/translate.c
... ... @@ -5634,8 +5634,7 @@ static void gen_compute_branch1 (CPUState *env, DisasContext *ctx, uint32_t op,
5634 5634 {
5635 5635 target_ulong btarget;
5636 5636 const char *opn = "cp1 cond branch";
5637   - TCGv t0 = tcg_temp_local_new(TCG_TYPE_TL);
5638   - TCGv t1 = tcg_temp_local_new(TCG_TYPE_TL);
  5637 + TCGv t0 = tcg_temp_new(TCG_TYPE_TL);
5639 5638  
5640 5639 if (cc != 0)
5641 5640 check_insn(env, ctx, ISA_MIPS4 | ISA_MIPS32);
... ... @@ -5647,19 +5646,14 @@ static void gen_compute_branch1 (CPUState *env, DisasContext *ctx, uint32_t op,
5647 5646 {
5648 5647 int l1 = gen_new_label();
5649 5648 int l2 = gen_new_label();
5650   - TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I32);
5651 5649  
5652   - get_fp_cond(r_tmp1);
5653   - tcg_gen_ext_i32_tl(t0, r_tmp1);
5654   - tcg_temp_free(r_tmp1);
5655   - tcg_gen_not_tl(t0, t0);
5656   - tcg_gen_movi_tl(t1, 0x1 << cc);
5657   - tcg_gen_and_tl(t0, t0, t1);
5658   - tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
5659   - tcg_gen_movi_tl(t0, 0);
  5650 + get_fp_cond(t0);
  5651 + tcg_gen_andi_i32(t0, t0, 0x1 << cc);
  5652 + tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1);
  5653 + tcg_gen_movi_i32(bcond, 0);
5660 5654 tcg_gen_br(l2);
5661 5655 gen_set_label(l1);
5662   - tcg_gen_movi_tl(t0, 1);
  5656 + tcg_gen_movi_i32(bcond, 1);
5663 5657 gen_set_label(l2);
5664 5658 }
5665 5659 opn = "bc1f";
... ... @@ -5668,19 +5662,14 @@ static void gen_compute_branch1 (CPUState *env, DisasContext *ctx, uint32_t op,
5668 5662 {
5669 5663 int l1 = gen_new_label();
5670 5664 int l2 = gen_new_label();
5671   - TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I32);
5672 5665  
5673   - get_fp_cond(r_tmp1);
5674   - tcg_gen_ext_i32_tl(t0, r_tmp1);
5675   - tcg_temp_free(r_tmp1);
5676   - tcg_gen_not_tl(t0, t0);
5677   - tcg_gen_movi_tl(t1, 0x1 << cc);
5678   - tcg_gen_and_tl(t0, t0, t1);
5679   - tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
5680   - tcg_gen_movi_tl(t0, 0);
  5666 + get_fp_cond(t0);
  5667 + tcg_gen_andi_i32(t0, t0, 0x1 << cc);
  5668 + tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1);
  5669 + tcg_gen_movi_i32(bcond, 0);
5681 5670 tcg_gen_br(l2);
5682 5671 gen_set_label(l1);
5683   - tcg_gen_movi_tl(t0, 1);
  5672 + tcg_gen_movi_i32(bcond, 1);
5684 5673 gen_set_label(l2);
5685 5674 }
5686 5675 opn = "bc1fl";
... ... @@ -5689,18 +5678,14 @@ static void gen_compute_branch1 (CPUState *env, DisasContext *ctx, uint32_t op,
5689 5678 {
5690 5679 int l1 = gen_new_label();
5691 5680 int l2 = gen_new_label();
5692   - TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I32);
5693 5681  
5694   - get_fp_cond(r_tmp1);
5695   - tcg_gen_ext_i32_tl(t0, r_tmp1);
5696   - tcg_temp_free(r_tmp1);
5697   - tcg_gen_movi_tl(t1, 0x1 << cc);
5698   - tcg_gen_and_tl(t0, t0, t1);
5699   - tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
5700   - tcg_gen_movi_tl(t0, 0);
  5682 + get_fp_cond(t0);
  5683 + tcg_gen_andi_i32(t0, t0, 0x1 << cc);
  5684 + tcg_gen_brcondi_i32(TCG_COND_NE, t0, 0, l1);
  5685 + tcg_gen_movi_i32(bcond, 0);
5701 5686 tcg_gen_br(l2);
5702 5687 gen_set_label(l1);
5703   - tcg_gen_movi_tl(t0, 1);
  5688 + tcg_gen_movi_i32(bcond, 1);
5704 5689 gen_set_label(l2);
5705 5690 }
5706 5691 opn = "bc1t";
... ... @@ -5709,42 +5694,32 @@ static void gen_compute_branch1 (CPUState *env, DisasContext *ctx, uint32_t op,
5709 5694 {
5710 5695 int l1 = gen_new_label();
5711 5696 int l2 = gen_new_label();
5712   - TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I32);
5713 5697  
5714   - get_fp_cond(r_tmp1);
5715   - tcg_gen_ext_i32_tl(t0, r_tmp1);
5716   - tcg_temp_free(r_tmp1);
5717   - tcg_gen_movi_tl(t1, 0x1 << cc);
5718   - tcg_gen_and_tl(t0, t0, t1);
5719   - tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
5720   - tcg_gen_movi_tl(t0, 0);
  5698 + get_fp_cond(t0);
  5699 + tcg_gen_andi_i32(t0, t0, 0x1 << cc);
  5700 + tcg_gen_brcondi_i32(TCG_COND_NE, t0, 0, l1);
  5701 + tcg_gen_movi_i32(bcond, 0);
5721 5702 tcg_gen_br(l2);
5722 5703 gen_set_label(l1);
5723   - tcg_gen_movi_tl(t0, 1);
  5704 + tcg_gen_movi_i32(bcond, 1);
5724 5705 gen_set_label(l2);
5725 5706 }
5726 5707 opn = "bc1tl";
5727 5708 likely:
5728 5709 ctx->hflags |= MIPS_HFLAG_BL;
5729   - tcg_gen_trunc_tl_i32(bcond, t0);
5730 5710 break;
5731 5711 case OPC_BC1FANY2:
5732 5712 {
5733 5713 int l1 = gen_new_label();
5734 5714 int l2 = gen_new_label();
5735   - TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I32);
5736 5715  
5737   - get_fp_cond(r_tmp1);
5738   - tcg_gen_ext_i32_tl(t0, r_tmp1);
5739   - tcg_temp_free(r_tmp1);
5740   - tcg_gen_not_tl(t0, t0);
5741   - tcg_gen_movi_tl(t1, 0x3 << cc);
5742   - tcg_gen_and_tl(t0, t0, t1);
5743   - tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
5744   - tcg_gen_movi_tl(t0, 0);
  5716 + get_fp_cond(t0);
  5717 + tcg_gen_andi_i32(t0, t0, 0x3 << cc);
  5718 + tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1);
  5719 + tcg_gen_movi_i32(bcond, 0);
5745 5720 tcg_gen_br(l2);
5746 5721 gen_set_label(l1);
5747   - tcg_gen_movi_tl(t0, 1);
  5722 + tcg_gen_movi_i32(bcond, 1);
5748 5723 gen_set_label(l2);
5749 5724 }
5750 5725 opn = "bc1any2f";
... ... @@ -5753,18 +5728,14 @@ static void gen_compute_branch1 (CPUState *env, DisasContext *ctx, uint32_t op,
5753 5728 {
5754 5729 int l1 = gen_new_label();
5755 5730 int l2 = gen_new_label();
5756   - TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I32);
5757 5731  
5758   - get_fp_cond(r_tmp1);
5759   - tcg_gen_ext_i32_tl(t0, r_tmp1);
5760   - tcg_temp_free(r_tmp1);
5761   - tcg_gen_movi_tl(t1, 0x3 << cc);
5762   - tcg_gen_and_tl(t0, t0, t1);
5763   - tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
5764   - tcg_gen_movi_tl(t0, 0);
  5732 + get_fp_cond(t0);
  5733 + tcg_gen_andi_i32(t0, t0, 0x3 << cc);
  5734 + tcg_gen_brcondi_i32(TCG_COND_NE, t0, 0, l1);
  5735 + tcg_gen_movi_i32(bcond, 0);
5765 5736 tcg_gen_br(l2);
5766 5737 gen_set_label(l1);
5767   - tcg_gen_movi_tl(t0, 1);
  5738 + tcg_gen_movi_i32(bcond, 1);
5768 5739 gen_set_label(l2);
5769 5740 }
5770 5741 opn = "bc1any2t";
... ... @@ -5773,19 +5744,14 @@ static void gen_compute_branch1 (CPUState *env, DisasContext *ctx, uint32_t op,
5773 5744 {
5774 5745 int l1 = gen_new_label();
5775 5746 int l2 = gen_new_label();
5776   - TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I32);
5777 5747  
5778   - get_fp_cond(r_tmp1);
5779   - tcg_gen_ext_i32_tl(t0, r_tmp1);
5780   - tcg_temp_free(r_tmp1);
5781   - tcg_gen_not_tl(t0, t0);
5782   - tcg_gen_movi_tl(t1, 0xf << cc);
5783   - tcg_gen_and_tl(t0, t0, t1);
5784   - tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
5785   - tcg_gen_movi_tl(t0, 0);
  5748 + get_fp_cond(t0);
  5749 + tcg_gen_andi_i32(t0, t0, 0xf << cc);
  5750 + tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1);
  5751 + tcg_gen_movi_i32(bcond, 0);
5786 5752 tcg_gen_br(l2);
5787 5753 gen_set_label(l1);
5788   - tcg_gen_movi_tl(t0, 1);
  5754 + tcg_gen_movi_i32(bcond, 1);
5789 5755 gen_set_label(l2);
5790 5756 }
5791 5757 opn = "bc1any4f";
... ... @@ -5794,24 +5760,19 @@ static void gen_compute_branch1 (CPUState *env, DisasContext *ctx, uint32_t op,
5794 5760 {
5795 5761 int l1 = gen_new_label();
5796 5762 int l2 = gen_new_label();
5797   - TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I32);
5798 5763  
5799   - get_fp_cond(r_tmp1);
5800   - tcg_gen_ext_i32_tl(t0, r_tmp1);
5801   - tcg_temp_free(r_tmp1);
5802   - tcg_gen_movi_tl(t1, 0xf << cc);
5803   - tcg_gen_and_tl(t0, t0, t1);
5804   - tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0, l1);
5805   - tcg_gen_movi_tl(t0, 0);
  5764 + get_fp_cond(t0);
  5765 + tcg_gen_andi_i32(t0, t0, 0xf << cc);
  5766 + tcg_gen_brcondi_i32(TCG_COND_NE, t0, 0, l1);
  5767 + tcg_gen_movi_i32(bcond, 0);
5806 5768 tcg_gen_br(l2);
5807 5769 gen_set_label(l1);
5808   - tcg_gen_movi_tl(t0, 1);
  5770 + tcg_gen_movi_i32(bcond, 1);
5809 5771 gen_set_label(l2);
5810 5772 }
5811 5773 opn = "bc1any4t";
5812 5774 not_likely:
5813 5775 ctx->hflags |= MIPS_HFLAG_BC;
5814   - tcg_gen_trunc_tl_i32(bcond, t0);
5815 5776 break;
5816 5777 default:
5817 5778 MIPS_INVAL(opn);
... ... @@ -5824,7 +5785,6 @@ static void gen_compute_branch1 (CPUState *env, DisasContext *ctx, uint32_t op,
5824 5785  
5825 5786 out:
5826 5787 tcg_temp_free(t0);
5827   - tcg_temp_free(t1);
5828 5788 }
5829 5789  
5830 5790 /* Coprocessor 1 (FPU) */
... ...