Commit a69abbe0b3428a13c8225e1bd5ea3c938a9319af
1 parent
0b8f1b10
Emit and use adhoc function descriptor for code_gen_prologue on PPC64
Thus avoiding fragile inline assembly hackery to call into generated code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4939 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files
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10 additions
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18 deletions
tcg/ppc64/tcg-target.c
| ... | ... | @@ -773,6 +773,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc) |
| 773 | 773 | void tcg_target_qemu_prologue (TCGContext *s) |
| 774 | 774 | { |
| 775 | 775 | int i, frame_size; |
| 776 | + uint64_t addr; | |
| 776 | 777 | |
| 777 | 778 | frame_size = 0 |
| 778 | 779 | + 8 /* back chain */ |
| ... | ... | @@ -786,6 +787,12 @@ void tcg_target_qemu_prologue (TCGContext *s) |
| 786 | 787 | ; |
| 787 | 788 | frame_size = (frame_size + 15) & ~15; |
| 788 | 789 | |
| 790 | + /* First emit adhoc function descriptor */ | |
| 791 | + addr = (uint64_t) s->code_ptr + 24; | |
| 792 | + tcg_out32 (s, addr >> 32); tcg_out32 (s, addr); /* entry point */ | |
| 793 | + s->code_ptr += 16; /* skip TOC and environment pointer */ | |
| 794 | + | |
| 795 | + /* Prologue */ | |
| 789 | 796 | tcg_out32 (s, MFSPR | RT (0) | LR); |
| 790 | 797 | tcg_out32 (s, STDU | RS (1) | RA (1) | (-frame_size & 0xffff)); |
| 791 | 798 | for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i) |
| ... | ... | @@ -796,10 +803,11 @@ void tcg_target_qemu_prologue (TCGContext *s) |
| 796 | 803 | ) |
| 797 | 804 | ); |
| 798 | 805 | tcg_out32 (s, STD | RS (0) | RA (1) | (frame_size + 20)); |
| 799 | - tcg_out32 (s, STD | RS (2) | RA (1) | (frame_size + 40)); | |
| 800 | 806 | |
| 801 | 807 | tcg_out32 (s, MTSPR | RS (3) | CTR); |
| 802 | 808 | tcg_out32 (s, BCCTR | BO_ALWAYS); |
| 809 | + | |
| 810 | + /* Epilogue */ | |
| 803 | 811 | tb_ret_addr = s->code_ptr; |
| 804 | 812 | |
| 805 | 813 | for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i) |
| ... | ... | @@ -810,7 +818,6 @@ void tcg_target_qemu_prologue (TCGContext *s) |
| 810 | 818 | ) |
| 811 | 819 | ); |
| 812 | 820 | tcg_out32 (s, LD | RT (0) | RA (1) | (frame_size + 20)); |
| 813 | - tcg_out32 (s, LD | RT (2) | RA (1) | (frame_size + 40)); | |
| 814 | 821 | tcg_out32 (s, MTSPR | RS (0) | LR); |
| 815 | 822 | tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size); |
| 816 | 823 | tcg_out32 (s, BCLR | BO_ALWAYS); | ... | ... |
tcg/tcg.h
| ... | ... | @@ -413,24 +413,9 @@ uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t arg2); |
| 413 | 413 | uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2); |
| 414 | 414 | |
| 415 | 415 | extern uint8_t code_gen_prologue[]; |
| 416 | -#ifdef __powerpc__ | |
| 417 | -#ifdef __powerpc64__ | |
| 418 | -#define tcg_qemu_tb_exec(tb_ptr) \ | |
| 419 | - ({ unsigned long p; \ | |
| 420 | - asm volatile ( \ | |
| 421 | - "mtctr %1\n\t" \ | |
| 422 | - "mr 3,%2\n\t" \ | |
| 423 | - "bctrl\n\t" \ | |
| 424 | - "mr %0,3\n\t" \ | |
| 425 | - : "=r" (p) \ | |
| 426 | - : "r" (code_gen_prologue), "r" (tb_ptr) \ | |
| 427 | - : "3", "4", "5", "6", "7", "8", "9", "10", "11", "12"); \ | |
| 428 | - p; \ | |
| 429 | - }) | |
| 430 | -#else | |
| 416 | +#if defined(__powerpc__) && !defined(__powerpc64__) | |
| 431 | 417 | #define tcg_qemu_tb_exec(tb_ptr) \ |
| 432 | 418 | ((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr) |
| 433 | -#endif | |
| 434 | 419 | #else |
| 435 | 420 | #define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr) |
| 436 | 421 | #endif | ... | ... |