Commit a4a99d71b29ef6e506feeabc119e8ddf8490b07b
1 parent
90cb786c
Fix for 32-bit MIPS.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4622 c046a42c-6fe2-441c-8c8c-71466251a162
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10 additions
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9 deletions
target-mips/translate.c
| @@ -1904,15 +1904,16 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, | @@ -1904,15 +1904,16 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, | ||
| 1904 | { | 1904 | { |
| 1905 | TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64); | 1905 | TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64); |
| 1906 | TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64); | 1906 | TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64); |
| 1907 | - | ||
| 1908 | - tcg_gen_ext32s_tl(cpu_T[0], cpu_T[0]); | ||
| 1909 | - tcg_gen_ext32s_tl(cpu_T[1], cpu_T[1]); | ||
| 1910 | - tcg_gen_div_i64(r_tmp1, cpu_T[0], cpu_T[1]); | ||
| 1911 | - tcg_gen_rem_i64(r_tmp2, cpu_T[0], cpu_T[1]); | ||
| 1912 | - tcg_gen_ext32s_tl(r_tmp1, r_tmp1); | ||
| 1913 | - tcg_gen_ext32s_tl(r_tmp2, r_tmp2); | ||
| 1914 | - gen_store_LO(r_tmp1, 0); | ||
| 1915 | - gen_store_HI(r_tmp2, 0); | 1907 | + TCGv r_tmp3 = tcg_temp_new(TCG_TYPE_I64); |
| 1908 | + | ||
| 1909 | + tcg_gen_ext_tl_i64(r_tmp1, cpu_T[0]); | ||
| 1910 | + tcg_gen_ext_tl_i64(r_tmp2, cpu_T[1]); | ||
| 1911 | + tcg_gen_div_i64(r_tmp3, r_tmp1, r_tmp2); | ||
| 1912 | + tcg_gen_rem_i64(r_tmp2, r_tmp1, r_tmp2); | ||
| 1913 | + tcg_gen_trunc_i64_tl(cpu_T[0], r_tmp3); | ||
| 1914 | + tcg_gen_trunc_i64_tl(cpu_T[1], r_tmp2); | ||
| 1915 | + gen_store_LO(cpu_T[0], 0); | ||
| 1916 | + gen_store_HI(cpu_T[1], 0); | ||
| 1916 | } | 1917 | } |
| 1917 | gen_set_label(l1); | 1918 | gen_set_label(l1); |
| 1918 | } | 1919 | } |