gwj / at91sam9263 · Commits

Commit a44d2ce18a4d7d732a5bafd3aed330f850d46c8c

Authored by aurel32
1 parent 629bd74a

target-ppc: fix compilation with CONFIG_SOFTFLOAT 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6003 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 20 additions and 20 deletions
target-ppc/op_helper.c
  View file @a44d2ce
@@ -1408,7 +1408,7 @@ uint64_t helper_fnmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) @@ -1408,7 +1408,7 @@ uint64_t helper_fnmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3)
1408 farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); 1408 farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status);
1409 farg1.d = float64_add(farg1.d, farg3.d, &env->fp_status); 1409 farg1.d = float64_add(farg1.d, farg3.d, &env->fp_status);
1410 #endif 1410 #endif
1411 - if (likely(!isnan(farg1.d))) 1411 + if (likely(!float64_is_nan(farg1.d)))
1412 farg1.d = float64_chs(farg1.d); 1412 farg1.d = float64_chs(farg1.d);
1413 } 1413 }
1414 return farg1.ll; 1414 return farg1.ll;
@@ -1448,7 +1448,7 @@ uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) @@ -1448,7 +1448,7 @@ uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3)
1448 farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status); 1448 farg1.d = float64_mul(farg1.d, farg2.d, &env->fp_status);
1449 farg1.d = float64_sub(farg1.d, farg3.d, &env->fp_status); 1449 farg1.d = float64_sub(farg1.d, farg3.d, &env->fp_status);
1450 #endif 1450 #endif
1451 - if (likely(!isnan(farg1.d))) 1451 + if (likely(!float64_is_nan(farg1.d)))
1452 farg1.d = float64_chs(farg1.d); 1452 farg1.d = float64_chs(farg1.d);
1453 } 1453 }
1454 return farg1.ll; 1454 return farg1.ll;
@@ -1510,7 +1510,7 @@ uint64_t helper_fre (uint64_t arg) @@ -1510,7 +1510,7 @@ uint64_t helper_fre (uint64_t arg)
1510 farg.ll = 0xFFF0000000000000ULL; 1510 farg.ll = 0xFFF0000000000000ULL;
1511 } else if (farg.ll == 0x0000000000000000ULL) { 1511 } else if (farg.ll == 0x0000000000000000ULL) {
1512 farg.ll = 0x7FF0000000000000ULL; 1512 farg.ll = 0x7FF0000000000000ULL;
1513 - } else if (isnan(farg.d)) { 1513 + } else if (float64_is_nan(farg.d)) {
1514 farg.ll = 0x7FF8000000000000ULL; 1514 farg.ll = 0x7FF8000000000000ULL;
1515 } else if (fpisneg(farg.d)) { 1515 } else if (fpisneg(farg.d)) {
1516 farg.ll = 0x8000000000000000ULL; 1516 farg.ll = 0x8000000000000000ULL;
@@ -1545,7 +1545,7 @@ uint64_t helper_fres (uint64_t arg) @@ -1545,7 +1545,7 @@ uint64_t helper_fres (uint64_t arg)
1545 farg.ll = 0xFFF0000000000000ULL; 1545 farg.ll = 0xFFF0000000000000ULL;
1546 } else if (farg.ll == 0x0000000000000000ULL) { 1546 } else if (farg.ll == 0x0000000000000000ULL) {
1547 farg.ll = 0x7FF0000000000000ULL; 1547 farg.ll = 0x7FF0000000000000ULL;
1548 - } else if (isnan(farg.d)) { 1548 + } else if (float64_is_nan(farg.d)) {
1549 farg.ll = 0x7FF8000000000000ULL; 1549 farg.ll = 0x7FF8000000000000ULL;
1550 } else if (fpisneg(farg.d)) { 1550 } else if (fpisneg(farg.d)) {
1551 farg.ll = 0x8000000000000000ULL; 1551 farg.ll = 0x8000000000000000ULL;
@@ -1576,7 +1576,7 @@ uint64_t helper_frsqrte (uint64_t arg) @@ -1576,7 +1576,7 @@ uint64_t helper_frsqrte (uint64_t arg)
1576 farg.ll = 0xFFF0000000000000ULL; 1576 farg.ll = 0xFFF0000000000000ULL;
1577 } else if (farg.ll == 0x0000000000000000ULL) { 1577 } else if (farg.ll == 0x0000000000000000ULL) {
1578 farg.ll = 0x7FF0000000000000ULL; 1578 farg.ll = 0x7FF0000000000000ULL;
1579 - } else if (isnan(farg.d)) { 1579 + } else if (float64_is_nan(farg.d)) {
1580 farg.ll |= 0x000FFFFFFFFFFFFFULL; 1580 farg.ll |= 0x000FFFFFFFFFFFFFULL;
1581 } else if (fpisneg(farg.d)) { 1581 } else if (fpisneg(farg.d)) {
1582 farg.ll = 0x7FF8000000000000ULL; 1582 farg.ll = 0x7FF8000000000000ULL;
@@ -2065,7 +2065,7 @@ static always_inline int32_t efsctsi (uint32_t val) @@ -2065,7 +2065,7 @@ static always_inline int32_t efsctsi (uint32_t val)
2065 2065
2066 u.l = val; 2066 u.l = val;
2067 /* NaN are not treated the same way IEEE 754 does */ 2067 /* NaN are not treated the same way IEEE 754 does */
2068 - if (unlikely(isnan(u.f))) 2068 + if (unlikely(float32_is_nan(u.f)))
2069 return 0; 2069 return 0;
2070 2070
2071 return float32_to_int32(u.f, &env->spe_status); 2071 return float32_to_int32(u.f, &env->spe_status);
@@ -2077,7 +2077,7 @@ static always_inline uint32_t efsctui (uint32_t val) @@ -2077,7 +2077,7 @@ static always_inline uint32_t efsctui (uint32_t val)
2077 2077
2078 u.l = val; 2078 u.l = val;
2079 /* NaN are not treated the same way IEEE 754 does */ 2079 /* NaN are not treated the same way IEEE 754 does */
2080 - if (unlikely(isnan(u.f))) 2080 + if (unlikely(float32_is_nan(u.f)))
2081 return 0; 2081 return 0;
2082 2082
2083 return float32_to_uint32(u.f, &env->spe_status); 2083 return float32_to_uint32(u.f, &env->spe_status);
@@ -2089,7 +2089,7 @@ static always_inline uint32_t efsctsiz (uint32_t val) @@ -2089,7 +2089,7 @@ static always_inline uint32_t efsctsiz (uint32_t val)
2089 2089
2090 u.l = val; 2090 u.l = val;
2091 /* NaN are not treated the same way IEEE 754 does */ 2091 /* NaN are not treated the same way IEEE 754 does */
2092 - if (unlikely(isnan(u.f))) 2092 + if (unlikely(float32_is_nan(u.f)))
2093 return 0; 2093 return 0;
2094 2094
2095 return float32_to_int32_round_to_zero(u.f, &env->spe_status); 2095 return float32_to_int32_round_to_zero(u.f, &env->spe_status);
@@ -2101,7 +2101,7 @@ static always_inline uint32_t efsctuiz (uint32_t val) @@ -2101,7 +2101,7 @@ static always_inline uint32_t efsctuiz (uint32_t val)
2101 2101
2102 u.l = val; 2102 u.l = val;
2103 /* NaN are not treated the same way IEEE 754 does */ 2103 /* NaN are not treated the same way IEEE 754 does */
2104 - if (unlikely(isnan(u.f))) 2104 + if (unlikely(float32_is_nan(u.f)))
2105 return 0; 2105 return 0;
2106 2106
2107 return float32_to_uint32_round_to_zero(u.f, &env->spe_status); 2107 return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
@@ -2138,7 +2138,7 @@ static always_inline uint32_t efsctsf (uint32_t val) @@ -2138,7 +2138,7 @@ static always_inline uint32_t efsctsf (uint32_t val)
2138 2138
2139 u.l = val; 2139 u.l = val;
2140 /* NaN are not treated the same way IEEE 754 does */ 2140 /* NaN are not treated the same way IEEE 754 does */
2141 - if (unlikely(isnan(u.f))) 2141 + if (unlikely(float32_is_nan(u.f)))
2142 return 0; 2142 return 0;
2143 tmp = uint64_to_float32(1ULL << 32, &env->spe_status); 2143 tmp = uint64_to_float32(1ULL << 32, &env->spe_status);
2144 u.f = float32_mul(u.f, tmp, &env->spe_status); 2144 u.f = float32_mul(u.f, tmp, &env->spe_status);
@@ -2153,7 +2153,7 @@ static always_inline uint32_t efsctuf (uint32_t val) @@ -2153,7 +2153,7 @@ static always_inline uint32_t efsctuf (uint32_t val)
2153 2153
2154 u.l = val; 2154 u.l = val;
2155 /* NaN are not treated the same way IEEE 754 does */ 2155 /* NaN are not treated the same way IEEE 754 does */
2156 - if (unlikely(isnan(u.f))) 2156 + if (unlikely(float32_is_nan(u.f)))
2157 return 0; 2157 return 0;
2158 tmp = uint64_to_float32(1ULL << 32, &env->spe_status); 2158 tmp = uint64_to_float32(1ULL << 32, &env->spe_status);
2159 u.f = float32_mul(u.f, tmp, &env->spe_status); 2159 u.f = float32_mul(u.f, tmp, &env->spe_status);
@@ -2407,7 +2407,7 @@ uint32_t helper_efdctsi (uint64_t val) @@ -2407,7 +2407,7 @@ uint32_t helper_efdctsi (uint64_t val)
2407 2407
2408 u.ll = val; 2408 u.ll = val;
2409 /* NaN are not treated the same way IEEE 754 does */ 2409 /* NaN are not treated the same way IEEE 754 does */
2410 - if (unlikely(isnan(u.d))) 2410 + if (unlikely(float64_is_nan(u.d)))
2411 return 0; 2411 return 0;
2412 2412
2413 return float64_to_int32(u.d, &env->spe_status); 2413 return float64_to_int32(u.d, &env->spe_status);
@@ -2419,7 +2419,7 @@ uint32_t helper_efdctui (uint64_t val) @@ -2419,7 +2419,7 @@ uint32_t helper_efdctui (uint64_t val)
2419 2419
2420 u.ll = val; 2420 u.ll = val;
2421 /* NaN are not treated the same way IEEE 754 does */ 2421 /* NaN are not treated the same way IEEE 754 does */
2422 - if (unlikely(isnan(u.d))) 2422 + if (unlikely(float64_is_nan(u.d)))
2423 return 0; 2423 return 0;
2424 2424
2425 return float64_to_uint32(u.d, &env->spe_status); 2425 return float64_to_uint32(u.d, &env->spe_status);
@@ -2431,7 +2431,7 @@ uint32_t helper_efdctsiz (uint64_t val) @@ -2431,7 +2431,7 @@ uint32_t helper_efdctsiz (uint64_t val)
2431 2431
2432 u.ll = val; 2432 u.ll = val;
2433 /* NaN are not treated the same way IEEE 754 does */ 2433 /* NaN are not treated the same way IEEE 754 does */
2434 - if (unlikely(isnan(u.d))) 2434 + if (unlikely(float64_is_nan(u.d)))
2435 return 0; 2435 return 0;
2436 2436
2437 return float64_to_int32_round_to_zero(u.d, &env->spe_status); 2437 return float64_to_int32_round_to_zero(u.d, &env->spe_status);
@@ -2443,7 +2443,7 @@ uint64_t helper_efdctsidz (uint64_t val) @@ -2443,7 +2443,7 @@ uint64_t helper_efdctsidz (uint64_t val)
2443 2443
2444 u.ll = val; 2444 u.ll = val;
2445 /* NaN are not treated the same way IEEE 754 does */ 2445 /* NaN are not treated the same way IEEE 754 does */
2446 - if (unlikely(isnan(u.d))) 2446 + if (unlikely(float64_is_nan(u.d)))
2447 return 0; 2447 return 0;
2448 2448
2449 return float64_to_int64_round_to_zero(u.d, &env->spe_status); 2449 return float64_to_int64_round_to_zero(u.d, &env->spe_status);
@@ -2455,7 +2455,7 @@ uint32_t helper_efdctuiz (uint64_t val) @@ -2455,7 +2455,7 @@ uint32_t helper_efdctuiz (uint64_t val)
2455 2455
2456 u.ll = val; 2456 u.ll = val;
2457 /* NaN are not treated the same way IEEE 754 does */ 2457 /* NaN are not treated the same way IEEE 754 does */
2458 - if (unlikely(isnan(u.d))) 2458 + if (unlikely(float64_is_nan(u.d)))
2459 return 0; 2459 return 0;
2460 2460
2461 return float64_to_uint32_round_to_zero(u.d, &env->spe_status); 2461 return float64_to_uint32_round_to_zero(u.d, &env->spe_status);
@@ -2467,7 +2467,7 @@ uint64_t helper_efdctuidz (uint64_t val) @@ -2467,7 +2467,7 @@ uint64_t helper_efdctuidz (uint64_t val)
2467 2467
2468 u.ll = val; 2468 u.ll = val;
2469 /* NaN are not treated the same way IEEE 754 does */ 2469 /* NaN are not treated the same way IEEE 754 does */
2470 - if (unlikely(isnan(u.d))) 2470 + if (unlikely(float64_is_nan(u.d)))
2471 return 0; 2471 return 0;
2472 2472
2473 return float64_to_uint64_round_to_zero(u.d, &env->spe_status); 2473 return float64_to_uint64_round_to_zero(u.d, &env->spe_status);
@@ -2504,7 +2504,7 @@ uint32_t helper_efdctsf (uint64_t val) @@ -2504,7 +2504,7 @@ uint32_t helper_efdctsf (uint64_t val)
2504 2504
2505 u.ll = val; 2505 u.ll = val;
2506 /* NaN are not treated the same way IEEE 754 does */ 2506 /* NaN are not treated the same way IEEE 754 does */
2507 - if (unlikely(isnan(u.d))) 2507 + if (unlikely(float64_is_nan(u.d)))
2508 return 0; 2508 return 0;
2509 tmp = uint64_to_float64(1ULL << 32, &env->spe_status); 2509 tmp = uint64_to_float64(1ULL << 32, &env->spe_status);
2510 u.d = float64_mul(u.d, tmp, &env->spe_status); 2510 u.d = float64_mul(u.d, tmp, &env->spe_status);
@@ -2519,7 +2519,7 @@ uint32_t helper_efdctuf (uint64_t val) @@ -2519,7 +2519,7 @@ uint32_t helper_efdctuf (uint64_t val)
2519 2519
2520 u.ll = val; 2520 u.ll = val;
2521 /* NaN are not treated the same way IEEE 754 does */ 2521 /* NaN are not treated the same way IEEE 754 does */
2522 - if (unlikely(isnan(u.d))) 2522 + if (unlikely(float64_is_nan(u.d)))
2523 return 0; 2523 return 0;
2524 tmp = uint64_to_float64(1ULL << 32, &env->spe_status); 2524 tmp = uint64_to_float64(1ULL << 32, &env->spe_status);
2525 u.d = float64_mul(u.d, tmp, &env->spe_status); 2525 u.d = float64_mul(u.d, tmp, &env->spe_status);
target-ppc/translate.c
  View file @a44d2ce
@@ -206,7 +206,7 @@ struct opc_handler_t { @@ -206,7 +206,7 @@ struct opc_handler_t {
206 static always_inline void gen_reset_fpstatus (void) 206 static always_inline void gen_reset_fpstatus (void)
207 { 207 {
208 #ifdef CONFIG_SOFTFLOAT 208 #ifdef CONFIG_SOFTFLOAT
209 - gen_op_reset_fpstatus(); 209 + gen_helper_reset_fpstatus();
210 #endif 210 #endif
211 } 211 }
212 212