Commit a2a64a1f2db407fcebbf03c6e2b366bb2a2beecc
1 parent
811d4cf4
Remove dyngen ARM code, which did't build.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4501 c046a42c-6fe2-441c-8c8c-71466251a162
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5 additions
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414 deletions
dyngen.c
| ... | ... | @@ -1284,161 +1284,6 @@ get_plt_index (const char *name, unsigned long addend) |
| 1284 | 1284 | |
| 1285 | 1285 | #endif |
| 1286 | 1286 | |
| 1287 | -#ifdef HOST_ARM | |
| 1288 | - | |
| 1289 | -int arm_emit_ldr_info(const char *name, unsigned long start_offset, | |
| 1290 | - FILE *outfile, uint8_t *p_start, uint8_t *p_end, | |
| 1291 | - ELF_RELOC *relocs, int nb_relocs) | |
| 1292 | -{ | |
| 1293 | - uint8_t *p; | |
| 1294 | - uint32_t insn; | |
| 1295 | - int offset, min_offset, pc_offset, data_size, spare, max_pool; | |
| 1296 | - uint8_t data_allocated[1024]; | |
| 1297 | - unsigned int data_index; | |
| 1298 | - int type; | |
| 1299 | - | |
| 1300 | - memset(data_allocated, 0, sizeof(data_allocated)); | |
| 1301 | - | |
| 1302 | - p = p_start; | |
| 1303 | - min_offset = p_end - p_start; | |
| 1304 | - spare = 0x7fffffff; | |
| 1305 | - while (p < p_start + min_offset) { | |
| 1306 | - insn = get32((uint32_t *)p); | |
| 1307 | - /* TODO: Armv5e ldrd. */ | |
| 1308 | - /* TODO: VFP load. */ | |
| 1309 | - if ((insn & 0x0d5f0000) == 0x051f0000) { | |
| 1310 | - /* ldr reg, [pc, #im] */ | |
| 1311 | - offset = insn & 0xfff; | |
| 1312 | - if (!(insn & 0x00800000)) | |
| 1313 | - offset = -offset; | |
| 1314 | - max_pool = 4096; | |
| 1315 | - type = 0; | |
| 1316 | - } else if ((insn & 0x0e5f0f00) == 0x0c1f0100) { | |
| 1317 | - /* FPA ldf. */ | |
| 1318 | - offset = (insn & 0xff) << 2; | |
| 1319 | - if (!(insn & 0x00800000)) | |
| 1320 | - offset = -offset; | |
| 1321 | - max_pool = 1024; | |
| 1322 | - type = 1; | |
| 1323 | - } else if ((insn & 0x0fff0000) == 0x028f0000) { | |
| 1324 | - /* Some gcc load a doubleword immediate with | |
| 1325 | - add regN, pc, #imm | |
| 1326 | - ldmia regN, {regN, regM} | |
| 1327 | - Hope and pray the compiler never generates somethin like | |
| 1328 | - add reg, pc, #imm1; ldr reg, [reg, #-imm2]; */ | |
| 1329 | - int r; | |
| 1330 | - | |
| 1331 | - r = (insn & 0xf00) >> 7; | |
| 1332 | - offset = ((insn & 0xff) >> r) | ((insn & 0xff) << (32 - r)); | |
| 1333 | - max_pool = 1024; | |
| 1334 | - type = 2; | |
| 1335 | - } else { | |
| 1336 | - max_pool = 0; | |
| 1337 | - type = -1; | |
| 1338 | - } | |
| 1339 | - if (type >= 0) { | |
| 1340 | - /* PC-relative load needs fixing up. */ | |
| 1341 | - if (spare > max_pool - offset) | |
| 1342 | - spare = max_pool - offset; | |
| 1343 | - if ((offset & 3) !=0) | |
| 1344 | - error("%s:%04x: pc offset must be 32 bit aligned", | |
| 1345 | - name, start_offset + p - p_start); | |
| 1346 | - if (offset < 0) | |
| 1347 | - error("%s:%04x: Embedded literal value", | |
| 1348 | - name, start_offset + p - p_start); | |
| 1349 | - pc_offset = p - p_start + offset + 8; | |
| 1350 | - if (pc_offset <= (p - p_start) || | |
| 1351 | - pc_offset >= (p_end - p_start)) | |
| 1352 | - error("%s:%04x: pc offset must point inside the function code", | |
| 1353 | - name, start_offset + p - p_start); | |
| 1354 | - if (pc_offset < min_offset) | |
| 1355 | - min_offset = pc_offset; | |
| 1356 | - if (outfile) { | |
| 1357 | - /* The intruction position */ | |
| 1358 | - fprintf(outfile, " arm_ldr_ptr->ptr = gen_code_ptr + %d;\n", | |
| 1359 | - p - p_start); | |
| 1360 | - /* The position of the constant pool data. */ | |
| 1361 | - data_index = ((p_end - p_start) - pc_offset) >> 2; | |
| 1362 | - fprintf(outfile, " arm_ldr_ptr->data_ptr = arm_data_ptr - %d;\n", | |
| 1363 | - data_index); | |
| 1364 | - fprintf(outfile, " arm_ldr_ptr->type = %d;\n", type); | |
| 1365 | - fprintf(outfile, " arm_ldr_ptr++;\n"); | |
| 1366 | - } | |
| 1367 | - } | |
| 1368 | - p += 4; | |
| 1369 | - } | |
| 1370 | - | |
| 1371 | - /* Copy and relocate the constant pool data. */ | |
| 1372 | - data_size = (p_end - p_start) - min_offset; | |
| 1373 | - if (data_size > 0 && outfile) { | |
| 1374 | - spare += min_offset; | |
| 1375 | - fprintf(outfile, " arm_data_ptr -= %d;\n", data_size >> 2); | |
| 1376 | - fprintf(outfile, " arm_pool_ptr -= %d;\n", data_size); | |
| 1377 | - fprintf(outfile, " if (arm_pool_ptr > gen_code_ptr + %d)\n" | |
| 1378 | - " arm_pool_ptr = gen_code_ptr + %d;\n", | |
| 1379 | - spare, spare); | |
| 1380 | - | |
| 1381 | - data_index = 0; | |
| 1382 | - for (pc_offset = min_offset; | |
| 1383 | - pc_offset < p_end - p_start; | |
| 1384 | - pc_offset += 4) { | |
| 1385 | - | |
| 1386 | - ELF_RELOC *rel; | |
| 1387 | - int i, addend, type; | |
| 1388 | - const char *sym_name; | |
| 1389 | - char relname[1024]; | |
| 1390 | - | |
| 1391 | - /* data value */ | |
| 1392 | - addend = get32((uint32_t *)(p_start + pc_offset)); | |
| 1393 | - relname[0] = '\0'; | |
| 1394 | - for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) { | |
| 1395 | - if (rel->r_offset == (pc_offset + start_offset)) { | |
| 1396 | - sym_name = get_rel_sym_name(rel); | |
| 1397 | - /* the compiler leave some unnecessary references to the code */ | |
| 1398 | - get_reloc_expr(relname, sizeof(relname), sym_name); | |
| 1399 | - type = ELF32_R_TYPE(rel->r_info); | |
| 1400 | - if (type != R_ARM_ABS32) | |
| 1401 | - error("%s: unsupported data relocation", name); | |
| 1402 | - break; | |
| 1403 | - } | |
| 1404 | - } | |
| 1405 | - fprintf(outfile, " arm_data_ptr[%d] = 0x%x", | |
| 1406 | - data_index, addend); | |
| 1407 | - if (relname[0] != '\0') | |
| 1408 | - fprintf(outfile, " + %s", relname); | |
| 1409 | - fprintf(outfile, ";\n"); | |
| 1410 | - | |
| 1411 | - data_index++; | |
| 1412 | - } | |
| 1413 | - } | |
| 1414 | - | |
| 1415 | - if (p == p_start) | |
| 1416 | - goto arm_ret_error; | |
| 1417 | - p -= 4; | |
| 1418 | - insn = get32((uint32_t *)p); | |
| 1419 | - /* The last instruction must be an ldm instruction. There are several | |
| 1420 | - forms generated by gcc: | |
| 1421 | - ldmib sp, {..., pc} (implies a sp adjustment of +4) | |
| 1422 | - ldmia sp, {..., pc} | |
| 1423 | - ldmea fp, {..., pc} */ | |
| 1424 | - if ((insn & 0xffff8000) == 0xe99d8000) { | |
| 1425 | - if (outfile) { | |
| 1426 | - fprintf(outfile, | |
| 1427 | - " *(uint32_t *)(gen_code_ptr + %d) = 0xe28dd004;\n", | |
| 1428 | - p - p_start); | |
| 1429 | - } | |
| 1430 | - p += 4; | |
| 1431 | - } else if ((insn & 0xffff8000) != 0xe89d8000 | |
| 1432 | - && (insn & 0xffff8000) != 0xe91b8000) { | |
| 1433 | - arm_ret_error: | |
| 1434 | - if (!outfile) | |
| 1435 | - printf("%s: invalid epilog\n", name); | |
| 1436 | - } | |
| 1437 | - return p - p_start; | |
| 1438 | -} | |
| 1439 | -#endif | |
| 1440 | - | |
| 1441 | - | |
| 1442 | 1287 | #define MAX_ARGS 3 |
| 1443 | 1288 | |
| 1444 | 1289 | /* generate op code */ |
| ... | ... | @@ -1633,27 +1478,6 @@ void gen_code(const char *name, host_ulong offset, host_ulong size, |
| 1633 | 1478 | |
| 1634 | 1479 | copy_size = p - p_start; |
| 1635 | 1480 | } |
| 1636 | -#elif defined(HOST_ARM) | |
| 1637 | - { | |
| 1638 | - uint32_t insn; | |
| 1639 | - | |
| 1640 | - if ((p_end - p_start) <= 16) | |
| 1641 | - error("%s: function too small", name); | |
| 1642 | - if (get32((uint32_t *)p_start) != 0xe1a0c00d || | |
| 1643 | - (get32((uint32_t *)(p_start + 4)) & 0xffff0000) != 0xe92d0000 || | |
| 1644 | - get32((uint32_t *)(p_start + 8)) != 0xe24cb004) | |
| 1645 | - error("%s: invalid prolog", name); | |
| 1646 | - p_start += 12; | |
| 1647 | - start_offset += 12; | |
| 1648 | - insn = get32((uint32_t *)p_start); | |
| 1649 | - if ((insn & 0xffffff00) == 0xe24dd000) { | |
| 1650 | - /* Stack adjustment. Assume op uses the frame pointer. */ | |
| 1651 | - p_start -= 4; | |
| 1652 | - start_offset -= 4; | |
| 1653 | - } | |
| 1654 | - copy_size = arm_emit_ldr_info(name, start_offset, NULL, p_start, p_end, | |
| 1655 | - relocs, nb_relocs); | |
| 1656 | - } | |
| 1657 | 1481 | #elif defined(HOST_M68K) |
| 1658 | 1482 | { |
| 1659 | 1483 | uint8_t *p; |
| ... | ... | @@ -1725,6 +1549,8 @@ void gen_code(const char *name, host_ulong offset, host_ulong size, |
| 1725 | 1549 | } |
| 1726 | 1550 | copy_size = p - p_start; |
| 1727 | 1551 | } |
| 1552 | +#elif defined(HOST_ARM) | |
| 1553 | + error("dyngen targets not supported on ARM"); | |
| 1728 | 1554 | #else |
| 1729 | 1555 | #error unsupported CPU |
| 1730 | 1556 | #endif |
| ... | ... | @@ -2558,74 +2384,6 @@ void gen_code(const char *name, host_ulong offset, host_ulong size, |
| 2558 | 2384 | } |
| 2559 | 2385 | } |
| 2560 | 2386 | } |
| 2561 | -#elif defined(HOST_ARM) | |
| 2562 | - { | |
| 2563 | - char relname[256]; | |
| 2564 | - int type; | |
| 2565 | - int addend; | |
| 2566 | - int reloc_offset; | |
| 2567 | - uint32_t insn; | |
| 2568 | - | |
| 2569 | - insn = get32((uint32_t *)(p_start + 4)); | |
| 2570 | - /* If prologue ends in sub sp, sp, #const then assume | |
| 2571 | - op has a stack frame and needs the frame pointer. */ | |
| 2572 | - if ((insn & 0xffffff00) == 0xe24dd000) { | |
| 2573 | - int i; | |
| 2574 | - uint32_t opcode; | |
| 2575 | - opcode = 0xe28db000; /* add fp, sp, #0. */ | |
| 2576 | -#if 0 | |
| 2577 | -/* ??? Need to undo the extra stack adjustment at the end of the op. | |
| 2578 | - For now just leave the stack misaligned and hope it doesn't break anything | |
| 2579 | - too important. */ | |
| 2580 | - if ((insn & 4) != 0) { | |
| 2581 | - /* Preserve doubleword stack alignment. */ | |
| 2582 | - fprintf(outfile, | |
| 2583 | - " *(uint32_t *)(gen_code_ptr + 4)= 0x%x;\n", | |
| 2584 | - insn + 4); | |
| 2585 | - opcode -= 4; | |
| 2586 | - } | |
| 2587 | -#endif | |
| 2588 | - insn = get32((uint32_t *)(p_start - 4)); | |
| 2589 | - /* Calculate the size of the saved registers, | |
| 2590 | - excluding pc. */ | |
| 2591 | - for (i = 0; i < 15; i++) { | |
| 2592 | - if (insn & (1 << i)) | |
| 2593 | - opcode += 4; | |
| 2594 | - } | |
| 2595 | - fprintf(outfile, | |
| 2596 | - " *(uint32_t *)gen_code_ptr = 0x%x;\n", opcode); | |
| 2597 | - } | |
| 2598 | - arm_emit_ldr_info(relname, start_offset, outfile, p_start, p_end, | |
| 2599 | - relocs, nb_relocs); | |
| 2600 | - | |
| 2601 | - for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) { | |
| 2602 | - if (rel->r_offset >= start_offset && | |
| 2603 | - rel->r_offset < start_offset + copy_size) { | |
| 2604 | - sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name; | |
| 2605 | - /* the compiler leave some unnecessary references to the code */ | |
| 2606 | - if (sym_name[0] == '\0') | |
| 2607 | - continue; | |
| 2608 | - get_reloc_expr(relname, sizeof(relname), sym_name); | |
| 2609 | - type = ELF32_R_TYPE(rel->r_info); | |
| 2610 | - addend = get32((uint32_t *)(text + rel->r_offset)); | |
| 2611 | - reloc_offset = rel->r_offset - start_offset; | |
| 2612 | - switch(type) { | |
| 2613 | - case R_ARM_ABS32: | |
| 2614 | - fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s + %d;\n", | |
| 2615 | - reloc_offset, relname, addend); | |
| 2616 | - break; | |
| 2617 | - case R_ARM_PC24: | |
| 2618 | - case R_ARM_JUMP24: | |
| 2619 | - case R_ARM_CALL: | |
| 2620 | - fprintf(outfile, " arm_reloc_pc24((uint32_t *)(gen_code_ptr + %d), 0x%x, %s);\n", | |
| 2621 | - reloc_offset, addend, relname); | |
| 2622 | - break; | |
| 2623 | - default: | |
| 2624 | - error("unsupported arm relocation (%d)", type); | |
| 2625 | - } | |
| 2626 | - } | |
| 2627 | - } | |
| 2628 | - } | |
| 2629 | 2387 | #elif defined(HOST_M68K) |
| 2630 | 2388 | { |
| 2631 | 2389 | char relname[256]; |
| ... | ... | @@ -2810,6 +2568,8 @@ void gen_code(const char *name, host_ulong offset, host_ulong size, |
| 2810 | 2568 | } |
| 2811 | 2569 | } |
| 2812 | 2570 | } |
| 2571 | +#elif defined(HOST_ARM) | |
| 2572 | + error("dyngen targets not supported on ARM"); | |
| 2813 | 2573 | #else |
| 2814 | 2574 | #error unsupported CPU |
| 2815 | 2575 | #endif |
| ... | ... | @@ -2868,59 +2628,7 @@ int gen_file(FILE *outfile, int out_type) |
| 2868 | 2628 | /* generate big code generation switch */ |
| 2869 | 2629 | |
| 2870 | 2630 | #ifdef HOST_ARM |
| 2871 | -#error broken | |
| 2872 | - /* We need to know the size of all the ops so we can figure out when | |
| 2873 | - to emit constant pools. This must be consistent with opc.h. */ | |
| 2874 | -fprintf(outfile, | |
| 2875 | -"static const uint32_t arm_opc_size[] = {\n" | |
| 2876 | -" 0,\n" /* end */ | |
| 2877 | -" 0,\n" /* nop */ | |
| 2878 | -" 0,\n" /* nop1 */ | |
| 2879 | -" 0,\n" /* nop2 */ | |
| 2880 | -" 0,\n"); /* nop3 */ | |
| 2881 | - for(i = 0, sym = symtab; i < nb_syms; i++, sym++) { | |
| 2882 | - const char *name; | |
| 2883 | - name = get_sym_name(sym); | |
| 2884 | - if (strstart(name, OP_PREFIX, NULL)) { | |
| 2885 | - fprintf(outfile, " %d,\n", sym->st_size); | |
| 2886 | - } | |
| 2887 | - } | |
| 2888 | -fprintf(outfile, | |
| 2889 | -"};\n"); | |
| 2890 | -#endif | |
| 2891 | - | |
| 2892 | -#ifdef HOST_ARM | |
| 2893 | -#error broken | |
| 2894 | -/* Arm is tricky because it uses constant pools for loading immediate values. | |
| 2895 | - We assume (and require) each function is code followed by a constant pool. | |
| 2896 | - All the ops are small so this should be ok. For each op we figure | |
| 2897 | - out how much "spare" range we have in the load instructions. This allows | |
| 2898 | - us to insert subsequent ops in between the op and the constant pool, | |
| 2899 | - eliminating the neeed to jump around the pool. | |
| 2900 | - | |
| 2901 | - We currently generate: | |
| 2902 | - | |
| 2903 | - [ For this example we assume merging would move op1_pool out of range. | |
| 2904 | - In practice we should be able to combine many ops before the offset | |
| 2905 | - limits are reached. ] | |
| 2906 | - op1_code; | |
| 2907 | - op2_code; | |
| 2908 | - goto op3; | |
| 2909 | - op2_pool; | |
| 2910 | - op1_pool; | |
| 2911 | -op3: | |
| 2912 | - op3_code; | |
| 2913 | - ret; | |
| 2914 | - op3_pool; | |
| 2915 | - | |
| 2916 | - Ideally we'd put op1_pool before op2_pool, but that requires two passes. | |
| 2917 | - */ | |
| 2918 | -fprintf(outfile, | |
| 2919 | -" uint8_t *last_gen_code_ptr = gen_code_buf;\n" | |
| 2920 | -" LDREntry *arm_ldr_ptr = arm_ldr_table;\n" | |
| 2921 | -" uint32_t *arm_data_ptr = arm_data_table + ARM_LDR_TABLE_SIZE;\n" | |
| 2922 | -/* Initialise the parmissible pool offset to an arbitary large value. */ | |
| 2923 | -" uint8_t *arm_pool_ptr = gen_code_buf + 0x1000000;\n"); | |
| 2631 | + error("dyngen targets not supported on ARM"); | |
| 2924 | 2632 | #endif |
| 2925 | 2633 | #ifdef HOST_IA64 |
| 2926 | 2634 | #error broken |
| ... | ... | @@ -2981,20 +2689,6 @@ fprintf(outfile, |
| 2981 | 2689 | } |
| 2982 | 2690 | #endif |
| 2983 | 2691 | |
| 2984 | -#ifdef HOST_ARM | |
| 2985 | -#error broken | |
| 2986 | -/* Generate constant pool if needed */ | |
| 2987 | -fprintf(outfile, | |
| 2988 | -" if (gen_code_ptr + arm_opc_size[*opc_ptr] >= arm_pool_ptr) {\n" | |
| 2989 | -" gen_code_ptr = arm_flush_ldr(gen_code_ptr, arm_ldr_table, " | |
| 2990 | -"arm_ldr_ptr, arm_data_ptr, arm_data_table + ARM_LDR_TABLE_SIZE, 1);\n" | |
| 2991 | -" last_gen_code_ptr = gen_code_ptr;\n" | |
| 2992 | -" arm_ldr_ptr = arm_ldr_table;\n" | |
| 2993 | -" arm_data_ptr = arm_data_table + ARM_LDR_TABLE_SIZE;\n" | |
| 2994 | -" arm_pool_ptr = gen_code_ptr + 0x1000000;\n" | |
| 2995 | -" }\n"); | |
| 2996 | -#endif | |
| 2997 | - | |
| 2998 | 2692 | for(i = 0, sym = symtab; i < nb_syms; i++, sym++) { |
| 2999 | 2693 | const char *name; |
| 3000 | 2694 | name = get_sym_name(sym); | ... | ... |
tcg/tcg-dyngen.c
| ... | ... | @@ -143,109 +143,6 @@ void fix_bsr(void *p, int offset) { |
| 143 | 143 | |
| 144 | 144 | #endif /* __alpha__ */ |
| 145 | 145 | |
| 146 | -#ifdef __arm__ | |
| 147 | - | |
| 148 | -#define ARM_LDR_TABLE_SIZE 1024 | |
| 149 | - | |
| 150 | -typedef struct LDREntry { | |
| 151 | - uint8_t *ptr; | |
| 152 | - uint32_t *data_ptr; | |
| 153 | - unsigned type:2; | |
| 154 | -} LDREntry; | |
| 155 | - | |
| 156 | -static LDREntry arm_ldr_table[1024]; | |
| 157 | -static uint32_t arm_data_table[ARM_LDR_TABLE_SIZE]; | |
| 158 | - | |
| 159 | -extern char exec_loop; | |
| 160 | - | |
| 161 | -static inline void arm_reloc_pc24(uint32_t *ptr, uint32_t insn, int val) | |
| 162 | -{ | |
| 163 | - *ptr = (insn & ~0xffffff) | ((insn + ((val - (int)ptr) >> 2)) & 0xffffff); | |
| 164 | -} | |
| 165 | - | |
| 166 | -static uint8_t *arm_flush_ldr(uint8_t *gen_code_ptr, | |
| 167 | - LDREntry *ldr_start, LDREntry *ldr_end, | |
| 168 | - uint32_t *data_start, uint32_t *data_end, | |
| 169 | - int gen_jmp) | |
| 170 | -{ | |
| 171 | - LDREntry *le; | |
| 172 | - uint32_t *ptr; | |
| 173 | - int offset, data_size, target; | |
| 174 | - uint8_t *data_ptr; | |
| 175 | - uint32_t insn; | |
| 176 | - uint32_t mask; | |
| 177 | - | |
| 178 | - data_size = (data_end - data_start) << 2; | |
| 179 | - | |
| 180 | - if (gen_jmp) { | |
| 181 | - /* generate branch to skip the data */ | |
| 182 | - if (data_size == 0) | |
| 183 | - return gen_code_ptr; | |
| 184 | - target = (long)gen_code_ptr + data_size + 4; | |
| 185 | - arm_reloc_pc24((uint32_t *)gen_code_ptr, 0xeafffffe, target); | |
| 186 | - gen_code_ptr += 4; | |
| 187 | - } | |
| 188 | - | |
| 189 | - /* copy the data */ | |
| 190 | - data_ptr = gen_code_ptr; | |
| 191 | - memcpy(gen_code_ptr, data_start, data_size); | |
| 192 | - gen_code_ptr += data_size; | |
| 193 | - | |
| 194 | - /* patch the ldr to point to the data */ | |
| 195 | - for(le = ldr_start; le < ldr_end; le++) { | |
| 196 | - ptr = (uint32_t *)le->ptr; | |
| 197 | - offset = ((unsigned long)(le->data_ptr) - (unsigned long)data_start) + | |
| 198 | - (unsigned long)data_ptr - | |
| 199 | - (unsigned long)ptr - 8; | |
| 200 | - if (offset < 0) { | |
| 201 | - fprintf(stderr, "Negative constant pool offset\n"); | |
| 202 | - tcg_abort(); | |
| 203 | - } | |
| 204 | - switch (le->type) { | |
| 205 | - case 0: /* ldr */ | |
| 206 | - mask = ~0x00800fff; | |
| 207 | - if (offset >= 4096) { | |
| 208 | - fprintf(stderr, "Bad ldr offset\n"); | |
| 209 | - tcg_abort(); | |
| 210 | - } | |
| 211 | - break; | |
| 212 | - case 1: /* ldc */ | |
| 213 | - mask = ~0x008000ff; | |
| 214 | - if (offset >= 1024 ) { | |
| 215 | - fprintf(stderr, "Bad ldc offset\n"); | |
| 216 | - tcg_abort(); | |
| 217 | - } | |
| 218 | - break; | |
| 219 | - case 2: /* add */ | |
| 220 | - mask = ~0xfff; | |
| 221 | - if (offset >= 1024 ) { | |
| 222 | - fprintf(stderr, "Bad add offset\n"); | |
| 223 | - tcg_abort(); | |
| 224 | - } | |
| 225 | - break; | |
| 226 | - default: | |
| 227 | - fprintf(stderr, "Bad pc relative fixup\n"); | |
| 228 | - tcg_abort(); | |
| 229 | - } | |
| 230 | - insn = *ptr & mask; | |
| 231 | - switch (le->type) { | |
| 232 | - case 0: /* ldr */ | |
| 233 | - insn |= offset | 0x00800000; | |
| 234 | - break; | |
| 235 | - case 1: /* ldc */ | |
| 236 | - insn |= (offset >> 2) | 0x00800000; | |
| 237 | - break; | |
| 238 | - case 2: /* add */ | |
| 239 | - insn |= (offset >> 2) | 0xf00; | |
| 240 | - break; | |
| 241 | - } | |
| 242 | - *ptr = insn; | |
| 243 | - } | |
| 244 | - return gen_code_ptr; | |
| 245 | -} | |
| 246 | - | |
| 247 | -#endif /* __arm__ */ | |
| 248 | - | |
| 249 | 146 | #ifdef __ia64 |
| 250 | 147 | |
| 251 | 148 | /* Patch instruction with "val" where "mask" has 1 bits. */ | ... | ... |