Commit a2458627f9d29675ef29d2a3c8c6a3df99bedfb1
1 parent
b1fc0348
ppc64 target
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1523 c046a42c-6fe2-441c-8c8c-71466251a162
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48 additions
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6 deletions
Makefile.target
| @@ -4,6 +4,9 @@ TARGET_BASE_ARCH:=$(TARGET_ARCH) | @@ -4,6 +4,9 @@ TARGET_BASE_ARCH:=$(TARGET_ARCH) | ||
| 4 | ifeq ($(TARGET_ARCH), x86_64) | 4 | ifeq ($(TARGET_ARCH), x86_64) |
| 5 | TARGET_BASE_ARCH:=i386 | 5 | TARGET_BASE_ARCH:=i386 |
| 6 | endif | 6 | endif |
| 7 | +ifeq ($(TARGET_ARCH), ppc64) | ||
| 8 | +TARGET_BASE_ARCH:=ppc | ||
| 9 | +endif | ||
| 7 | ifeq ($(TARGET_ARCH), sparc64) | 10 | ifeq ($(TARGET_ARCH), sparc64) |
| 8 | TARGET_BASE_ARCH:=sparc | 11 | TARGET_BASE_ARCH:=sparc |
| 9 | endif | 12 | endif |
| @@ -195,7 +198,7 @@ ifeq ($(TARGET_ARCH), x86_64) | @@ -195,7 +198,7 @@ ifeq ($(TARGET_ARCH), x86_64) | ||
| 195 | LIBOBJS+=helper.o helper2.o | 198 | LIBOBJS+=helper.o helper2.o |
| 196 | endif | 199 | endif |
| 197 | 200 | ||
| 198 | -ifeq ($(TARGET_ARCH), ppc) | 201 | +ifeq ($(TARGET_BASE_ARCH), ppc) |
| 199 | LIBOBJS+= op_helper.o helper.o | 202 | LIBOBJS+= op_helper.o helper.o |
| 200 | endif | 203 | endif |
| 201 | 204 | ||
| @@ -225,7 +228,7 @@ endif | @@ -225,7 +228,7 @@ endif | ||
| 225 | ifeq ($(findstring alpha, $(TARGET_ARCH) $(ARCH)),alpha) | 228 | ifeq ($(findstring alpha, $(TARGET_ARCH) $(ARCH)),alpha) |
| 226 | LIBOBJS+=alpha-dis.o | 229 | LIBOBJS+=alpha-dis.o |
| 227 | endif | 230 | endif |
| 228 | -ifeq ($(findstring ppc, $(TARGET_ARCH) $(ARCH)),ppc) | 231 | +ifeq ($(findstring ppc, $(TARGET_BASE_ARCH) $(ARCH)),ppc) |
| 229 | LIBOBJS+=ppc-dis.o | 232 | LIBOBJS+=ppc-dis.o |
| 230 | endif | 233 | endif |
| 231 | ifeq ($(findstring mips, $(TARGET_ARCH) $(ARCH)),mips) | 234 | ifeq ($(findstring mips, $(TARGET_ARCH) $(ARCH)),mips) |
| @@ -286,7 +289,7 @@ VL_OBJS+= ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) | @@ -286,7 +289,7 @@ VL_OBJS+= ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) | ||
| 286 | VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pc.o | 289 | VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pc.o |
| 287 | VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o | 290 | VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o |
| 288 | endif | 291 | endif |
| 289 | -ifeq ($(TARGET_ARCH), ppc) | 292 | +ifeq ($(TARGET_BASE_ARCH), ppc) |
| 290 | VL_OBJS+= ppc.o ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) | 293 | VL_OBJS+= ppc.o ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV) |
| 291 | VL_OBJS+= mc146818rtc.o serial.o i8259.o i8254.o fdc.o m48t59.o | 294 | VL_OBJS+= mc146818rtc.o serial.o i8259.o i8254.o fdc.o m48t59.o |
| 292 | VL_OBJS+= ppc_prep.o ppc_chrp.o cuda.o adb.o openpic.o heathrow_pic.o mixeng.o | 295 | VL_OBJS+= ppc_prep.o ppc_chrp.o cuda.o adb.o openpic.o heathrow_pic.o mixeng.o |
| @@ -400,7 +403,7 @@ op.o: op.c op_template.h op_mem.h fop_template.h fbranch_template.h | @@ -400,7 +403,7 @@ op.o: op.c op_template.h op_mem.h fop_template.h fbranch_template.h | ||
| 400 | magic_load.o: elf_op.h | 403 | magic_load.o: elf_op.h |
| 401 | endif | 404 | endif |
| 402 | 405 | ||
| 403 | -ifeq ($(TARGET_ARCH), ppc) | 406 | +ifeq ($(TARGET_BASE_ARCH), ppc) |
| 404 | op.o: op.c op_template.h op_mem.h | 407 | op.o: op.c op_template.h op_mem.h |
| 405 | op_helper.o: op_helper_mem.h | 408 | op_helper.o: op_helper_mem.h |
| 406 | translate.o: translate.c translate_init.c | 409 | translate.o: translate.c translate_init.c |
configure
| @@ -611,6 +611,7 @@ target_bigendian="no" | @@ -611,6 +611,7 @@ target_bigendian="no" | ||
| 611 | [ "$target_cpu" = "sparc" ] && target_bigendian=yes | 611 | [ "$target_cpu" = "sparc" ] && target_bigendian=yes |
| 612 | [ "$target_cpu" = "sparc64" ] && target_bigendian=yes | 612 | [ "$target_cpu" = "sparc64" ] && target_bigendian=yes |
| 613 | [ "$target_cpu" = "ppc" ] && target_bigendian=yes | 613 | [ "$target_cpu" = "ppc" ] && target_bigendian=yes |
| 614 | +[ "$target_cpu" = "ppc64" ] && target_bigendian=yes | ||
| 614 | [ "$target_cpu" = "mips" ] && target_bigendian=yes | 615 | [ "$target_cpu" = "mips" ] && target_bigendian=yes |
| 615 | target_softmmu="no" | 616 | target_softmmu="no" |
| 616 | if expr $target : '.*-softmmu' > /dev/null ; then | 617 | if expr $target : '.*-softmmu' > /dev/null ; then |
| @@ -676,6 +677,11 @@ elif test "$target_cpu" = "ppc" ; then | @@ -676,6 +677,11 @@ elif test "$target_cpu" = "ppc" ; then | ||
| 676 | echo "TARGET_ARCH=ppc" >> $config_mak | 677 | echo "TARGET_ARCH=ppc" >> $config_mak |
| 677 | echo "#define TARGET_ARCH \"ppc\"" >> $config_h | 678 | echo "#define TARGET_ARCH \"ppc\"" >> $config_h |
| 678 | echo "#define TARGET_PPC 1" >> $config_h | 679 | echo "#define TARGET_PPC 1" >> $config_h |
| 680 | +elif test "$target_cpu" = "ppc64" ; then | ||
| 681 | + echo "TARGET_ARCH=ppc64" >> $config_mak | ||
| 682 | + echo "#define TARGET_ARCH \"ppc64\"" >> $config_h | ||
| 683 | + echo "#define TARGET_PPC 1" >> $config_h | ||
| 684 | + echo "#define TARGET_PPC64 1" >> $config_h | ||
| 679 | elif test "$target_cpu" = "x86_64" ; then | 685 | elif test "$target_cpu" = "x86_64" ; then |
| 680 | echo "TARGET_ARCH=x86_64" >> $config_mak | 686 | echo "TARGET_ARCH=x86_64" >> $config_mak |
| 681 | echo "#define TARGET_ARCH \"x86_64\"" >> $config_h | 687 | echo "#define TARGET_ARCH \"x86_64\"" >> $config_h |
dis-asm.h
| @@ -126,6 +126,24 @@ enum bfd_architecture | @@ -126,6 +126,24 @@ enum bfd_architecture | ||
| 126 | #define bfd_mach_h8300h 2 | 126 | #define bfd_mach_h8300h 2 |
| 127 | #define bfd_mach_h8300s 3 | 127 | #define bfd_mach_h8300s 3 |
| 128 | bfd_arch_powerpc, /* PowerPC */ | 128 | bfd_arch_powerpc, /* PowerPC */ |
| 129 | +#define bfd_mach_ppc 0 | ||
| 130 | +#define bfd_mach_ppc64 1 | ||
| 131 | +#define bfd_mach_ppc_403 403 | ||
| 132 | +#define bfd_mach_ppc_403gc 4030 | ||
| 133 | +#define bfd_mach_ppc_505 505 | ||
| 134 | +#define bfd_mach_ppc_601 601 | ||
| 135 | +#define bfd_mach_ppc_602 602 | ||
| 136 | +#define bfd_mach_ppc_603 603 | ||
| 137 | +#define bfd_mach_ppc_ec603e 6031 | ||
| 138 | +#define bfd_mach_ppc_604 604 | ||
| 139 | +#define bfd_mach_ppc_620 620 | ||
| 140 | +#define bfd_mach_ppc_630 630 | ||
| 141 | +#define bfd_mach_ppc_750 750 | ||
| 142 | +#define bfd_mach_ppc_860 860 | ||
| 143 | +#define bfd_mach_ppc_a35 35 | ||
| 144 | +#define bfd_mach_ppc_rs64ii 642 | ||
| 145 | +#define bfd_mach_ppc_rs64iii 643 | ||
| 146 | +#define bfd_mach_ppc_7400 7400 | ||
| 129 | bfd_arch_rs6000, /* IBM RS/6000 */ | 147 | bfd_arch_rs6000, /* IBM RS/6000 */ |
| 130 | bfd_arch_hppa, /* HP PA RISC */ | 148 | bfd_arch_hppa, /* HP PA RISC */ |
| 131 | bfd_arch_d10v, /* Mitsubishi D10V */ | 149 | bfd_arch_d10v, /* Mitsubishi D10V */ |
disas.c
| @@ -179,6 +179,11 @@ void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) | @@ -179,6 +179,11 @@ void target_disas(FILE *out, target_ulong code, target_ulong size, int flags) | ||
| 179 | #elif defined(TARGET_PPC) | 179 | #elif defined(TARGET_PPC) |
| 180 | if (cpu_single_env->msr[MSR_LE]) | 180 | if (cpu_single_env->msr[MSR_LE]) |
| 181 | disasm_info.endian = BFD_ENDIAN_LITTLE; | 181 | disasm_info.endian = BFD_ENDIAN_LITTLE; |
| 182 | +#ifdef TARGET_PPC64 | ||
| 183 | + disasm_info.mach = bfd_mach_ppc64; | ||
| 184 | +#else | ||
| 185 | + disasm_info.mach = bfd_mach_ppc; | ||
| 186 | +#endif | ||
| 182 | print_insn = print_insn_ppc; | 187 | print_insn = print_insn_ppc; |
| 183 | #elif defined(TARGET_MIPS) | 188 | #elif defined(TARGET_MIPS) |
| 184 | print_insn = print_insn_big_mips; | 189 | print_insn = print_insn_big_mips; |
| @@ -355,6 +360,11 @@ void monitor_disas(target_ulong pc, int nb_insn, int is_physical, int flags) | @@ -355,6 +360,11 @@ void monitor_disas(target_ulong pc, int nb_insn, int is_physical, int flags) | ||
| 355 | #elif defined(TARGET_SPARC) | 360 | #elif defined(TARGET_SPARC) |
| 356 | print_insn = print_insn_sparc; | 361 | print_insn = print_insn_sparc; |
| 357 | #elif defined(TARGET_PPC) | 362 | #elif defined(TARGET_PPC) |
| 363 | +#ifdef TARGET_PPC64 | ||
| 364 | + disasm_info.mach = bfd_mach_ppc64; | ||
| 365 | +#else | ||
| 366 | + disasm_info.mach = bfd_mach_ppc; | ||
| 367 | +#endif | ||
| 358 | print_insn = print_insn_ppc; | 368 | print_insn = print_insn_ppc; |
| 359 | #elif defined(TARGET_MIPS) | 369 | #elif defined(TARGET_MIPS) |
| 360 | print_insn = print_insn_big_mips; | 370 | print_insn = print_insn_big_mips; |
ppc-dis.c
| @@ -3084,8 +3084,13 @@ int print_insn_ppc (bfd_vma pc, disassemble_info *info) | @@ -3084,8 +3084,13 @@ int print_insn_ppc (bfd_vma pc, disassemble_info *info) | ||
| 3084 | opc = bfd_getb32(buf); | 3084 | opc = bfd_getb32(buf); |
| 3085 | else | 3085 | else |
| 3086 | opc = bfd_getl32(buf); | 3086 | opc = bfd_getl32(buf); |
| 3087 | - return print_insn_powerpc (info, opc, pc, | ||
| 3088 | - PPC | B32 | M601); | 3087 | + if (info->mach == bfd_mach_ppc64) { |
| 3088 | + return print_insn_powerpc (info, opc, pc, | ||
| 3089 | + PPC | B64); | ||
| 3090 | + } else { | ||
| 3091 | + return print_insn_powerpc (info, opc, pc, | ||
| 3092 | + PPC | B32 | M601); | ||
| 3093 | + } | ||
| 3089 | } | 3094 | } |
| 3090 | 3095 | ||
| 3091 | /* Print a PowerPC or POWER instruction. */ | 3096 | /* Print a PowerPC or POWER instruction. */ |