Commit a1daafd8df0d8acfce48ba220337ef7f895cfd85
1 parent
33f00271
Fix CCRes value for 20Kc.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3849 c046a42c-6fe2-441c-8c8c-71466251a162
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target-mips/translate_init.c
| @@ -317,7 +317,7 @@ static mips_def_t mips_defs[] = | @@ -317,7 +317,7 @@ static mips_def_t mips_defs[] = | ||
| 317 | .CP0_Config2 = MIPS_CONFIG2, | 317 | .CP0_Config2 = MIPS_CONFIG2, |
| 318 | .CP0_Config3 = MIPS_CONFIG3, | 318 | .CP0_Config3 = MIPS_CONFIG3, |
| 319 | .SYNCI_Step = 32, | 319 | .SYNCI_Step = 32, |
| 320 | - .CCRes = 2, | 320 | + .CCRes = 1, |
| 321 | .CP0_Status_rw_bitmask = 0x36FBFFFF, | 321 | .CP0_Status_rw_bitmask = 0x36FBFFFF, |
| 322 | /* The 20Kc has F64 / L / W but doesn't use the fcr0 bits. */ | 322 | /* The 20Kc has F64 / L / W but doesn't use the fcr0 bits. */ |
| 323 | .CP1_fcr0 = (1 << FCR0_3D) | (1 << FCR0_PS) | | 323 | .CP1_fcr0 = (1 << FCR0_3D) | (1 << FCR0_PS) | |