Commit 9d89330183ceb170df926bbc395deb12e136e0f7

Authored by bellard
1 parent b8a9e8f1

clean up - comments


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1271 c046a42c-6fe2-441c-8c8c-71466251a162
target-sparc/cpu.h
... ... @@ -127,7 +127,6 @@ typedef struct CPUSPARCState {
127 127 int exception_index;
128 128 int interrupt_index;
129 129 int interrupt_request;
130   - target_ulong exception_next_pc;
131 130 struct TranslationBlock *current_tb;
132 131 void *opaque;
133 132 /* NOTE: we allow 8 more registers to handle wrapping */
... ...
target-sparc/exec.h
... ... @@ -41,9 +41,7 @@ void do_fcmpd(void);
41 41 void do_ldd_kernel(target_ulong addr);
42 42 void do_ldd_user(target_ulong addr);
43 43 void do_ldd_raw(target_ulong addr);
44   -void do_interrupt(int intno, int is_int, int error_code,
45   - unsigned int next_eip, int is_hw);
46   -void raise_exception_err(int exception_index, int error_code);
  44 +void do_interrupt(int intno, int error_code);
47 45 void raise_exception(int tt);
48 46 void memcpy32(target_ulong *dst, const target_ulong *src);
49 47 target_ulong mmu_probe(target_ulong address, int mmulev);
... ... @@ -129,4 +127,7 @@ static inline void regs_to_env(void)
129 127 {
130 128 }
131 129  
  130 +int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
  131 + int is_user, int is_softmmu);
  132 +
132 133 #endif
... ...
target-sparc/helper.c
... ... @@ -23,8 +23,6 @@
23 23 //#define DEBUG_MMU
24 24  
25 25 /* Sparc MMU emulation */
26   -int cpu_sparc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
27   - int is_user, int is_softmmu);
28 26  
29 27 /* thread support */
30 28  
... ... @@ -40,7 +38,18 @@ void cpu_unlock(void)
40 38 spin_unlock(&global_cpu_lock);
41 39 }
42 40  
43   -#if !defined(CONFIG_USER_ONLY)
  41 +#if defined(CONFIG_USER_ONLY)
  42 +
  43 +int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
  44 + int is_user, int is_softmmu)
  45 +{
  46 + env->mmuregs[4] = address;
  47 + env->exception_index = 0; /* XXX: must be incorrect */
  48 + env->error_code = -2; /* XXX: is it really used ! */
  49 + return 1;
  50 +}
  51 +
  52 +#else
44 53  
45 54 #define MMUSUFFIX _mmu
46 55 #define GETPC() (__builtin_return_address(0))
... ... @@ -86,11 +95,10 @@ void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr)
86 95 cpu_restore_state(tb, env, pc, NULL);
87 96 }
88 97 }
89   - raise_exception_err(ret, env->error_code);
  98 + raise_exception(ret);
90 99 }
91 100 env = saved_env;
92 101 }
93   -#endif
94 102  
95 103 static const int access_table[8][8] = {
96 104 { 0, 0, 0, 0, 2, 0, 3, 3 },
... ... @@ -227,12 +235,6 @@ int cpu_sparc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
227 235 unsigned long vaddr;
228 236 int error_code = 0, prot, ret = 0, access_index;
229 237  
230   - if (env->user_mode_only) {
231   - /* user mode only emulation */
232   - error_code = -2;
233   - goto do_fault_user;
234   - }
235   -
236 238 error_code = get_physical_address(env, &paddr, &prot, &access_index, address, rw, is_user);
237 239 if (error_code == 0) {
238 240 virt_addr = address & TARGET_PAGE_MASK;
... ... @@ -248,11 +250,11 @@ int cpu_sparc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
248 250  
249 251 if (env->mmuregs[0] & MMU_NF || env->psret == 0) // No fault
250 252 return 0;
251   - do_fault_user:
252 253 env->exception_index = exception;
253 254 env->error_code = error_code;
254 255 return error_code;
255 256 }
  257 +#endif
256 258  
257 259 void memcpy32(target_ulong *dst, const target_ulong *src)
258 260 {
... ... @@ -287,23 +289,17 @@ void cpu_set_cwp(CPUState *env1, int new_cwp)
287 289 env = saved_env;
288 290 }
289 291  
290   -/*
291   - * Begin execution of an interruption. is_int is TRUE if coming from
292   - * the int instruction. next_eip is the EIP value AFTER the interrupt
293   - * instruction. It is only relevant if is_int is TRUE.
294   - */
295   -void do_interrupt(int intno, int is_int, int error_code,
296   - unsigned int next_eip, int is_hw)
  292 +void do_interrupt(int intno, int error_code)
297 293 {
298 294 int cwp;
299 295  
300 296 #ifdef DEBUG_PCALL
301 297 if (loglevel & CPU_LOG_INT) {
302 298 static int count;
303   - fprintf(logfile, "%6d: v=%02x e=%04x i=%d pc=%08x npc=%08x SP=%08x\n",
304   - count, intno, error_code, is_int,
305   - env->pc,
306   - env->npc, env->regwptr[6]);
  299 + fprintf(logfile, "%6d: v=%02x e=%04x pc=%08x npc=%08x SP=%08x\n",
  300 + count, intno, error_code,
  301 + env->pc,
  302 + env->npc, env->regwptr[6]);
307 303 #if 1
308 304 cpu_dump_state(env, logfile, fprintf, 0);
309 305 {
... ... @@ -334,6 +330,8 @@ void do_interrupt(int intno, int is_int, int error_code,
334 330 env->regwptr[9] = env->pc;
335 331 env->regwptr[10] = env->npc;
336 332 } else {
  333 + /* XXX: this code is clearly incorrect - npc should have the
  334 + incorrect value */
337 335 env->regwptr[9] = env->pc - 4; // XXX?
338 336 env->regwptr[10] = env->pc;
339 337 }
... ... @@ -345,11 +343,6 @@ void do_interrupt(int intno, int is_int, int error_code,
345 343 env->exception_index = 0;
346 344 }
347 345  
348   -void raise_exception_err(int exception_index, int error_code)
349   -{
350   - raise_exception(exception_index);
351   -}
352   -
353 346 target_ulong mmu_probe(target_ulong address, int mmulev)
354 347 {
355 348 target_phys_addr_t pde_ptr;
... ...
target-sparc/op.c
... ... @@ -556,12 +556,6 @@ void OPPROTO op_rett(void)
556 556 FORCE_RET();
557 557 }
558 558  
559   -void raise_exception(int tt)
560   -{
561   - env->exception_index = tt;
562   - cpu_loop_exit();
563   -}
564   -
565 559 /* XXX: use another pointer for %iN registers to avoid slow wrapping
566 560 handling ? */
567 561 void OPPROTO op_save(void)
... ...
target-sparc/op_helper.c
... ... @@ -4,6 +4,12 @@
4 4  
5 5 //#define DEBUG_MMU
6 6  
  7 +void raise_exception(int tt)
  8 +{
  9 + env->exception_index = tt;
  10 + cpu_loop_exit();
  11 +}
  12 +
7 13 #ifdef USE_INT_TO_FLOAT_HELPERS
8 14 void do_fitos(void)
9 15 {
... ...