Commit 9d27abd94fe2c48281a77112d58422b392a80f7b
1 parent
148dfc2a
fixed invalid CPL logic in vm86 mode - use generic CPU dump state function
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@142 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
1 changed file
with
23 additions
and
73 deletions
exec-i386.c
... | ... | @@ -188,74 +188,6 @@ void raise_exception(int exception_index) |
188 | 188 | raise_exception_err(exception_index, 0); |
189 | 189 | } |
190 | 190 | |
191 | -#if defined(DEBUG_EXEC) | |
192 | -static const char *cc_op_str[] = { | |
193 | - "DYNAMIC", | |
194 | - "EFLAGS", | |
195 | - "MUL", | |
196 | - "ADDB", | |
197 | - "ADDW", | |
198 | - "ADDL", | |
199 | - "ADCB", | |
200 | - "ADCW", | |
201 | - "ADCL", | |
202 | - "SUBB", | |
203 | - "SUBW", | |
204 | - "SUBL", | |
205 | - "SBBB", | |
206 | - "SBBW", | |
207 | - "SBBL", | |
208 | - "LOGICB", | |
209 | - "LOGICW", | |
210 | - "LOGICL", | |
211 | - "INCB", | |
212 | - "INCW", | |
213 | - "INCL", | |
214 | - "DECB", | |
215 | - "DECW", | |
216 | - "DECL", | |
217 | - "SHLB", | |
218 | - "SHLW", | |
219 | - "SHLL", | |
220 | - "SARB", | |
221 | - "SARW", | |
222 | - "SARL", | |
223 | -}; | |
224 | - | |
225 | -static void cpu_x86_dump_state(FILE *f) | |
226 | -{ | |
227 | - int eflags; | |
228 | - char cc_op_name[32]; | |
229 | - eflags = cc_table[CC_OP].compute_all(); | |
230 | - eflags |= (DF & DF_MASK); | |
231 | - if ((unsigned)env->cc_op < CC_OP_NB) | |
232 | - strcpy(cc_op_name, cc_op_str[env->cc_op]); | |
233 | - else | |
234 | - snprintf(cc_op_name, sizeof(cc_op_name), "[%d]", env->cc_op); | |
235 | - fprintf(f, | |
236 | - "EAX=%08x EBX=%08X ECX=%08x EDX=%08x\n" | |
237 | - "ESI=%08x EDI=%08X EBP=%08x ESP=%08x\n" | |
238 | - "CCS=%08x CCD=%08x CCO=%-8s EFL=%c%c%c%c%c%c%c\n" | |
239 | - "EIP=%08x\n", | |
240 | - env->regs[R_EAX], env->regs[R_EBX], env->regs[R_ECX], env->regs[R_EDX], | |
241 | - env->regs[R_ESI], env->regs[R_EDI], env->regs[R_EBP], env->regs[R_ESP], | |
242 | - env->cc_src, env->cc_dst, cc_op_name, | |
243 | - eflags & DF_MASK ? 'D' : '-', | |
244 | - eflags & CC_O ? 'O' : '-', | |
245 | - eflags & CC_S ? 'S' : '-', | |
246 | - eflags & CC_Z ? 'Z' : '-', | |
247 | - eflags & CC_A ? 'A' : '-', | |
248 | - eflags & CC_P ? 'P' : '-', | |
249 | - eflags & CC_C ? 'C' : '-', | |
250 | - env->eip); | |
251 | -#if 1 | |
252 | - fprintf(f, "ST0=%f ST1=%f ST2=%f ST3=%f\n", | |
253 | - (double)ST0, (double)ST1, (double)ST(2), (double)ST(3)); | |
254 | -#endif | |
255 | -} | |
256 | - | |
257 | -#endif | |
258 | - | |
259 | 191 | void cpu_x86_tblocks_init(void) |
260 | 192 | { |
261 | 193 | if (!code_gen_ptr) { |
... | ... | @@ -399,7 +331,7 @@ int cpu_x86_exec(CPUX86State *env1) |
399 | 331 | CC_OP = CC_OP_EFLAGS; |
400 | 332 | env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); |
401 | 333 | env->interrupt_request = 0; |
402 | - | |
334 | + | |
403 | 335 | /* prepare setjmp context for exception handling */ |
404 | 336 | if (setjmp(env->jmp_env) == 0) { |
405 | 337 | for(;;) { |
... | ... | @@ -408,7 +340,19 @@ int cpu_x86_exec(CPUX86State *env1) |
408 | 340 | } |
409 | 341 | #ifdef DEBUG_EXEC |
410 | 342 | if (loglevel) { |
411 | - cpu_x86_dump_state(logfile); | |
343 | + /* XXX: save all volatile state in cpu state */ | |
344 | + /* restore flags in standard format */ | |
345 | + env->regs[R_EAX] = EAX; | |
346 | + env->regs[R_EBX] = EBX; | |
347 | + env->regs[R_ECX] = ECX; | |
348 | + env->regs[R_EDX] = EDX; | |
349 | + env->regs[R_ESI] = ESI; | |
350 | + env->regs[R_EDI] = EDI; | |
351 | + env->regs[R_EBP] = EBP; | |
352 | + env->regs[R_ESP] = ESP; | |
353 | + env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); | |
354 | + cpu_x86_dump_state(env, logfile, 0); | |
355 | + env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); | |
412 | 356 | } |
413 | 357 | #endif |
414 | 358 | /* we compute the CPU state. We assume it will not |
... | ... | @@ -419,9 +363,14 @@ int cpu_x86_exec(CPUX86State *env1) |
419 | 363 | (unsigned long)env->seg_cache[R_ES].base | |
420 | 364 | (unsigned long)env->seg_cache[R_SS].base) != 0) << |
421 | 365 | GEN_FLAG_ADDSEG_SHIFT; |
422 | - flags |= (env->eflags & VM_MASK) >> (17 - GEN_FLAG_VM_SHIFT); | |
366 | + if (!(env->eflags & VM_MASK)) { | |
367 | + flags |= (env->segs[R_CS] & 3) << GEN_FLAG_CPL_SHIFT; | |
368 | + } else { | |
369 | + /* NOTE: a dummy CPL is kept */ | |
370 | + flags |= (1 << GEN_FLAG_VM_SHIFT); | |
371 | + flags |= (3 << GEN_FLAG_CPL_SHIFT); | |
372 | + } | |
423 | 373 | flags |= (env->eflags & IOPL_MASK) >> (12 - GEN_FLAG_IOPL_SHIFT); |
424 | - flags |= (env->segs[R_CS] & 3) << GEN_FLAG_CPL_SHIFT; | |
425 | 374 | cs_base = env->seg_cache[R_CS].base; |
426 | 375 | pc = cs_base + env->eip; |
427 | 376 | tb = tb_find(&ptb, (unsigned long)pc, (unsigned long)cs_base, |
... | ... | @@ -449,12 +398,13 @@ int cpu_x86_exec(CPUX86State *env1) |
449 | 398 | code_gen_ptr = (void *)(((unsigned long)code_gen_ptr + code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1)); |
450 | 399 | cpu_unlock(); |
451 | 400 | } |
401 | +#ifdef DEBUG_EXEC | |
452 | 402 | if (loglevel) { |
453 | 403 | fprintf(logfile, "Trace 0x%08lx [0x%08lx] %s\n", |
454 | 404 | (long)tb->tc_ptr, (long)tb->pc, |
455 | 405 | lookup_symbol((void *)tb->pc)); |
456 | - fflush(logfile); | |
457 | 406 | } |
407 | +#endif | |
458 | 408 | /* execute the generated code */ |
459 | 409 | tc_ptr = tb->tc_ptr; |
460 | 410 | gen_func = (void *)tc_ptr; | ... | ... |