Commit 9d05095e5fc0609bfb1f46379791abb664680e4b
1 parent
ea4e754f
mips cleanup (Thiemo Seufer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1934 c046a42c-6fe2-441c-8c8c-71466251a162
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2 additions
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2 deletions
cpu-exec.c
| @@ -561,6 +561,8 @@ int cpu_exec(CPUState *env1) | @@ -561,6 +561,8 @@ int cpu_exec(CPUState *env1) | ||
| 561 | #elif defined(TARGET_SH4) | 561 | #elif defined(TARGET_SH4) |
| 562 | /* XXXXX */ | 562 | /* XXXXX */ |
| 563 | #endif | 563 | #endif |
| 564 | + /* Don't use the cached interupt_request value, | ||
| 565 | + do_interrupt may have updated the EXITTB flag. */ | ||
| 564 | if (env->interrupt_request & CPU_INTERRUPT_EXITTB) { | 566 | if (env->interrupt_request & CPU_INTERRUPT_EXITTB) { |
| 565 | env->interrupt_request &= ~CPU_INTERRUPT_EXITTB; | 567 | env->interrupt_request &= ~CPU_INTERRUPT_EXITTB; |
| 566 | /* ensure that no TB jump will be modified as | 568 | /* ensure that no TB jump will be modified as |
target-mips/helper.c
| @@ -219,7 +219,6 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, | @@ -219,7 +219,6 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, | ||
| 219 | exception = EXCP_TLBS; | 219 | exception = EXCP_TLBS; |
| 220 | else | 220 | else |
| 221 | exception = EXCP_TLBL; | 221 | exception = EXCP_TLBL; |
| 222 | - error_code = 0; | ||
| 223 | break; | 222 | break; |
| 224 | case -4: | 223 | case -4: |
| 225 | /* TLB match but 'D' bit is cleared */ | 224 | /* TLB match but 'D' bit is cleared */ |
| @@ -350,7 +349,6 @@ void do_interrupt (CPUState *env) | @@ -350,7 +349,6 @@ void do_interrupt (CPUState *env) | ||
| 350 | cause = 4; | 349 | cause = 4; |
| 351 | goto set_EPC; | 350 | goto set_EPC; |
| 352 | case EXCP_TLBL: | 351 | case EXCP_TLBL: |
| 353 | - case EXCP_TLBF: | ||
| 354 | cause = 2; | 352 | cause = 2; |
| 355 | if (env->error_code == 1 && !(env->hflags & MIPS_HFLAG_EXL)) | 353 | if (env->error_code == 1 && !(env->hflags & MIPS_HFLAG_EXL)) |
| 356 | offset = 0x000; | 354 | offset = 0x000; |