Commit 9c9bb6c89d4aa9a86cc6eb78921138ff8db5a1b3
1 parent
4fbd24ba
Optimize consecutive CFI02 writes by remapping memory lazily (Jan Kiszka).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4220 c046a42c-6fe2-441c-8c8c-71466251a162
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1 changed file
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15 additions
and
7 deletions
hw/pflash_cfi02.c
| @@ -70,6 +70,7 @@ struct pflash_t { | @@ -70,6 +70,7 @@ struct pflash_t { | ||
| 70 | QEMUTimer *timer; | 70 | QEMUTimer *timer; |
| 71 | ram_addr_t off; | 71 | ram_addr_t off; |
| 72 | int fl_mem; | 72 | int fl_mem; |
| 73 | + int rom_mode; | ||
| 73 | void *storage; | 74 | void *storage; |
| 74 | }; | 75 | }; |
| 75 | 76 | ||
| @@ -80,6 +81,7 @@ static void pflash_register_memory(pflash_t *pfl, int rom_mode) | @@ -80,6 +81,7 @@ static void pflash_register_memory(pflash_t *pfl, int rom_mode) | ||
| 80 | 81 | ||
| 81 | if (rom_mode) | 82 | if (rom_mode) |
| 82 | phys_offset |= pfl->off | IO_MEM_ROMD; | 83 | phys_offset |= pfl->off | IO_MEM_ROMD; |
| 84 | + pfl->rom_mode = rom_mode; | ||
| 83 | 85 | ||
| 84 | for (i = 0; i < pfl->mappings; i++) | 86 | for (i = 0; i < pfl->mappings; i++) |
| 85 | cpu_register_physical_memory(pfl->base + i * pfl->chip_len, | 87 | cpu_register_physical_memory(pfl->base + i * pfl->chip_len, |
| @@ -110,7 +112,13 @@ static uint32_t pflash_read (pflash_t *pfl, uint32_t offset, int width) | @@ -110,7 +112,13 @@ static uint32_t pflash_read (pflash_t *pfl, uint32_t offset, int width) | ||
| 110 | 112 | ||
| 111 | DPRINTF("%s: offset " TARGET_FMT_lx "\n", __func__, offset); | 113 | DPRINTF("%s: offset " TARGET_FMT_lx "\n", __func__, offset); |
| 112 | ret = -1; | 114 | ret = -1; |
| 113 | - offset -= pfl->base; | 115 | + if (pfl->rom_mode) { |
| 116 | + offset -= (uint32_t)(long)pfl->storage; | ||
| 117 | + /* Lazy reset of to ROMD mode */ | ||
| 118 | + if (pfl->wcycle == 0) | ||
| 119 | + pflash_register_memory(pfl, 1); | ||
| 120 | + } else | ||
| 121 | + offset -= pfl->base; | ||
| 114 | offset &= pfl->chip_len - 1; | 122 | offset &= pfl->chip_len - 1; |
| 115 | boff = offset & 0xFF; | 123 | boff = offset & 0xFF; |
| 116 | if (pfl->width == 2) | 124 | if (pfl->width == 2) |
| @@ -224,8 +232,6 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value, | @@ -224,8 +232,6 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value, | ||
| 224 | uint8_t *p; | 232 | uint8_t *p; |
| 225 | uint8_t cmd; | 233 | uint8_t cmd; |
| 226 | 234 | ||
| 227 | - /* WARNING: when the memory area is in ROMD mode, the offset is a | ||
| 228 | - ram offset, not a physical address */ | ||
| 229 | cmd = value; | 235 | cmd = value; |
| 230 | if (pfl->cmd != 0xA0 && cmd == 0xF0) { | 236 | if (pfl->cmd != 0xA0 && cmd == 0xF0) { |
| 231 | #if 0 | 237 | #if 0 |
| @@ -236,7 +242,9 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value, | @@ -236,7 +242,9 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value, | ||
| 236 | } | 242 | } |
| 237 | DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d %d\n", __func__, | 243 | DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d %d\n", __func__, |
| 238 | offset, value, width, pfl->wcycle); | 244 | offset, value, width, pfl->wcycle); |
| 239 | - if (pfl->wcycle == 0) | 245 | + /* WARNING: when the memory area is in ROMD mode, the offset is a |
| 246 | + ram offset, not a physical address */ | ||
| 247 | + if (pfl->rom_mode) | ||
| 240 | offset -= (uint32_t)(long)pfl->storage; | 248 | offset -= (uint32_t)(long)pfl->storage; |
| 241 | else | 249 | else |
| 242 | offset -= pfl->base; | 250 | offset -= pfl->base; |
| @@ -251,8 +259,9 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value, | @@ -251,8 +259,9 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value, | ||
| 251 | boff = boff >> 2; | 259 | boff = boff >> 2; |
| 252 | switch (pfl->wcycle) { | 260 | switch (pfl->wcycle) { |
| 253 | case 0: | 261 | case 0: |
| 254 | - /* Set the device in I/O access mode */ | ||
| 255 | - pflash_register_memory(pfl, 0); | 262 | + /* Set the device in I/O access mode if required */ |
| 263 | + if (pfl->rom_mode) | ||
| 264 | + pflash_register_memory(pfl, 0); | ||
| 256 | /* We're in read mode */ | 265 | /* We're in read mode */ |
| 257 | check_unlock0: | 266 | check_unlock0: |
| 258 | if (boff == 0x55 && cmd == 0x98) { | 267 | if (boff == 0x55 && cmd == 0x98) { |
| @@ -439,7 +448,6 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value, | @@ -439,7 +448,6 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value, | ||
| 439 | 448 | ||
| 440 | /* Reset flash */ | 449 | /* Reset flash */ |
| 441 | reset_flash: | 450 | reset_flash: |
| 442 | - pflash_register_memory(pfl, 1); | ||
| 443 | pfl->bypass = 0; | 451 | pfl->bypass = 0; |
| 444 | pfl->wcycle = 0; | 452 | pfl->wcycle = 0; |
| 445 | pfl->cmd = 0; | 453 | pfl->cmd = 0; |