Commit 9a7f32283ca284ae0a2482a20d21f0cc08ac6dbf
1 parent
572a9d4a
Fix qemu_ld/st branches, constification, use orcc for tst synthetic op
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4466 c046a42c-6fe2-441c-8c8c-71466251a162
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9 additions
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9 deletions
tcg/sparc/tcg-target.c
| @@ -198,8 +198,8 @@ static inline int tcg_target_const_match(tcg_target_long val, | @@ -198,8 +198,8 @@ static inline int tcg_target_const_match(tcg_target_long val, | ||
| 198 | 198 | ||
| 199 | #define ARITH_ADD (INSN_OP(2) | INSN_OP3(0x00)) | 199 | #define ARITH_ADD (INSN_OP(2) | INSN_OP3(0x00)) |
| 200 | #define ARITH_AND (INSN_OP(2) | INSN_OP3(0x01)) | 200 | #define ARITH_AND (INSN_OP(2) | INSN_OP3(0x01)) |
| 201 | -#define ARITH_ANDCC (INSN_OP(2) | INSN_OP3(0x11)) | ||
| 202 | #define ARITH_OR (INSN_OP(2) | INSN_OP3(0x02)) | 201 | #define ARITH_OR (INSN_OP(2) | INSN_OP3(0x02)) |
| 202 | +#define ARITH_ORCC (INSN_OP(2) | INSN_OP3(0x12)) | ||
| 203 | #define ARITH_XOR (INSN_OP(2) | INSN_OP3(0x03)) | 203 | #define ARITH_XOR (INSN_OP(2) | INSN_OP3(0x03)) |
| 204 | #define ARITH_SUB (INSN_OP(2) | INSN_OP3(0x04)) | 204 | #define ARITH_SUB (INSN_OP(2) | INSN_OP3(0x04)) |
| 205 | #define ARITH_SUBCC (INSN_OP(2) | INSN_OP3(0x14)) | 205 | #define ARITH_SUBCC (INSN_OP(2) | INSN_OP3(0x14)) |
| @@ -387,8 +387,8 @@ static void tcg_out_brcond(TCGContext *s, int cond, | @@ -387,8 +387,8 @@ static void tcg_out_brcond(TCGContext *s, int cond, | ||
| 387 | int label_index) | 387 | int label_index) |
| 388 | { | 388 | { |
| 389 | if (const_arg2 && arg2 == 0) | 389 | if (const_arg2 && arg2 == 0) |
| 390 | - /* andcc r, r, %g0 */ | ||
| 391 | - tcg_out_arith(s, TCG_REG_G0, arg1, arg1, ARITH_ANDCC); | 390 | + /* orcc r, r, %g0 */ |
| 391 | + tcg_out_arith(s, TCG_REG_G0, TCG_REG_G0, arg1, ARITH_ORCC); | ||
| 392 | else | 392 | else |
| 393 | /* subcc r1, r2, %g0 */ | 393 | /* subcc r1, r2, %g0 */ |
| 394 | tcg_out_arith(s, TCG_REG_G0, arg1, arg2, ARITH_SUBCC); | 394 | tcg_out_arith(s, TCG_REG_G0, arg1, arg2, ARITH_SUBCC); |
| @@ -418,14 +418,14 @@ extern void __stl_mmu(void); | @@ -418,14 +418,14 @@ extern void __stl_mmu(void); | ||
| 418 | extern void __stq_mmu(void); | 418 | extern void __stq_mmu(void); |
| 419 | 419 | ||
| 420 | 420 | ||
| 421 | -static void *qemu_ld_helpers[4] = { | 421 | +static const void * const qemu_ld_helpers[4] = { |
| 422 | __ldb_mmu, | 422 | __ldb_mmu, |
| 423 | __ldw_mmu, | 423 | __ldw_mmu, |
| 424 | __ldl_mmu, | 424 | __ldl_mmu, |
| 425 | __ldq_mmu, | 425 | __ldq_mmu, |
| 426 | }; | 426 | }; |
| 427 | 427 | ||
| 428 | -static void *qemu_st_helpers[4] = { | 428 | +static const void * const qemu_st_helpers[4] = { |
| 429 | __stb_mmu, | 429 | __stb_mmu, |
| 430 | __stw_mmu, | 430 | __stw_mmu, |
| 431 | __stl_mmu, | 431 | __stl_mmu, |
| @@ -531,7 +531,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, | @@ -531,7 +531,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, | ||
| 531 | tcg_out32(s, 0); | 531 | tcg_out32(s, 0); |
| 532 | 532 | ||
| 533 | /* label1: */ | 533 | /* label1: */ |
| 534 | - *label1_ptr = (INSN_OP(0) | COND_A | INSN_OP2(0x2) | | 534 | + *label1_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) | |
| 535 | INSN_OFF22((unsigned long)label1_ptr - | 535 | INSN_OFF22((unsigned long)label1_ptr - |
| 536 | (unsigned long)s->code_ptr)); | 536 | (unsigned long)s->code_ptr)); |
| 537 | 537 | ||
| @@ -599,7 +599,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, | @@ -599,7 +599,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, | ||
| 599 | 599 | ||
| 600 | #if defined(CONFIG_SOFTMMU) | 600 | #if defined(CONFIG_SOFTMMU) |
| 601 | /* label2: */ | 601 | /* label2: */ |
| 602 | - *label2_ptr = (INSN_OP(0) | COND_A | INSN_OP2(0x2) | | 602 | + *label2_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) | |
| 603 | INSN_OFF22((unsigned long)label2_ptr - | 603 | INSN_OFF22((unsigned long)label2_ptr - |
| 604 | (unsigned long)s->code_ptr)); | 604 | (unsigned long)s->code_ptr)); |
| 605 | #endif | 605 | #endif |
| @@ -703,7 +703,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, | @@ -703,7 +703,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, | ||
| 703 | tcg_out32(s, 0); | 703 | tcg_out32(s, 0); |
| 704 | 704 | ||
| 705 | /* label1: */ | 705 | /* label1: */ |
| 706 | - *label1_ptr = (INSN_OP(0) | COND_A | INSN_OP2(0x2) | | 706 | + *label1_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) | |
| 707 | INSN_OFF22((unsigned long)label1_ptr - | 707 | INSN_OFF22((unsigned long)label1_ptr - |
| 708 | (unsigned long)s->code_ptr)); | 708 | (unsigned long)s->code_ptr)); |
| 709 | 709 | ||
| @@ -753,7 +753,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, | @@ -753,7 +753,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, | ||
| 753 | 753 | ||
| 754 | #if defined(CONFIG_SOFTMMU) | 754 | #if defined(CONFIG_SOFTMMU) |
| 755 | /* label2: */ | 755 | /* label2: */ |
| 756 | - *label2_ptr = (INSN_OP(0) | COND_A | INSN_OP2(0x2) | | 756 | + *label2_ptr = (INSN_OP(0) | INSN_COND(COND_A, 0) | INSN_OP2(0x2) | |
| 757 | INSN_OFF22((unsigned long)label2_ptr - | 757 | INSN_OFF22((unsigned long)label2_ptr - |
| 758 | (unsigned long)s->code_ptr)); | 758 | (unsigned long)s->code_ptr)); |
| 759 | #endif | 759 | #endif |