Commit 99e300ef3f9bd4f982b17e35c552fa7b16295d94
1 parent
cfde4bd9
Clean up GEN_HANDLER
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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1 changed file
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694 additions
and
233 deletions
target-ppc/translate.c
@@ -314,8 +314,7 @@ static always_inline void gen_sync_exception (DisasContext *ctx) | @@ -314,8 +314,7 @@ static always_inline void gen_sync_exception (DisasContext *ctx) | ||
314 | 314 | ||
315 | #define GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \ | 315 | #define GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \ |
316 | static void gen_##name (DisasContext *ctx); \ | 316 | static void gen_##name (DisasContext *ctx); \ |
317 | -GEN_OPCODE(name, opc1, opc2, opc3, inval, type); \ | ||
318 | -static void gen_##name (DisasContext *ctx) | 317 | +GEN_OPCODE(name, opc1, opc2, opc3, inval, type); |
319 | 318 | ||
320 | #define GEN_HANDLER2(name, onam, opc1, opc2, opc3, inval, type) \ | 319 | #define GEN_HANDLER2(name, onam, opc1, opc2, opc3, inval, type) \ |
321 | static void gen_##name (DisasContext *ctx); \ | 320 | static void gen_##name (DisasContext *ctx); \ |
@@ -562,7 +561,9 @@ static always_inline void gen_store_spr(int reg, TCGv t) | @@ -562,7 +561,9 @@ static always_inline void gen_store_spr(int reg, TCGv t) | ||
562 | GEN_OPCODE_MARK(start); | 561 | GEN_OPCODE_MARK(start); |
563 | 562 | ||
564 | /* Invalid instruction */ | 563 | /* Invalid instruction */ |
565 | -GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE) | 564 | +GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE); |
565 | + | ||
566 | +static void gen_invalid(DisasContext *ctx) | ||
566 | { | 567 | { |
567 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); | 568 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); |
568 | } | 569 | } |
@@ -647,7 +648,9 @@ static always_inline void gen_set_Rc0 (DisasContext *ctx, TCGv reg) | @@ -647,7 +648,9 @@ static always_inline void gen_set_Rc0 (DisasContext *ctx, TCGv reg) | ||
647 | } | 648 | } |
648 | 649 | ||
649 | /* cmp */ | 650 | /* cmp */ |
650 | -GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER) | 651 | +GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER); |
652 | + | ||
653 | +static void gen_cmp(DisasContext *ctx) | ||
651 | { | 654 | { |
652 | #if defined(TARGET_PPC64) | 655 | #if defined(TARGET_PPC64) |
653 | if (!(ctx->sf_mode && (ctx->opcode & 0x00200000))) | 656 | if (!(ctx->sf_mode && (ctx->opcode & 0x00200000))) |
@@ -660,7 +663,9 @@ GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER) | @@ -660,7 +663,9 @@ GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER) | ||
660 | } | 663 | } |
661 | 664 | ||
662 | /* cmpi */ | 665 | /* cmpi */ |
663 | -GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER) | 666 | +GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER); |
667 | + | ||
668 | +static void gen_cmpi(DisasContext *ctx) | ||
664 | { | 669 | { |
665 | #if defined(TARGET_PPC64) | 670 | #if defined(TARGET_PPC64) |
666 | if (!(ctx->sf_mode && (ctx->opcode & 0x00200000))) | 671 | if (!(ctx->sf_mode && (ctx->opcode & 0x00200000))) |
@@ -673,7 +678,9 @@ GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER) | @@ -673,7 +678,9 @@ GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER) | ||
673 | } | 678 | } |
674 | 679 | ||
675 | /* cmpl */ | 680 | /* cmpl */ |
676 | -GEN_HANDLER(cmpl, 0x1F, 0x00, 0x01, 0x00400000, PPC_INTEGER) | 681 | +GEN_HANDLER(cmpl, 0x1F, 0x00, 0x01, 0x00400000, PPC_INTEGER); |
682 | + | ||
683 | +static void gen_cmpl(DisasContext *ctx) | ||
677 | { | 684 | { |
678 | #if defined(TARGET_PPC64) | 685 | #if defined(TARGET_PPC64) |
679 | if (!(ctx->sf_mode && (ctx->opcode & 0x00200000))) | 686 | if (!(ctx->sf_mode && (ctx->opcode & 0x00200000))) |
@@ -686,7 +693,9 @@ GEN_HANDLER(cmpl, 0x1F, 0x00, 0x01, 0x00400000, PPC_INTEGER) | @@ -686,7 +693,9 @@ GEN_HANDLER(cmpl, 0x1F, 0x00, 0x01, 0x00400000, PPC_INTEGER) | ||
686 | } | 693 | } |
687 | 694 | ||
688 | /* cmpli */ | 695 | /* cmpli */ |
689 | -GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER) | 696 | +GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER); |
697 | + | ||
698 | +static void gen_cmpli(DisasContext *ctx) | ||
690 | { | 699 | { |
691 | #if defined(TARGET_PPC64) | 700 | #if defined(TARGET_PPC64) |
692 | if (!(ctx->sf_mode && (ctx->opcode & 0x00200000))) | 701 | if (!(ctx->sf_mode && (ctx->opcode & 0x00200000))) |
@@ -699,7 +708,9 @@ GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER) | @@ -699,7 +708,9 @@ GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER) | ||
699 | } | 708 | } |
700 | 709 | ||
701 | /* isel (PowerPC 2.03 specification) */ | 710 | /* isel (PowerPC 2.03 specification) */ |
702 | -GEN_HANDLER(isel, 0x1F, 0x0F, 0xFF, 0x00000001, PPC_ISEL) | 711 | +GEN_HANDLER(isel, 0x1F, 0x0F, 0xFF, 0x00000001, PPC_ISEL); |
712 | + | ||
713 | +static void gen_isel(DisasContext *ctx) | ||
703 | { | 714 | { |
704 | int l1, l2; | 715 | int l1, l2; |
705 | uint32_t bi = rC(ctx->opcode); | 716 | uint32_t bi = rC(ctx->opcode); |
@@ -846,7 +857,9 @@ static always_inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg | @@ -846,7 +857,9 @@ static always_inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg | ||
846 | } | 857 | } |
847 | /* Add functions with two operands */ | 858 | /* Add functions with two operands */ |
848 | #define GEN_INT_ARITH_ADD(name, opc3, add_ca, compute_ca, compute_ov) \ | 859 | #define GEN_INT_ARITH_ADD(name, opc3, add_ca, compute_ca, compute_ov) \ |
849 | -GEN_HANDLER(name, 0x1F, 0x0A, opc3, 0x00000000, PPC_INTEGER) \ | 860 | +GEN_HANDLER(name, 0x1F, 0x0A, opc3, 0x00000000, PPC_INTEGER); \ |
861 | + \ | ||
862 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
850 | { \ | 863 | { \ |
851 | gen_op_arith_add(ctx, cpu_gpr[rD(ctx->opcode)], \ | 864 | gen_op_arith_add(ctx, cpu_gpr[rD(ctx->opcode)], \ |
852 | cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ | 865 | cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ |
@@ -855,7 +868,9 @@ GEN_HANDLER(name, 0x1F, 0x0A, opc3, 0x00000000, PPC_INTEGER) \ | @@ -855,7 +868,9 @@ GEN_HANDLER(name, 0x1F, 0x0A, opc3, 0x00000000, PPC_INTEGER) \ | ||
855 | /* Add functions with one operand and one immediate */ | 868 | /* Add functions with one operand and one immediate */ |
856 | #define GEN_INT_ARITH_ADD_CONST(name, opc3, const_val, \ | 869 | #define GEN_INT_ARITH_ADD_CONST(name, opc3, const_val, \ |
857 | add_ca, compute_ca, compute_ov) \ | 870 | add_ca, compute_ca, compute_ov) \ |
858 | -GEN_HANDLER(name, 0x1F, 0x0A, opc3, 0x0000F800, PPC_INTEGER) \ | 871 | +GEN_HANDLER(name, 0x1F, 0x0A, opc3, 0x0000F800, PPC_INTEGER); \ |
872 | + \ | ||
873 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
859 | { \ | 874 | { \ |
860 | TCGv t0 = tcg_const_local_tl(const_val); \ | 875 | TCGv t0 = tcg_const_local_tl(const_val); \ |
861 | gen_op_arith_add(ctx, cpu_gpr[rD(ctx->opcode)], \ | 876 | gen_op_arith_add(ctx, cpu_gpr[rD(ctx->opcode)], \ |
@@ -880,7 +895,9 @@ GEN_INT_ARITH_ADD_CONST(addmeo, 0x17, -1LL, 1, 1, 1) | @@ -880,7 +895,9 @@ GEN_INT_ARITH_ADD_CONST(addmeo, 0x17, -1LL, 1, 1, 1) | ||
880 | GEN_INT_ARITH_ADD_CONST(addze, 0x06, 0, 1, 1, 0) | 895 | GEN_INT_ARITH_ADD_CONST(addze, 0x06, 0, 1, 1, 0) |
881 | GEN_INT_ARITH_ADD_CONST(addzeo, 0x16, 0, 1, 1, 1) | 896 | GEN_INT_ARITH_ADD_CONST(addzeo, 0x16, 0, 1, 1, 1) |
882 | /* addi */ | 897 | /* addi */ |
883 | -GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 898 | +GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
899 | + | ||
900 | +static void gen_addi(DisasContext *ctx) | ||
884 | { | 901 | { |
885 | target_long simm = SIMM(ctx->opcode); | 902 | target_long simm = SIMM(ctx->opcode); |
886 | 903 | ||
@@ -913,7 +930,9 @@ static always_inline void gen_op_addic (DisasContext *ctx, TCGv ret, TCGv arg1, | @@ -913,7 +930,9 @@ static always_inline void gen_op_addic (DisasContext *ctx, TCGv ret, TCGv arg1, | ||
913 | gen_set_Rc0(ctx, ret); | 930 | gen_set_Rc0(ctx, ret); |
914 | } | 931 | } |
915 | } | 932 | } |
916 | -GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 933 | +GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
934 | + | ||
935 | +static void gen_addic(DisasContext *ctx) | ||
917 | { | 936 | { |
918 | gen_op_addic(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 0); | 937 | gen_op_addic(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 0); |
919 | } | 938 | } |
@@ -922,7 +941,9 @@ GEN_HANDLER2(addic_, "addic.", 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -922,7 +941,9 @@ GEN_HANDLER2(addic_, "addic.", 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
922 | gen_op_addic(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 1); | 941 | gen_op_addic(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 1); |
923 | } | 942 | } |
924 | /* addis */ | 943 | /* addis */ |
925 | -GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 944 | +GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
945 | + | ||
946 | +static void gen_addis(DisasContext *ctx) | ||
926 | { | 947 | { |
927 | target_long simm = SIMM(ctx->opcode); | 948 | target_long simm = SIMM(ctx->opcode); |
928 | 949 | ||
@@ -976,7 +997,9 @@ static always_inline void gen_op_arith_divw (DisasContext *ctx, TCGv ret, TCGv a | @@ -976,7 +997,9 @@ static always_inline void gen_op_arith_divw (DisasContext *ctx, TCGv ret, TCGv a | ||
976 | } | 997 | } |
977 | /* Div functions */ | 998 | /* Div functions */ |
978 | #define GEN_INT_ARITH_DIVW(name, opc3, sign, compute_ov) \ | 999 | #define GEN_INT_ARITH_DIVW(name, opc3, sign, compute_ov) \ |
979 | -GEN_HANDLER(name, 0x1F, 0x0B, opc3, 0x00000000, PPC_INTEGER) \ | 1000 | +GEN_HANDLER(name, 0x1F, 0x0B, opc3, 0x00000000, PPC_INTEGER); \ |
1001 | + \ | ||
1002 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
980 | { \ | 1003 | { \ |
981 | gen_op_arith_divw(ctx, cpu_gpr[rD(ctx->opcode)], \ | 1004 | gen_op_arith_divw(ctx, cpu_gpr[rD(ctx->opcode)], \ |
982 | cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ | 1005 | cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ |
@@ -1023,7 +1046,9 @@ static always_inline void gen_op_arith_divd (DisasContext *ctx, TCGv ret, TCGv a | @@ -1023,7 +1046,9 @@ static always_inline void gen_op_arith_divd (DisasContext *ctx, TCGv ret, TCGv a | ||
1023 | gen_set_Rc0(ctx, ret); | 1046 | gen_set_Rc0(ctx, ret); |
1024 | } | 1047 | } |
1025 | #define GEN_INT_ARITH_DIVD(name, opc3, sign, compute_ov) \ | 1048 | #define GEN_INT_ARITH_DIVD(name, opc3, sign, compute_ov) \ |
1026 | -GEN_HANDLER(name, 0x1F, 0x09, opc3, 0x00000000, PPC_64B) \ | 1049 | +GEN_HANDLER(name, 0x1F, 0x09, opc3, 0x00000000, PPC_64B); \ |
1050 | + \ | ||
1051 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
1027 | { \ | 1052 | { \ |
1028 | gen_op_arith_divd(ctx, cpu_gpr[rD(ctx->opcode)], \ | 1053 | gen_op_arith_divd(ctx, cpu_gpr[rD(ctx->opcode)], \ |
1029 | cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ | 1054 | cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ |
@@ -1038,7 +1063,9 @@ GEN_INT_ARITH_DIVD(divdo, 0x1F, 1, 1); | @@ -1038,7 +1063,9 @@ GEN_INT_ARITH_DIVD(divdo, 0x1F, 1, 1); | ||
1038 | #endif | 1063 | #endif |
1039 | 1064 | ||
1040 | /* mulhw mulhw. */ | 1065 | /* mulhw mulhw. */ |
1041 | -GEN_HANDLER(mulhw, 0x1F, 0x0B, 0x02, 0x00000400, PPC_INTEGER) | 1066 | +GEN_HANDLER(mulhw, 0x1F, 0x0B, 0x02, 0x00000400, PPC_INTEGER); |
1067 | + | ||
1068 | +static void gen_mulhw(DisasContext *ctx) | ||
1042 | { | 1069 | { |
1043 | TCGv_i64 t0, t1; | 1070 | TCGv_i64 t0, t1; |
1044 | 1071 | ||
@@ -1062,7 +1089,9 @@ GEN_HANDLER(mulhw, 0x1F, 0x0B, 0x02, 0x00000400, PPC_INTEGER) | @@ -1062,7 +1089,9 @@ GEN_HANDLER(mulhw, 0x1F, 0x0B, 0x02, 0x00000400, PPC_INTEGER) | ||
1062 | gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); | 1089 | gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); |
1063 | } | 1090 | } |
1064 | /* mulhwu mulhwu. */ | 1091 | /* mulhwu mulhwu. */ |
1065 | -GEN_HANDLER(mulhwu, 0x1F, 0x0B, 0x00, 0x00000400, PPC_INTEGER) | 1092 | +GEN_HANDLER(mulhwu, 0x1F, 0x0B, 0x00, 0x00000400, PPC_INTEGER); |
1093 | + | ||
1094 | +static void gen_mulhwu(DisasContext *ctx) | ||
1066 | { | 1095 | { |
1067 | TCGv_i64 t0, t1; | 1096 | TCGv_i64 t0, t1; |
1068 | 1097 | ||
@@ -1086,7 +1115,9 @@ GEN_HANDLER(mulhwu, 0x1F, 0x0B, 0x00, 0x00000400, PPC_INTEGER) | @@ -1086,7 +1115,9 @@ GEN_HANDLER(mulhwu, 0x1F, 0x0B, 0x00, 0x00000400, PPC_INTEGER) | ||
1086 | gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); | 1115 | gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); |
1087 | } | 1116 | } |
1088 | /* mullw mullw. */ | 1117 | /* mullw mullw. */ |
1089 | -GEN_HANDLER(mullw, 0x1F, 0x0B, 0x07, 0x00000000, PPC_INTEGER) | 1118 | +GEN_HANDLER(mullw, 0x1F, 0x0B, 0x07, 0x00000000, PPC_INTEGER); |
1119 | + | ||
1120 | +static void gen_mullw(DisasContext *ctx) | ||
1090 | { | 1121 | { |
1091 | tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], | 1122 | tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], |
1092 | cpu_gpr[rB(ctx->opcode)]); | 1123 | cpu_gpr[rB(ctx->opcode)]); |
@@ -1095,7 +1126,9 @@ GEN_HANDLER(mullw, 0x1F, 0x0B, 0x07, 0x00000000, PPC_INTEGER) | @@ -1095,7 +1126,9 @@ GEN_HANDLER(mullw, 0x1F, 0x0B, 0x07, 0x00000000, PPC_INTEGER) | ||
1095 | gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); | 1126 | gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); |
1096 | } | 1127 | } |
1097 | /* mullwo mullwo. */ | 1128 | /* mullwo mullwo. */ |
1098 | -GEN_HANDLER(mullwo, 0x1F, 0x0B, 0x17, 0x00000000, PPC_INTEGER) | 1129 | +GEN_HANDLER(mullwo, 0x1F, 0x0B, 0x17, 0x00000000, PPC_INTEGER); |
1130 | + | ||
1131 | +static void gen_mullwo(DisasContext *ctx) | ||
1099 | { | 1132 | { |
1100 | int l1; | 1133 | int l1; |
1101 | TCGv_i64 t0, t1; | 1134 | TCGv_i64 t0, t1; |
@@ -1129,14 +1162,18 @@ GEN_HANDLER(mullwo, 0x1F, 0x0B, 0x17, 0x00000000, PPC_INTEGER) | @@ -1129,14 +1162,18 @@ GEN_HANDLER(mullwo, 0x1F, 0x0B, 0x17, 0x00000000, PPC_INTEGER) | ||
1129 | gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); | 1162 | gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); |
1130 | } | 1163 | } |
1131 | /* mulli */ | 1164 | /* mulli */ |
1132 | -GEN_HANDLER(mulli, 0x07, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 1165 | +GEN_HANDLER(mulli, 0x07, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
1166 | + | ||
1167 | +static void gen_mulli(DisasContext *ctx) | ||
1133 | { | 1168 | { |
1134 | tcg_gen_muli_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], | 1169 | tcg_gen_muli_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], |
1135 | SIMM(ctx->opcode)); | 1170 | SIMM(ctx->opcode)); |
1136 | } | 1171 | } |
1137 | #if defined(TARGET_PPC64) | 1172 | #if defined(TARGET_PPC64) |
1138 | #define GEN_INT_ARITH_MUL_HELPER(name, opc3) \ | 1173 | #define GEN_INT_ARITH_MUL_HELPER(name, opc3) \ |
1139 | -GEN_HANDLER(name, 0x1F, 0x09, opc3, 0x00000000, PPC_64B) \ | 1174 | +GEN_HANDLER(name, 0x1F, 0x09, opc3, 0x00000000, PPC_64B); \ |
1175 | + \ | ||
1176 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
1140 | { \ | 1177 | { \ |
1141 | gen_helper_##name (cpu_gpr[rD(ctx->opcode)], \ | 1178 | gen_helper_##name (cpu_gpr[rD(ctx->opcode)], \ |
1142 | cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); \ | 1179 | cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); \ |
@@ -1148,7 +1185,9 @@ GEN_INT_ARITH_MUL_HELPER(mulhdu, 0x00); | @@ -1148,7 +1185,9 @@ GEN_INT_ARITH_MUL_HELPER(mulhdu, 0x00); | ||
1148 | /* mulhdu mulhdu. */ | 1185 | /* mulhdu mulhdu. */ |
1149 | GEN_INT_ARITH_MUL_HELPER(mulhd, 0x02); | 1186 | GEN_INT_ARITH_MUL_HELPER(mulhd, 0x02); |
1150 | /* mulld mulld. */ | 1187 | /* mulld mulld. */ |
1151 | -GEN_HANDLER(mulld, 0x1F, 0x09, 0x07, 0x00000000, PPC_64B) | 1188 | +GEN_HANDLER(mulld, 0x1F, 0x09, 0x07, 0x00000000, PPC_64B); |
1189 | + | ||
1190 | +static void gen_mulld(DisasContext *ctx) | ||
1152 | { | 1191 | { |
1153 | tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], | 1192 | tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], |
1154 | cpu_gpr[rB(ctx->opcode)]); | 1193 | cpu_gpr[rB(ctx->opcode)]); |
@@ -1190,11 +1229,15 @@ static always_inline void gen_op_arith_neg (DisasContext *ctx, TCGv ret, TCGv ar | @@ -1190,11 +1229,15 @@ static always_inline void gen_op_arith_neg (DisasContext *ctx, TCGv ret, TCGv ar | ||
1190 | if (unlikely(Rc(ctx->opcode) != 0)) | 1229 | if (unlikely(Rc(ctx->opcode) != 0)) |
1191 | gen_set_Rc0(ctx, ret); | 1230 | gen_set_Rc0(ctx, ret); |
1192 | } | 1231 | } |
1193 | -GEN_HANDLER(neg, 0x1F, 0x08, 0x03, 0x0000F800, PPC_INTEGER) | 1232 | +GEN_HANDLER(neg, 0x1F, 0x08, 0x03, 0x0000F800, PPC_INTEGER); |
1233 | + | ||
1234 | +static void gen_neg(DisasContext *ctx) | ||
1194 | { | 1235 | { |
1195 | gen_op_arith_neg(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 0); | 1236 | gen_op_arith_neg(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 0); |
1196 | } | 1237 | } |
1197 | -GEN_HANDLER(nego, 0x1F, 0x08, 0x13, 0x0000F800, PPC_INTEGER) | 1238 | +GEN_HANDLER(nego, 0x1F, 0x08, 0x13, 0x0000F800, PPC_INTEGER); |
1239 | + | ||
1240 | +static void gen_nego(DisasContext *ctx) | ||
1198 | { | 1241 | { |
1199 | gen_op_arith_neg(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 1); | 1242 | gen_op_arith_neg(ctx, cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 1); |
1200 | } | 1243 | } |
@@ -1256,7 +1299,9 @@ static always_inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv ar | @@ -1256,7 +1299,9 @@ static always_inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv ar | ||
1256 | } | 1299 | } |
1257 | /* Sub functions with Two operands functions */ | 1300 | /* Sub functions with Two operands functions */ |
1258 | #define GEN_INT_ARITH_SUBF(name, opc3, add_ca, compute_ca, compute_ov) \ | 1301 | #define GEN_INT_ARITH_SUBF(name, opc3, add_ca, compute_ca, compute_ov) \ |
1259 | -GEN_HANDLER(name, 0x1F, 0x08, opc3, 0x00000000, PPC_INTEGER) \ | 1302 | +GEN_HANDLER(name, 0x1F, 0x08, opc3, 0x00000000, PPC_INTEGER); \ |
1303 | + \ | ||
1304 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
1260 | { \ | 1305 | { \ |
1261 | gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)], \ | 1306 | gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)], \ |
1262 | cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ | 1307 | cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ |
@@ -1265,7 +1310,9 @@ GEN_HANDLER(name, 0x1F, 0x08, opc3, 0x00000000, PPC_INTEGER) \ | @@ -1265,7 +1310,9 @@ GEN_HANDLER(name, 0x1F, 0x08, opc3, 0x00000000, PPC_INTEGER) \ | ||
1265 | /* Sub functions with one operand and one immediate */ | 1310 | /* Sub functions with one operand and one immediate */ |
1266 | #define GEN_INT_ARITH_SUBF_CONST(name, opc3, const_val, \ | 1311 | #define GEN_INT_ARITH_SUBF_CONST(name, opc3, const_val, \ |
1267 | add_ca, compute_ca, compute_ov) \ | 1312 | add_ca, compute_ca, compute_ov) \ |
1268 | -GEN_HANDLER(name, 0x1F, 0x08, opc3, 0x0000F800, PPC_INTEGER) \ | 1313 | +GEN_HANDLER(name, 0x1F, 0x08, opc3, 0x0000F800, PPC_INTEGER); \ |
1314 | + \ | ||
1315 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
1269 | { \ | 1316 | { \ |
1270 | TCGv t0 = tcg_const_local_tl(const_val); \ | 1317 | TCGv t0 = tcg_const_local_tl(const_val); \ |
1271 | gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)], \ | 1318 | gen_op_arith_subf(ctx, cpu_gpr[rD(ctx->opcode)], \ |
@@ -1289,7 +1336,9 @@ GEN_INT_ARITH_SUBF_CONST(subfmeo, 0x17, -1LL, 1, 1, 1) | @@ -1289,7 +1336,9 @@ GEN_INT_ARITH_SUBF_CONST(subfmeo, 0x17, -1LL, 1, 1, 1) | ||
1289 | GEN_INT_ARITH_SUBF_CONST(subfze, 0x06, 0, 1, 1, 0) | 1336 | GEN_INT_ARITH_SUBF_CONST(subfze, 0x06, 0, 1, 1, 0) |
1290 | GEN_INT_ARITH_SUBF_CONST(subfzeo, 0x16, 0, 1, 1, 1) | 1337 | GEN_INT_ARITH_SUBF_CONST(subfzeo, 0x16, 0, 1, 1, 1) |
1291 | /* subfic */ | 1338 | /* subfic */ |
1292 | -GEN_HANDLER(subfic, 0x08, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 1339 | +GEN_HANDLER(subfic, 0x08, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
1340 | + | ||
1341 | +static void gen_subfic(DisasContext *ctx) | ||
1293 | { | 1342 | { |
1294 | /* Start with XER CA and OV disabled, the most likely case */ | 1343 | /* Start with XER CA and OV disabled, the most likely case */ |
1295 | tcg_gen_andi_tl(cpu_xer, cpu_xer, ~(1 << XER_CA)); | 1344 | tcg_gen_andi_tl(cpu_xer, cpu_xer, ~(1 << XER_CA)); |
@@ -1304,7 +1353,9 @@ GEN_HANDLER(subfic, 0x08, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -1304,7 +1353,9 @@ GEN_HANDLER(subfic, 0x08, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
1304 | 1353 | ||
1305 | /*** Integer logical ***/ | 1354 | /*** Integer logical ***/ |
1306 | #define GEN_LOGICAL2(name, tcg_op, opc, type) \ | 1355 | #define GEN_LOGICAL2(name, tcg_op, opc, type) \ |
1307 | -GEN_HANDLER(name, 0x1F, 0x1C, opc, 0x00000000, type) \ | 1356 | +GEN_HANDLER(name, 0x1F, 0x1C, opc, 0x00000000, type); \ |
1357 | + \ | ||
1358 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
1308 | { \ | 1359 | { \ |
1309 | tcg_op(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], \ | 1360 | tcg_op(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], \ |
1310 | cpu_gpr[rB(ctx->opcode)]); \ | 1361 | cpu_gpr[rB(ctx->opcode)]); \ |
@@ -1313,7 +1364,9 @@ GEN_HANDLER(name, 0x1F, 0x1C, opc, 0x00000000, type) \ | @@ -1313,7 +1364,9 @@ GEN_HANDLER(name, 0x1F, 0x1C, opc, 0x00000000, type) \ | ||
1313 | } | 1364 | } |
1314 | 1365 | ||
1315 | #define GEN_LOGICAL1(name, tcg_op, opc, type) \ | 1366 | #define GEN_LOGICAL1(name, tcg_op, opc, type) \ |
1316 | -GEN_HANDLER(name, 0x1F, 0x1A, opc, 0x00000000, type) \ | 1367 | +GEN_HANDLER(name, 0x1F, 0x1A, opc, 0x00000000, type); \ |
1368 | + \ | ||
1369 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
1317 | { \ | 1370 | { \ |
1318 | tcg_op(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); \ | 1371 | tcg_op(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); \ |
1319 | if (unlikely(Rc(ctx->opcode) != 0)) \ | 1372 | if (unlikely(Rc(ctx->opcode) != 0)) \ |
@@ -1337,7 +1390,9 @@ GEN_HANDLER2(andis_, "andis.", 0x1D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -1337,7 +1390,9 @@ GEN_HANDLER2(andis_, "andis.", 0x1D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
1337 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); | 1390 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); |
1338 | } | 1391 | } |
1339 | /* cntlzw */ | 1392 | /* cntlzw */ |
1340 | -GEN_HANDLER(cntlzw, 0x1F, 0x1A, 0x00, 0x00000000, PPC_INTEGER) | 1393 | +GEN_HANDLER(cntlzw, 0x1F, 0x1A, 0x00, 0x00000000, PPC_INTEGER); |
1394 | + | ||
1395 | +static void gen_cntlzw(DisasContext *ctx) | ||
1341 | { | 1396 | { |
1342 | gen_helper_cntlzw(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); | 1397 | gen_helper_cntlzw(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); |
1343 | if (unlikely(Rc(ctx->opcode) != 0)) | 1398 | if (unlikely(Rc(ctx->opcode) != 0)) |
@@ -1354,7 +1409,9 @@ GEN_LOGICAL2(nand, tcg_gen_nand_tl, 0x0E, PPC_INTEGER); | @@ -1354,7 +1409,9 @@ GEN_LOGICAL2(nand, tcg_gen_nand_tl, 0x0E, PPC_INTEGER); | ||
1354 | /* nor & nor. */ | 1409 | /* nor & nor. */ |
1355 | GEN_LOGICAL2(nor, tcg_gen_nor_tl, 0x03, PPC_INTEGER); | 1410 | GEN_LOGICAL2(nor, tcg_gen_nor_tl, 0x03, PPC_INTEGER); |
1356 | /* or & or. */ | 1411 | /* or & or. */ |
1357 | -GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER) | 1412 | +GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER); |
1413 | + | ||
1414 | +static void gen_or(DisasContext *ctx) | ||
1358 | { | 1415 | { |
1359 | int rs, ra, rb; | 1416 | int rs, ra, rb; |
1360 | 1417 | ||
@@ -1432,7 +1489,9 @@ GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER) | @@ -1432,7 +1489,9 @@ GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER) | ||
1432 | /* orc & orc. */ | 1489 | /* orc & orc. */ |
1433 | GEN_LOGICAL2(orc, tcg_gen_orc_tl, 0x0C, PPC_INTEGER); | 1490 | GEN_LOGICAL2(orc, tcg_gen_orc_tl, 0x0C, PPC_INTEGER); |
1434 | /* xor & xor. */ | 1491 | /* xor & xor. */ |
1435 | -GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER) | 1492 | +GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER); |
1493 | + | ||
1494 | +static void gen_xor(DisasContext *ctx) | ||
1436 | { | 1495 | { |
1437 | /* Optimisation for "set to zero" case */ | 1496 | /* Optimisation for "set to zero" case */ |
1438 | if (rS(ctx->opcode) != rB(ctx->opcode)) | 1497 | if (rS(ctx->opcode) != rB(ctx->opcode)) |
@@ -1443,7 +1502,9 @@ GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER) | @@ -1443,7 +1502,9 @@ GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER) | ||
1443 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); | 1502 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); |
1444 | } | 1503 | } |
1445 | /* ori */ | 1504 | /* ori */ |
1446 | -GEN_HANDLER(ori, 0x18, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 1505 | +GEN_HANDLER(ori, 0x18, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
1506 | + | ||
1507 | +static void gen_ori(DisasContext *ctx) | ||
1447 | { | 1508 | { |
1448 | target_ulong uimm = UIMM(ctx->opcode); | 1509 | target_ulong uimm = UIMM(ctx->opcode); |
1449 | 1510 | ||
@@ -1455,7 +1516,9 @@ GEN_HANDLER(ori, 0x18, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -1455,7 +1516,9 @@ GEN_HANDLER(ori, 0x18, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
1455 | tcg_gen_ori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm); | 1516 | tcg_gen_ori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm); |
1456 | } | 1517 | } |
1457 | /* oris */ | 1518 | /* oris */ |
1458 | -GEN_HANDLER(oris, 0x19, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 1519 | +GEN_HANDLER(oris, 0x19, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
1520 | + | ||
1521 | +static void gen_oris(DisasContext *ctx) | ||
1459 | { | 1522 | { |
1460 | target_ulong uimm = UIMM(ctx->opcode); | 1523 | target_ulong uimm = UIMM(ctx->opcode); |
1461 | 1524 | ||
@@ -1466,7 +1529,9 @@ GEN_HANDLER(oris, 0x19, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -1466,7 +1529,9 @@ GEN_HANDLER(oris, 0x19, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
1466 | tcg_gen_ori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm << 16); | 1529 | tcg_gen_ori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm << 16); |
1467 | } | 1530 | } |
1468 | /* xori */ | 1531 | /* xori */ |
1469 | -GEN_HANDLER(xori, 0x1A, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 1532 | +GEN_HANDLER(xori, 0x1A, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
1533 | + | ||
1534 | +static void gen_xori(DisasContext *ctx) | ||
1470 | { | 1535 | { |
1471 | target_ulong uimm = UIMM(ctx->opcode); | 1536 | target_ulong uimm = UIMM(ctx->opcode); |
1472 | 1537 | ||
@@ -1477,7 +1542,9 @@ GEN_HANDLER(xori, 0x1A, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -1477,7 +1542,9 @@ GEN_HANDLER(xori, 0x1A, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
1477 | tcg_gen_xori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm); | 1542 | tcg_gen_xori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm); |
1478 | } | 1543 | } |
1479 | /* xoris */ | 1544 | /* xoris */ |
1480 | -GEN_HANDLER(xoris, 0x1B, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 1545 | +GEN_HANDLER(xoris, 0x1B, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
1546 | + | ||
1547 | +static void gen_xoris(DisasContext *ctx) | ||
1481 | { | 1548 | { |
1482 | target_ulong uimm = UIMM(ctx->opcode); | 1549 | target_ulong uimm = UIMM(ctx->opcode); |
1483 | 1550 | ||
@@ -1488,7 +1555,9 @@ GEN_HANDLER(xoris, 0x1B, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -1488,7 +1555,9 @@ GEN_HANDLER(xoris, 0x1B, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
1488 | tcg_gen_xori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm << 16); | 1555 | tcg_gen_xori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm << 16); |
1489 | } | 1556 | } |
1490 | /* popcntb : PowerPC 2.03 specification */ | 1557 | /* popcntb : PowerPC 2.03 specification */ |
1491 | -GEN_HANDLER(popcntb, 0x1F, 0x03, 0x03, 0x0000F801, PPC_POPCNTB) | 1558 | +GEN_HANDLER(popcntb, 0x1F, 0x03, 0x03, 0x0000F801, PPC_POPCNTB); |
1559 | + | ||
1560 | +static void gen_popcntb(DisasContext *ctx) | ||
1492 | { | 1561 | { |
1493 | #if defined(TARGET_PPC64) | 1562 | #if defined(TARGET_PPC64) |
1494 | if (ctx->sf_mode) | 1563 | if (ctx->sf_mode) |
@@ -1502,7 +1571,9 @@ GEN_HANDLER(popcntb, 0x1F, 0x03, 0x03, 0x0000F801, PPC_POPCNTB) | @@ -1502,7 +1571,9 @@ GEN_HANDLER(popcntb, 0x1F, 0x03, 0x03, 0x0000F801, PPC_POPCNTB) | ||
1502 | /* extsw & extsw. */ | 1571 | /* extsw & extsw. */ |
1503 | GEN_LOGICAL1(extsw, tcg_gen_ext32s_tl, 0x1E, PPC_64B); | 1572 | GEN_LOGICAL1(extsw, tcg_gen_ext32s_tl, 0x1E, PPC_64B); |
1504 | /* cntlzd */ | 1573 | /* cntlzd */ |
1505 | -GEN_HANDLER(cntlzd, 0x1F, 0x1A, 0x01, 0x00000000, PPC_64B) | 1574 | +GEN_HANDLER(cntlzd, 0x1F, 0x1A, 0x01, 0x00000000, PPC_64B); |
1575 | + | ||
1576 | +static void gen_cntlzd(DisasContext *ctx) | ||
1506 | { | 1577 | { |
1507 | gen_helper_cntlzd(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); | 1578 | gen_helper_cntlzd(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); |
1508 | if (unlikely(Rc(ctx->opcode) != 0)) | 1579 | if (unlikely(Rc(ctx->opcode) != 0)) |
@@ -1512,7 +1583,9 @@ GEN_HANDLER(cntlzd, 0x1F, 0x1A, 0x01, 0x00000000, PPC_64B) | @@ -1512,7 +1583,9 @@ GEN_HANDLER(cntlzd, 0x1F, 0x1A, 0x01, 0x00000000, PPC_64B) | ||
1512 | 1583 | ||
1513 | /*** Integer rotate ***/ | 1584 | /*** Integer rotate ***/ |
1514 | /* rlwimi & rlwimi. */ | 1585 | /* rlwimi & rlwimi. */ |
1515 | -GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 1586 | +GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
1587 | + | ||
1588 | +static void gen_rlwimi(DisasContext *ctx) | ||
1516 | { | 1589 | { |
1517 | uint32_t mb, me, sh; | 1590 | uint32_t mb, me, sh; |
1518 | 1591 | ||
@@ -1550,7 +1623,9 @@ GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -1550,7 +1623,9 @@ GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
1550 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); | 1623 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); |
1551 | } | 1624 | } |
1552 | /* rlwinm & rlwinm. */ | 1625 | /* rlwinm & rlwinm. */ |
1553 | -GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 1626 | +GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
1627 | + | ||
1628 | +static void gen_rlwinm(DisasContext *ctx) | ||
1554 | { | 1629 | { |
1555 | uint32_t mb, me, sh; | 1630 | uint32_t mb, me, sh; |
1556 | 1631 | ||
@@ -1596,7 +1671,9 @@ GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -1596,7 +1671,9 @@ GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
1596 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); | 1671 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); |
1597 | } | 1672 | } |
1598 | /* rlwnm & rlwnm. */ | 1673 | /* rlwnm & rlwnm. */ |
1599 | -GEN_HANDLER(rlwnm, 0x17, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 1674 | +GEN_HANDLER(rlwnm, 0x17, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
1675 | + | ||
1676 | +static void gen_rlwnm(DisasContext *ctx) | ||
1600 | { | 1677 | { |
1601 | uint32_t mb, me; | 1678 | uint32_t mb, me; |
1602 | TCGv t0; | 1679 | TCGv t0; |
@@ -1787,7 +1864,9 @@ GEN_PPC64_R4(rldimi, 0x1E, 0x06); | @@ -1787,7 +1864,9 @@ GEN_PPC64_R4(rldimi, 0x1E, 0x06); | ||
1787 | 1864 | ||
1788 | /*** Integer shift ***/ | 1865 | /*** Integer shift ***/ |
1789 | /* slw & slw. */ | 1866 | /* slw & slw. */ |
1790 | -GEN_HANDLER(slw, 0x1F, 0x18, 0x00, 0x00000000, PPC_INTEGER) | 1867 | +GEN_HANDLER(slw, 0x1F, 0x18, 0x00, 0x00000000, PPC_INTEGER); |
1868 | + | ||
1869 | +static void gen_slw(DisasContext *ctx) | ||
1791 | { | 1870 | { |
1792 | TCGv t0; | 1871 | TCGv t0; |
1793 | int l1, l2; | 1872 | int l1, l2; |
@@ -1808,7 +1887,9 @@ GEN_HANDLER(slw, 0x1F, 0x18, 0x00, 0x00000000, PPC_INTEGER) | @@ -1808,7 +1887,9 @@ GEN_HANDLER(slw, 0x1F, 0x18, 0x00, 0x00000000, PPC_INTEGER) | ||
1808 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); | 1887 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); |
1809 | } | 1888 | } |
1810 | /* sraw & sraw. */ | 1889 | /* sraw & sraw. */ |
1811 | -GEN_HANDLER(sraw, 0x1F, 0x18, 0x18, 0x00000000, PPC_INTEGER) | 1890 | +GEN_HANDLER(sraw, 0x1F, 0x18, 0x18, 0x00000000, PPC_INTEGER); |
1891 | + | ||
1892 | +static void gen_sraw(DisasContext *ctx) | ||
1812 | { | 1893 | { |
1813 | gen_helper_sraw(cpu_gpr[rA(ctx->opcode)], | 1894 | gen_helper_sraw(cpu_gpr[rA(ctx->opcode)], |
1814 | cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); | 1895 | cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); |
@@ -1816,7 +1897,9 @@ GEN_HANDLER(sraw, 0x1F, 0x18, 0x18, 0x00000000, PPC_INTEGER) | @@ -1816,7 +1897,9 @@ GEN_HANDLER(sraw, 0x1F, 0x18, 0x18, 0x00000000, PPC_INTEGER) | ||
1816 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); | 1897 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); |
1817 | } | 1898 | } |
1818 | /* srawi & srawi. */ | 1899 | /* srawi & srawi. */ |
1819 | -GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER) | 1900 | +GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER); |
1901 | + | ||
1902 | +static void gen_srawi(DisasContext *ctx) | ||
1820 | { | 1903 | { |
1821 | int sh = SH(ctx->opcode); | 1904 | int sh = SH(ctx->opcode); |
1822 | if (sh != 0) { | 1905 | if (sh != 0) { |
@@ -1845,7 +1928,9 @@ GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER) | @@ -1845,7 +1928,9 @@ GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER) | ||
1845 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); | 1928 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); |
1846 | } | 1929 | } |
1847 | /* srw & srw. */ | 1930 | /* srw & srw. */ |
1848 | -GEN_HANDLER(srw, 0x1F, 0x18, 0x10, 0x00000000, PPC_INTEGER) | 1931 | +GEN_HANDLER(srw, 0x1F, 0x18, 0x10, 0x00000000, PPC_INTEGER); |
1932 | + | ||
1933 | +static void gen_srw(DisasContext *ctx) | ||
1849 | { | 1934 | { |
1850 | TCGv t0, t1; | 1935 | TCGv t0, t1; |
1851 | int l1, l2; | 1936 | int l1, l2; |
@@ -1869,7 +1954,9 @@ GEN_HANDLER(srw, 0x1F, 0x18, 0x10, 0x00000000, PPC_INTEGER) | @@ -1869,7 +1954,9 @@ GEN_HANDLER(srw, 0x1F, 0x18, 0x10, 0x00000000, PPC_INTEGER) | ||
1869 | } | 1954 | } |
1870 | #if defined(TARGET_PPC64) | 1955 | #if defined(TARGET_PPC64) |
1871 | /* sld & sld. */ | 1956 | /* sld & sld. */ |
1872 | -GEN_HANDLER(sld, 0x1F, 0x1B, 0x00, 0x00000000, PPC_64B) | 1957 | +GEN_HANDLER(sld, 0x1F, 0x1B, 0x00, 0x00000000, PPC_64B); |
1958 | + | ||
1959 | +static void gen_sld(DisasContext *ctx) | ||
1873 | { | 1960 | { |
1874 | TCGv t0; | 1961 | TCGv t0; |
1875 | int l1, l2; | 1962 | int l1, l2; |
@@ -1889,7 +1976,9 @@ GEN_HANDLER(sld, 0x1F, 0x1B, 0x00, 0x00000000, PPC_64B) | @@ -1889,7 +1976,9 @@ GEN_HANDLER(sld, 0x1F, 0x1B, 0x00, 0x00000000, PPC_64B) | ||
1889 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); | 1976 | gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); |
1890 | } | 1977 | } |
1891 | /* srad & srad. */ | 1978 | /* srad & srad. */ |
1892 | -GEN_HANDLER(srad, 0x1F, 0x1A, 0x18, 0x00000000, PPC_64B) | 1979 | +GEN_HANDLER(srad, 0x1F, 0x1A, 0x18, 0x00000000, PPC_64B); |
1980 | + | ||
1981 | +static void gen_srad(DisasContext *ctx) | ||
1893 | { | 1982 | { |
1894 | gen_helper_srad(cpu_gpr[rA(ctx->opcode)], | 1983 | gen_helper_srad(cpu_gpr[rA(ctx->opcode)], |
1895 | cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); | 1984 | cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); |
@@ -1932,7 +2021,9 @@ GEN_HANDLER2(sradi1, "sradi", 0x1F, 0x1B, 0x19, 0x00000000, PPC_64B) | @@ -1932,7 +2021,9 @@ GEN_HANDLER2(sradi1, "sradi", 0x1F, 0x1B, 0x19, 0x00000000, PPC_64B) | ||
1932 | gen_sradi(ctx, 1); | 2021 | gen_sradi(ctx, 1); |
1933 | } | 2022 | } |
1934 | /* srd & srd. */ | 2023 | /* srd & srd. */ |
1935 | -GEN_HANDLER(srd, 0x1F, 0x1B, 0x10, 0x00000000, PPC_64B) | 2024 | +GEN_HANDLER(srd, 0x1F, 0x1B, 0x10, 0x00000000, PPC_64B); |
2025 | + | ||
2026 | +static void gen_srd(DisasContext *ctx) | ||
1936 | { | 2027 | { |
1937 | TCGv t0; | 2028 | TCGv t0; |
1938 | int l1, l2; | 2029 | int l1, l2; |
@@ -1955,7 +2046,9 @@ GEN_HANDLER(srd, 0x1F, 0x1B, 0x10, 0x00000000, PPC_64B) | @@ -1955,7 +2046,9 @@ GEN_HANDLER(srd, 0x1F, 0x1B, 0x10, 0x00000000, PPC_64B) | ||
1955 | 2046 | ||
1956 | /*** Floating-Point arithmetic ***/ | 2047 | /*** Floating-Point arithmetic ***/ |
1957 | #define _GEN_FLOAT_ACB(name, op, op1, op2, isfloat, set_fprf, type) \ | 2048 | #define _GEN_FLOAT_ACB(name, op, op1, op2, isfloat, set_fprf, type) \ |
1958 | -GEN_HANDLER(f##name, op1, op2, 0xFF, 0x00000000, type) \ | 2049 | +GEN_HANDLER(f##name, op1, op2, 0xFF, 0x00000000, type); \ |
2050 | + \ | ||
2051 | +static void gen_f##name(DisasContext *ctx) \ | ||
1959 | { \ | 2052 | { \ |
1960 | if (unlikely(!ctx->fpu_enabled)) { \ | 2053 | if (unlikely(!ctx->fpu_enabled)) { \ |
1961 | gen_exception(ctx, POWERPC_EXCP_FPU); \ | 2054 | gen_exception(ctx, POWERPC_EXCP_FPU); \ |
@@ -1978,7 +2071,9 @@ _GEN_FLOAT_ACB(name, name, 0x3F, op2, 0, set_fprf, type); \ | @@ -1978,7 +2071,9 @@ _GEN_FLOAT_ACB(name, name, 0x3F, op2, 0, set_fprf, type); \ | ||
1978 | _GEN_FLOAT_ACB(name##s, name, 0x3B, op2, 1, set_fprf, type); | 2071 | _GEN_FLOAT_ACB(name##s, name, 0x3B, op2, 1, set_fprf, type); |
1979 | 2072 | ||
1980 | #define _GEN_FLOAT_AB(name, op, op1, op2, inval, isfloat, set_fprf, type) \ | 2073 | #define _GEN_FLOAT_AB(name, op, op1, op2, inval, isfloat, set_fprf, type) \ |
1981 | -GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type) \ | 2074 | +GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type); \ |
2075 | + \ | ||
2076 | +static void gen_f##name(DisasContext *ctx) \ | ||
1982 | { \ | 2077 | { \ |
1983 | if (unlikely(!ctx->fpu_enabled)) { \ | 2078 | if (unlikely(!ctx->fpu_enabled)) { \ |
1984 | gen_exception(ctx, POWERPC_EXCP_FPU); \ | 2079 | gen_exception(ctx, POWERPC_EXCP_FPU); \ |
@@ -2000,7 +2095,9 @@ _GEN_FLOAT_AB(name, name, 0x3F, op2, inval, 0, set_fprf, type); \ | @@ -2000,7 +2095,9 @@ _GEN_FLOAT_AB(name, name, 0x3F, op2, inval, 0, set_fprf, type); \ | ||
2000 | _GEN_FLOAT_AB(name##s, name, 0x3B, op2, inval, 1, set_fprf, type); | 2095 | _GEN_FLOAT_AB(name##s, name, 0x3B, op2, inval, 1, set_fprf, type); |
2001 | 2096 | ||
2002 | #define _GEN_FLOAT_AC(name, op, op1, op2, inval, isfloat, set_fprf, type) \ | 2097 | #define _GEN_FLOAT_AC(name, op, op1, op2, inval, isfloat, set_fprf, type) \ |
2003 | -GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type) \ | 2098 | +GEN_HANDLER(f##name, op1, op2, 0xFF, inval, type); \ |
2099 | + \ | ||
2100 | +static void gen_f##name(DisasContext *ctx) \ | ||
2004 | { \ | 2101 | { \ |
2005 | if (unlikely(!ctx->fpu_enabled)) { \ | 2102 | if (unlikely(!ctx->fpu_enabled)) { \ |
2006 | gen_exception(ctx, POWERPC_EXCP_FPU); \ | 2103 | gen_exception(ctx, POWERPC_EXCP_FPU); \ |
@@ -2022,7 +2119,9 @@ _GEN_FLOAT_AC(name, name, 0x3F, op2, inval, 0, set_fprf, type); \ | @@ -2022,7 +2119,9 @@ _GEN_FLOAT_AC(name, name, 0x3F, op2, inval, 0, set_fprf, type); \ | ||
2022 | _GEN_FLOAT_AC(name##s, name, 0x3B, op2, inval, 1, set_fprf, type); | 2119 | _GEN_FLOAT_AC(name##s, name, 0x3B, op2, inval, 1, set_fprf, type); |
2023 | 2120 | ||
2024 | #define GEN_FLOAT_B(name, op2, op3, set_fprf, type) \ | 2121 | #define GEN_FLOAT_B(name, op2, op3, set_fprf, type) \ |
2025 | -GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type) \ | 2122 | +GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type); \ |
2123 | + \ | ||
2124 | +static void gen_f##name(DisasContext *ctx) \ | ||
2026 | { \ | 2125 | { \ |
2027 | if (unlikely(!ctx->fpu_enabled)) { \ | 2126 | if (unlikely(!ctx->fpu_enabled)) { \ |
2028 | gen_exception(ctx, POWERPC_EXCP_FPU); \ | 2127 | gen_exception(ctx, POWERPC_EXCP_FPU); \ |
@@ -2037,7 +2136,9 @@ GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type) \ | @@ -2037,7 +2136,9 @@ GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type) \ | ||
2037 | } | 2136 | } |
2038 | 2137 | ||
2039 | #define GEN_FLOAT_BS(name, op1, op2, set_fprf, type) \ | 2138 | #define GEN_FLOAT_BS(name, op1, op2, set_fprf, type) \ |
2040 | -GEN_HANDLER(f##name, op1, op2, 0xFF, 0x001F07C0, type) \ | 2139 | +GEN_HANDLER(f##name, op1, op2, 0xFF, 0x001F07C0, type); \ |
2140 | + \ | ||
2141 | +static void gen_f##name(DisasContext *ctx) \ | ||
2041 | { \ | 2142 | { \ |
2042 | if (unlikely(!ctx->fpu_enabled)) { \ | 2143 | if (unlikely(!ctx->fpu_enabled)) { \ |
2043 | gen_exception(ctx, POWERPC_EXCP_FPU); \ | 2144 | gen_exception(ctx, POWERPC_EXCP_FPU); \ |
@@ -2068,7 +2169,9 @@ GEN_FLOAT_BS(res, 0x3B, 0x18, 1, PPC_FLOAT_FRES); | @@ -2068,7 +2169,9 @@ GEN_FLOAT_BS(res, 0x3B, 0x18, 1, PPC_FLOAT_FRES); | ||
2068 | GEN_FLOAT_BS(rsqrte, 0x3F, 0x1A, 1, PPC_FLOAT_FRSQRTE); | 2169 | GEN_FLOAT_BS(rsqrte, 0x3F, 0x1A, 1, PPC_FLOAT_FRSQRTE); |
2069 | 2170 | ||
2070 | /* frsqrtes */ | 2171 | /* frsqrtes */ |
2071 | -GEN_HANDLER(frsqrtes, 0x3B, 0x1A, 0xFF, 0x001F07C0, PPC_FLOAT_FRSQRTES) | 2172 | +GEN_HANDLER(frsqrtes, 0x3B, 0x1A, 0xFF, 0x001F07C0, PPC_FLOAT_FRSQRTES); |
2173 | + | ||
2174 | +static void gen_frsqrtes(DisasContext *ctx) | ||
2072 | { | 2175 | { |
2073 | if (unlikely(!ctx->fpu_enabled)) { | 2176 | if (unlikely(!ctx->fpu_enabled)) { |
2074 | gen_exception(ctx, POWERPC_EXCP_FPU); | 2177 | gen_exception(ctx, POWERPC_EXCP_FPU); |
@@ -2088,7 +2191,9 @@ _GEN_FLOAT_ACB(sel, sel, 0x3F, 0x17, 0, 0, PPC_FLOAT_FSEL); | @@ -2088,7 +2191,9 @@ _GEN_FLOAT_ACB(sel, sel, 0x3F, 0x17, 0, 0, PPC_FLOAT_FSEL); | ||
2088 | GEN_FLOAT_AB(sub, 0x14, 0x000007C0, 1, PPC_FLOAT); | 2191 | GEN_FLOAT_AB(sub, 0x14, 0x000007C0, 1, PPC_FLOAT); |
2089 | /* Optional: */ | 2192 | /* Optional: */ |
2090 | /* fsqrt */ | 2193 | /* fsqrt */ |
2091 | -GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT) | 2194 | +GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT); |
2195 | + | ||
2196 | +static void gen_fsqrt(DisasContext *ctx) | ||
2092 | { | 2197 | { |
2093 | if (unlikely(!ctx->fpu_enabled)) { | 2198 | if (unlikely(!ctx->fpu_enabled)) { |
2094 | gen_exception(ctx, POWERPC_EXCP_FPU); | 2199 | gen_exception(ctx, POWERPC_EXCP_FPU); |
@@ -2101,7 +2206,9 @@ GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT) | @@ -2101,7 +2206,9 @@ GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT) | ||
2101 | gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1, Rc(ctx->opcode) != 0); | 2206 | gen_compute_fprf(cpu_fpr[rD(ctx->opcode)], 1, Rc(ctx->opcode) != 0); |
2102 | } | 2207 | } |
2103 | 2208 | ||
2104 | -GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT) | 2209 | +GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT); |
2210 | + | ||
2211 | +static void gen_fsqrts(DisasContext *ctx) | ||
2105 | { | 2212 | { |
2106 | if (unlikely(!ctx->fpu_enabled)) { | 2213 | if (unlikely(!ctx->fpu_enabled)) { |
2107 | gen_exception(ctx, POWERPC_EXCP_FPU); | 2214 | gen_exception(ctx, POWERPC_EXCP_FPU); |
@@ -2152,7 +2259,9 @@ GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT); | @@ -2152,7 +2259,9 @@ GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT); | ||
2152 | 2259 | ||
2153 | /*** Floating-Point compare ***/ | 2260 | /*** Floating-Point compare ***/ |
2154 | /* fcmpo */ | 2261 | /* fcmpo */ |
2155 | -GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT) | 2262 | +GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT); |
2263 | + | ||
2264 | +static void gen_fcmpo(DisasContext *ctx) | ||
2156 | { | 2265 | { |
2157 | TCGv_i32 crf; | 2266 | TCGv_i32 crf; |
2158 | if (unlikely(!ctx->fpu_enabled)) { | 2267 | if (unlikely(!ctx->fpu_enabled)) { |
@@ -2169,7 +2278,9 @@ GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT) | @@ -2169,7 +2278,9 @@ GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT) | ||
2169 | } | 2278 | } |
2170 | 2279 | ||
2171 | /* fcmpu */ | 2280 | /* fcmpu */ |
2172 | -GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT) | 2281 | +GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT); |
2282 | + | ||
2283 | +static void gen_fcmpu(DisasContext *ctx) | ||
2173 | { | 2284 | { |
2174 | TCGv_i32 crf; | 2285 | TCGv_i32 crf; |
2175 | if (unlikely(!ctx->fpu_enabled)) { | 2286 | if (unlikely(!ctx->fpu_enabled)) { |
@@ -2192,7 +2303,9 @@ GEN_FLOAT_B(abs, 0x08, 0x08, 0, PPC_FLOAT); | @@ -2192,7 +2303,9 @@ GEN_FLOAT_B(abs, 0x08, 0x08, 0, PPC_FLOAT); | ||
2192 | 2303 | ||
2193 | /* fmr - fmr. */ | 2304 | /* fmr - fmr. */ |
2194 | /* XXX: beware that fmr never checks for NaNs nor update FPSCR */ | 2305 | /* XXX: beware that fmr never checks for NaNs nor update FPSCR */ |
2195 | -GEN_HANDLER(fmr, 0x3F, 0x08, 0x02, 0x001F0000, PPC_FLOAT) | 2306 | +GEN_HANDLER(fmr, 0x3F, 0x08, 0x02, 0x001F0000, PPC_FLOAT); |
2307 | + | ||
2308 | +static void gen_fmr(DisasContext *ctx) | ||
2196 | { | 2309 | { |
2197 | if (unlikely(!ctx->fpu_enabled)) { | 2310 | if (unlikely(!ctx->fpu_enabled)) { |
2198 | gen_exception(ctx, POWERPC_EXCP_FPU); | 2311 | gen_exception(ctx, POWERPC_EXCP_FPU); |
@@ -2211,7 +2324,9 @@ GEN_FLOAT_B(neg, 0x08, 0x01, 0, PPC_FLOAT); | @@ -2211,7 +2324,9 @@ GEN_FLOAT_B(neg, 0x08, 0x01, 0, PPC_FLOAT); | ||
2211 | 2324 | ||
2212 | /*** Floating-Point status & ctrl register ***/ | 2325 | /*** Floating-Point status & ctrl register ***/ |
2213 | /* mcrfs */ | 2326 | /* mcrfs */ |
2214 | -GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT) | 2327 | +GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT); |
2328 | + | ||
2329 | +static void gen_mcrfs(DisasContext *ctx) | ||
2215 | { | 2330 | { |
2216 | int bfa; | 2331 | int bfa; |
2217 | 2332 | ||
@@ -2226,7 +2341,9 @@ GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT) | @@ -2226,7 +2341,9 @@ GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT) | ||
2226 | } | 2341 | } |
2227 | 2342 | ||
2228 | /* mffs */ | 2343 | /* mffs */ |
2229 | -GEN_HANDLER(mffs, 0x3F, 0x07, 0x12, 0x001FF800, PPC_FLOAT) | 2344 | +GEN_HANDLER(mffs, 0x3F, 0x07, 0x12, 0x001FF800, PPC_FLOAT); |
2345 | + | ||
2346 | +static void gen_mffs(DisasContext *ctx) | ||
2230 | { | 2347 | { |
2231 | if (unlikely(!ctx->fpu_enabled)) { | 2348 | if (unlikely(!ctx->fpu_enabled)) { |
2232 | gen_exception(ctx, POWERPC_EXCP_FPU); | 2349 | gen_exception(ctx, POWERPC_EXCP_FPU); |
@@ -2238,7 +2355,9 @@ GEN_HANDLER(mffs, 0x3F, 0x07, 0x12, 0x001FF800, PPC_FLOAT) | @@ -2238,7 +2355,9 @@ GEN_HANDLER(mffs, 0x3F, 0x07, 0x12, 0x001FF800, PPC_FLOAT) | ||
2238 | } | 2355 | } |
2239 | 2356 | ||
2240 | /* mtfsb0 */ | 2357 | /* mtfsb0 */ |
2241 | -GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT) | 2358 | +GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT); |
2359 | + | ||
2360 | +static void gen_mtfsb0(DisasContext *ctx) | ||
2242 | { | 2361 | { |
2243 | uint8_t crb; | 2362 | uint8_t crb; |
2244 | 2363 | ||
@@ -2262,7 +2381,9 @@ GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT) | @@ -2262,7 +2381,9 @@ GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT) | ||
2262 | } | 2381 | } |
2263 | 2382 | ||
2264 | /* mtfsb1 */ | 2383 | /* mtfsb1 */ |
2265 | -GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT) | 2384 | +GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT); |
2385 | + | ||
2386 | +static void gen_mtfsb1(DisasContext *ctx) | ||
2266 | { | 2387 | { |
2267 | uint8_t crb; | 2388 | uint8_t crb; |
2268 | 2389 | ||
@@ -2289,7 +2410,9 @@ GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT) | @@ -2289,7 +2410,9 @@ GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT) | ||
2289 | } | 2410 | } |
2290 | 2411 | ||
2291 | /* mtfsf */ | 2412 | /* mtfsf */ |
2292 | -GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x00010000, PPC_FLOAT) | 2413 | +GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x00010000, PPC_FLOAT); |
2414 | + | ||
2415 | +static void gen_mtfsf(DisasContext *ctx) | ||
2293 | { | 2416 | { |
2294 | TCGv_i32 t0; | 2417 | TCGv_i32 t0; |
2295 | int L = ctx->opcode & 0x02000000; | 2418 | int L = ctx->opcode & 0x02000000; |
@@ -2315,7 +2438,9 @@ GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x00010000, PPC_FLOAT) | @@ -2315,7 +2438,9 @@ GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x00010000, PPC_FLOAT) | ||
2315 | } | 2438 | } |
2316 | 2439 | ||
2317 | /* mtfsfi */ | 2440 | /* mtfsfi */ |
2318 | -GEN_HANDLER(mtfsfi, 0x3F, 0x06, 0x04, 0x006f0800, PPC_FLOAT) | 2441 | +GEN_HANDLER(mtfsfi, 0x3F, 0x06, 0x04, 0x006f0800, PPC_FLOAT); |
2442 | + | ||
2443 | +static void gen_mtfsfi(DisasContext *ctx) | ||
2319 | { | 2444 | { |
2320 | int bf, sh; | 2445 | int bf, sh; |
2321 | TCGv_i64 t0; | 2446 | TCGv_i64 t0; |
@@ -2535,7 +2660,9 @@ static always_inline void gen_qemu_st64(DisasContext *ctx, TCGv_i64 arg1, TCGv a | @@ -2535,7 +2660,9 @@ static always_inline void gen_qemu_st64(DisasContext *ctx, TCGv_i64 arg1, TCGv a | ||
2535 | } | 2660 | } |
2536 | 2661 | ||
2537 | #define GEN_LD(name, ldop, opc, type) \ | 2662 | #define GEN_LD(name, ldop, opc, type) \ |
2538 | -GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | 2663 | +GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type); \ |
2664 | + \ | ||
2665 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
2539 | { \ | 2666 | { \ |
2540 | TCGv EA; \ | 2667 | TCGv EA; \ |
2541 | gen_set_access_type(ctx, ACCESS_INT); \ | 2668 | gen_set_access_type(ctx, ACCESS_INT); \ |
@@ -2546,7 +2673,9 @@ GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | @@ -2546,7 +2673,9 @@ GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | ||
2546 | } | 2673 | } |
2547 | 2674 | ||
2548 | #define GEN_LDU(name, ldop, opc, type) \ | 2675 | #define GEN_LDU(name, ldop, opc, type) \ |
2549 | -GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | 2676 | +GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type); \ |
2677 | + \ | ||
2678 | +static void glue(gen_, name##u)(DisasContext *ctx) \ | ||
2550 | { \ | 2679 | { \ |
2551 | TCGv EA; \ | 2680 | TCGv EA; \ |
2552 | if (unlikely(rA(ctx->opcode) == 0 || \ | 2681 | if (unlikely(rA(ctx->opcode) == 0 || \ |
@@ -2566,7 +2695,9 @@ GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | @@ -2566,7 +2695,9 @@ GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | ||
2566 | } | 2695 | } |
2567 | 2696 | ||
2568 | #define GEN_LDUX(name, ldop, opc2, opc3, type) \ | 2697 | #define GEN_LDUX(name, ldop, opc2, opc3, type) \ |
2569 | -GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type) \ | 2698 | +GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type); \ |
2699 | + \ | ||
2700 | +static void glue(gen_, name##ux)(DisasContext *ctx) \ | ||
2570 | { \ | 2701 | { \ |
2571 | TCGv EA; \ | 2702 | TCGv EA; \ |
2572 | if (unlikely(rA(ctx->opcode) == 0 || \ | 2703 | if (unlikely(rA(ctx->opcode) == 0 || \ |
@@ -2583,7 +2714,9 @@ GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type) \ | @@ -2583,7 +2714,9 @@ GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type) \ | ||
2583 | } | 2714 | } |
2584 | 2715 | ||
2585 | #define GEN_LDX(name, ldop, opc2, opc3, type) \ | 2716 | #define GEN_LDX(name, ldop, opc2, opc3, type) \ |
2586 | -GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type) \ | 2717 | +GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type); \ |
2718 | + \ | ||
2719 | +static void glue(gen_, name##x)(DisasContext *ctx) \ | ||
2587 | { \ | 2720 | { \ |
2588 | TCGv EA; \ | 2721 | TCGv EA; \ |
2589 | gen_set_access_type(ctx, ACCESS_INT); \ | 2722 | gen_set_access_type(ctx, ACCESS_INT); \ |
@@ -2616,7 +2749,9 @@ GEN_LDX(lwa, ld32s, 0x15, 0x0A, PPC_64B); | @@ -2616,7 +2749,9 @@ GEN_LDX(lwa, ld32s, 0x15, 0x0A, PPC_64B); | ||
2616 | GEN_LDUX(ld, ld64, 0x15, 0x01, PPC_64B); | 2749 | GEN_LDUX(ld, ld64, 0x15, 0x01, PPC_64B); |
2617 | /* ldx */ | 2750 | /* ldx */ |
2618 | GEN_LDX(ld, ld64, 0x15, 0x00, PPC_64B); | 2751 | GEN_LDX(ld, ld64, 0x15, 0x00, PPC_64B); |
2619 | -GEN_HANDLER(ld, 0x3A, 0xFF, 0xFF, 0x00000000, PPC_64B) | 2752 | +GEN_HANDLER(ld, 0x3A, 0xFF, 0xFF, 0x00000000, PPC_64B); |
2753 | + | ||
2754 | +static void gen_ld(DisasContext *ctx) | ||
2620 | { | 2755 | { |
2621 | TCGv EA; | 2756 | TCGv EA; |
2622 | if (Rc(ctx->opcode)) { | 2757 | if (Rc(ctx->opcode)) { |
@@ -2641,7 +2776,9 @@ GEN_HANDLER(ld, 0x3A, 0xFF, 0xFF, 0x00000000, PPC_64B) | @@ -2641,7 +2776,9 @@ GEN_HANDLER(ld, 0x3A, 0xFF, 0xFF, 0x00000000, PPC_64B) | ||
2641 | tcg_temp_free(EA); | 2776 | tcg_temp_free(EA); |
2642 | } | 2777 | } |
2643 | /* lq */ | 2778 | /* lq */ |
2644 | -GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX) | 2779 | +GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX); |
2780 | + | ||
2781 | +static void gen_lq(DisasContext *ctx) | ||
2645 | { | 2782 | { |
2646 | #if defined(CONFIG_USER_ONLY) | 2783 | #if defined(CONFIG_USER_ONLY) |
2647 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 2784 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -2678,7 +2815,9 @@ GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX) | @@ -2678,7 +2815,9 @@ GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX) | ||
2678 | 2815 | ||
2679 | /*** Integer store ***/ | 2816 | /*** Integer store ***/ |
2680 | #define GEN_ST(name, stop, opc, type) \ | 2817 | #define GEN_ST(name, stop, opc, type) \ |
2681 | -GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | 2818 | +GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type); \ |
2819 | + \ | ||
2820 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
2682 | { \ | 2821 | { \ |
2683 | TCGv EA; \ | 2822 | TCGv EA; \ |
2684 | gen_set_access_type(ctx, ACCESS_INT); \ | 2823 | gen_set_access_type(ctx, ACCESS_INT); \ |
@@ -2689,7 +2828,9 @@ GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | @@ -2689,7 +2828,9 @@ GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | ||
2689 | } | 2828 | } |
2690 | 2829 | ||
2691 | #define GEN_STU(name, stop, opc, type) \ | 2830 | #define GEN_STU(name, stop, opc, type) \ |
2692 | -GEN_HANDLER(stop##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | 2831 | +GEN_HANDLER(stop##u, opc, 0xFF, 0xFF, 0x00000000, type); \ |
2832 | + \ | ||
2833 | +static void glue(gen_, stop##u)(DisasContext *ctx) \ | ||
2693 | { \ | 2834 | { \ |
2694 | TCGv EA; \ | 2835 | TCGv EA; \ |
2695 | if (unlikely(rA(ctx->opcode) == 0)) { \ | 2836 | if (unlikely(rA(ctx->opcode) == 0)) { \ |
@@ -2708,7 +2849,9 @@ GEN_HANDLER(stop##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | @@ -2708,7 +2849,9 @@ GEN_HANDLER(stop##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | ||
2708 | } | 2849 | } |
2709 | 2850 | ||
2710 | #define GEN_STUX(name, stop, opc2, opc3, type) \ | 2851 | #define GEN_STUX(name, stop, opc2, opc3, type) \ |
2711 | -GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type) \ | 2852 | +GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type); \ |
2853 | + \ | ||
2854 | +static void glue(gen_, name##ux)(DisasContext *ctx) \ | ||
2712 | { \ | 2855 | { \ |
2713 | TCGv EA; \ | 2856 | TCGv EA; \ |
2714 | if (unlikely(rA(ctx->opcode) == 0)) { \ | 2857 | if (unlikely(rA(ctx->opcode) == 0)) { \ |
@@ -2724,7 +2867,9 @@ GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type) \ | @@ -2724,7 +2867,9 @@ GEN_HANDLER(name##ux, 0x1F, opc2, opc3, 0x00000001, type) \ | ||
2724 | } | 2867 | } |
2725 | 2868 | ||
2726 | #define GEN_STX(name, stop, opc2, opc3, type) \ | 2869 | #define GEN_STX(name, stop, opc2, opc3, type) \ |
2727 | -GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type) \ | 2870 | +GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type); \ |
2871 | + \ | ||
2872 | +static void glue(gen_, name##x)(DisasContext *ctx) \ | ||
2728 | { \ | 2873 | { \ |
2729 | TCGv EA; \ | 2874 | TCGv EA; \ |
2730 | gen_set_access_type(ctx, ACCESS_INT); \ | 2875 | gen_set_access_type(ctx, ACCESS_INT); \ |
@@ -2749,7 +2894,9 @@ GEN_STS(stw, st32, 0x04, PPC_INTEGER); | @@ -2749,7 +2894,9 @@ GEN_STS(stw, st32, 0x04, PPC_INTEGER); | ||
2749 | #if defined(TARGET_PPC64) | 2894 | #if defined(TARGET_PPC64) |
2750 | GEN_STUX(std, st64, 0x15, 0x05, PPC_64B); | 2895 | GEN_STUX(std, st64, 0x15, 0x05, PPC_64B); |
2751 | GEN_STX(std, st64, 0x15, 0x04, PPC_64B); | 2896 | GEN_STX(std, st64, 0x15, 0x04, PPC_64B); |
2752 | -GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000000, PPC_64B) | 2897 | +GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000000, PPC_64B); |
2898 | + | ||
2899 | +static void gen_std(DisasContext *ctx) | ||
2753 | { | 2900 | { |
2754 | int rs; | 2901 | int rs; |
2755 | TCGv EA; | 2902 | TCGv EA; |
@@ -2852,7 +2999,9 @@ GEN_STX(stwbr, st32r, 0x16, 0x14, PPC_INTEGER); | @@ -2852,7 +2999,9 @@ GEN_STX(stwbr, st32r, 0x16, 0x14, PPC_INTEGER); | ||
2852 | 2999 | ||
2853 | /*** Integer load and store multiple ***/ | 3000 | /*** Integer load and store multiple ***/ |
2854 | /* lmw */ | 3001 | /* lmw */ |
2855 | -GEN_HANDLER(lmw, 0x2E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 3002 | +GEN_HANDLER(lmw, 0x2E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
3003 | + | ||
3004 | +static void gen_lmw(DisasContext *ctx) | ||
2856 | { | 3005 | { |
2857 | TCGv t0; | 3006 | TCGv t0; |
2858 | TCGv_i32 t1; | 3007 | TCGv_i32 t1; |
@@ -2868,7 +3017,9 @@ GEN_HANDLER(lmw, 0x2E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -2868,7 +3017,9 @@ GEN_HANDLER(lmw, 0x2E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
2868 | } | 3017 | } |
2869 | 3018 | ||
2870 | /* stmw */ | 3019 | /* stmw */ |
2871 | -GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | 3020 | +GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER); |
3021 | + | ||
3022 | +static void gen_stmw(DisasContext *ctx) | ||
2872 | { | 3023 | { |
2873 | TCGv t0; | 3024 | TCGv t0; |
2874 | TCGv_i32 t1; | 3025 | TCGv_i32 t1; |
@@ -2890,7 +3041,9 @@ GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | @@ -2890,7 +3041,9 @@ GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) | ||
2890 | * In an other hand, IBM says this is valid, but rA won't be loaded. | 3041 | * In an other hand, IBM says this is valid, but rA won't be loaded. |
2891 | * For now, I'll follow the spec... | 3042 | * For now, I'll follow the spec... |
2892 | */ | 3043 | */ |
2893 | -GEN_HANDLER(lswi, 0x1F, 0x15, 0x12, 0x00000001, PPC_STRING) | 3044 | +GEN_HANDLER(lswi, 0x1F, 0x15, 0x12, 0x00000001, PPC_STRING); |
3045 | + | ||
3046 | +static void gen_lswi(DisasContext *ctx) | ||
2894 | { | 3047 | { |
2895 | TCGv t0; | 3048 | TCGv t0; |
2896 | TCGv_i32 t1, t2; | 3049 | TCGv_i32 t1, t2; |
@@ -2922,7 +3075,9 @@ GEN_HANDLER(lswi, 0x1F, 0x15, 0x12, 0x00000001, PPC_STRING) | @@ -2922,7 +3075,9 @@ GEN_HANDLER(lswi, 0x1F, 0x15, 0x12, 0x00000001, PPC_STRING) | ||
2922 | } | 3075 | } |
2923 | 3076 | ||
2924 | /* lswx */ | 3077 | /* lswx */ |
2925 | -GEN_HANDLER(lswx, 0x1F, 0x15, 0x10, 0x00000001, PPC_STRING) | 3078 | +GEN_HANDLER(lswx, 0x1F, 0x15, 0x10, 0x00000001, PPC_STRING); |
3079 | + | ||
3080 | +static void gen_lswx(DisasContext *ctx) | ||
2926 | { | 3081 | { |
2927 | TCGv t0; | 3082 | TCGv t0; |
2928 | TCGv_i32 t1, t2, t3; | 3083 | TCGv_i32 t1, t2, t3; |
@@ -2942,7 +3097,9 @@ GEN_HANDLER(lswx, 0x1F, 0x15, 0x10, 0x00000001, PPC_STRING) | @@ -2942,7 +3097,9 @@ GEN_HANDLER(lswx, 0x1F, 0x15, 0x10, 0x00000001, PPC_STRING) | ||
2942 | } | 3097 | } |
2943 | 3098 | ||
2944 | /* stswi */ | 3099 | /* stswi */ |
2945 | -GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, 0x00000001, PPC_STRING) | 3100 | +GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, 0x00000001, PPC_STRING); |
3101 | + | ||
3102 | +static void gen_stswi(DisasContext *ctx) | ||
2946 | { | 3103 | { |
2947 | TCGv t0; | 3104 | TCGv t0; |
2948 | TCGv_i32 t1, t2; | 3105 | TCGv_i32 t1, t2; |
@@ -2963,7 +3120,9 @@ GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, 0x00000001, PPC_STRING) | @@ -2963,7 +3120,9 @@ GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, 0x00000001, PPC_STRING) | ||
2963 | } | 3120 | } |
2964 | 3121 | ||
2965 | /* stswx */ | 3122 | /* stswx */ |
2966 | -GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_STRING) | 3123 | +GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_STRING); |
3124 | + | ||
3125 | +static void gen_stswx(DisasContext *ctx) | ||
2967 | { | 3126 | { |
2968 | TCGv t0; | 3127 | TCGv t0; |
2969 | TCGv_i32 t1, t2; | 3128 | TCGv_i32 t1, t2; |
@@ -2984,18 +3143,24 @@ GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_STRING) | @@ -2984,18 +3143,24 @@ GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_STRING) | ||
2984 | 3143 | ||
2985 | /*** Memory synchronisation ***/ | 3144 | /*** Memory synchronisation ***/ |
2986 | /* eieio */ | 3145 | /* eieio */ |
2987 | -GEN_HANDLER(eieio, 0x1F, 0x16, 0x1A, 0x03FFF801, PPC_MEM_EIEIO) | 3146 | +GEN_HANDLER(eieio, 0x1F, 0x16, 0x1A, 0x03FFF801, PPC_MEM_EIEIO); |
3147 | + | ||
3148 | +static void gen_eieio(DisasContext *ctx) | ||
2988 | { | 3149 | { |
2989 | } | 3150 | } |
2990 | 3151 | ||
2991 | /* isync */ | 3152 | /* isync */ |
2992 | -GEN_HANDLER(isync, 0x13, 0x16, 0x04, 0x03FFF801, PPC_MEM) | 3153 | +GEN_HANDLER(isync, 0x13, 0x16, 0x04, 0x03FFF801, PPC_MEM); |
3154 | + | ||
3155 | +static void gen_isync(DisasContext *ctx) | ||
2993 | { | 3156 | { |
2994 | gen_stop_exception(ctx); | 3157 | gen_stop_exception(ctx); |
2995 | } | 3158 | } |
2996 | 3159 | ||
2997 | /* lwarx */ | 3160 | /* lwarx */ |
2998 | -GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000001, PPC_RES) | 3161 | +GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000001, PPC_RES); |
3162 | + | ||
3163 | +static void gen_lwarx(DisasContext *ctx) | ||
2999 | { | 3164 | { |
3000 | TCGv t0; | 3165 | TCGv t0; |
3001 | gen_set_access_type(ctx, ACCESS_RES); | 3166 | gen_set_access_type(ctx, ACCESS_RES); |
@@ -3030,7 +3195,9 @@ GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES) | @@ -3030,7 +3195,9 @@ GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES) | ||
3030 | 3195 | ||
3031 | #if defined(TARGET_PPC64) | 3196 | #if defined(TARGET_PPC64) |
3032 | /* ldarx */ | 3197 | /* ldarx */ |
3033 | -GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000001, PPC_64B) | 3198 | +GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000001, PPC_64B); |
3199 | + | ||
3200 | +static void gen_ldarx(DisasContext *ctx) | ||
3034 | { | 3201 | { |
3035 | TCGv t0; | 3202 | TCGv t0; |
3036 | gen_set_access_type(ctx, ACCESS_RES); | 3203 | gen_set_access_type(ctx, ACCESS_RES); |
@@ -3065,12 +3232,16 @@ GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B) | @@ -3065,12 +3232,16 @@ GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B) | ||
3065 | #endif /* defined(TARGET_PPC64) */ | 3232 | #endif /* defined(TARGET_PPC64) */ |
3066 | 3233 | ||
3067 | /* sync */ | 3234 | /* sync */ |
3068 | -GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x039FF801, PPC_MEM_SYNC) | 3235 | +GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x039FF801, PPC_MEM_SYNC); |
3236 | + | ||
3237 | +static void gen_sync(DisasContext *ctx) | ||
3069 | { | 3238 | { |
3070 | } | 3239 | } |
3071 | 3240 | ||
3072 | /* wait */ | 3241 | /* wait */ |
3073 | -GEN_HANDLER(wait, 0x1F, 0x1E, 0x01, 0x03FFF801, PPC_WAIT) | 3242 | +GEN_HANDLER(wait, 0x1F, 0x1E, 0x01, 0x03FFF801, PPC_WAIT); |
3243 | + | ||
3244 | +static void gen_wait(DisasContext *ctx) | ||
3074 | { | 3245 | { |
3075 | TCGv_i32 t0 = tcg_temp_new_i32(); | 3246 | TCGv_i32 t0 = tcg_temp_new_i32(); |
3076 | tcg_gen_st_i32(t0, cpu_env, offsetof(CPUState, halted)); | 3247 | tcg_gen_st_i32(t0, cpu_env, offsetof(CPUState, halted)); |
@@ -3081,7 +3252,9 @@ GEN_HANDLER(wait, 0x1F, 0x1E, 0x01, 0x03FFF801, PPC_WAIT) | @@ -3081,7 +3252,9 @@ GEN_HANDLER(wait, 0x1F, 0x1E, 0x01, 0x03FFF801, PPC_WAIT) | ||
3081 | 3252 | ||
3082 | /*** Floating-point load ***/ | 3253 | /*** Floating-point load ***/ |
3083 | #define GEN_LDF(name, ldop, opc, type) \ | 3254 | #define GEN_LDF(name, ldop, opc, type) \ |
3084 | -GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | 3255 | +GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type); \ |
3256 | + \ | ||
3257 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
3085 | { \ | 3258 | { \ |
3086 | TCGv EA; \ | 3259 | TCGv EA; \ |
3087 | if (unlikely(!ctx->fpu_enabled)) { \ | 3260 | if (unlikely(!ctx->fpu_enabled)) { \ |
@@ -3096,7 +3269,9 @@ GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | @@ -3096,7 +3269,9 @@ GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | ||
3096 | } | 3269 | } |
3097 | 3270 | ||
3098 | #define GEN_LDUF(name, ldop, opc, type) \ | 3271 | #define GEN_LDUF(name, ldop, opc, type) \ |
3099 | -GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | 3272 | +GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type); \ |
3273 | + \ | ||
3274 | +static void glue(gen_, name##u)(DisasContext *ctx) \ | ||
3100 | { \ | 3275 | { \ |
3101 | TCGv EA; \ | 3276 | TCGv EA; \ |
3102 | if (unlikely(!ctx->fpu_enabled)) { \ | 3277 | if (unlikely(!ctx->fpu_enabled)) { \ |
@@ -3116,7 +3291,9 @@ GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | @@ -3116,7 +3291,9 @@ GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | ||
3116 | } | 3291 | } |
3117 | 3292 | ||
3118 | #define GEN_LDUXF(name, ldop, opc, type) \ | 3293 | #define GEN_LDUXF(name, ldop, opc, type) \ |
3119 | -GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type) \ | 3294 | +GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type); \ |
3295 | + \ | ||
3296 | +static void glue(gen_, name##ux)(DisasContext *ctx) \ | ||
3120 | { \ | 3297 | { \ |
3121 | TCGv EA; \ | 3298 | TCGv EA; \ |
3122 | if (unlikely(!ctx->fpu_enabled)) { \ | 3299 | if (unlikely(!ctx->fpu_enabled)) { \ |
@@ -3136,7 +3313,9 @@ GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type) \ | @@ -3136,7 +3313,9 @@ GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type) \ | ||
3136 | } | 3313 | } |
3137 | 3314 | ||
3138 | #define GEN_LDXF(name, ldop, opc2, opc3, type) \ | 3315 | #define GEN_LDXF(name, ldop, opc2, opc3, type) \ |
3139 | -GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type) \ | 3316 | +GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type); \ |
3317 | + \ | ||
3318 | +static void glue(gen_, name##x)(DisasContext *ctx) \ | ||
3140 | { \ | 3319 | { \ |
3141 | TCGv EA; \ | 3320 | TCGv EA; \ |
3142 | if (unlikely(!ctx->fpu_enabled)) { \ | 3321 | if (unlikely(!ctx->fpu_enabled)) { \ |
@@ -3174,7 +3353,9 @@ GEN_LDFS(lfs, ld32fs, 0x10, PPC_FLOAT); | @@ -3174,7 +3353,9 @@ GEN_LDFS(lfs, ld32fs, 0x10, PPC_FLOAT); | ||
3174 | 3353 | ||
3175 | /*** Floating-point store ***/ | 3354 | /*** Floating-point store ***/ |
3176 | #define GEN_STF(name, stop, opc, type) \ | 3355 | #define GEN_STF(name, stop, opc, type) \ |
3177 | -GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | 3356 | +GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type); \ |
3357 | + \ | ||
3358 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
3178 | { \ | 3359 | { \ |
3179 | TCGv EA; \ | 3360 | TCGv EA; \ |
3180 | if (unlikely(!ctx->fpu_enabled)) { \ | 3361 | if (unlikely(!ctx->fpu_enabled)) { \ |
@@ -3189,7 +3370,9 @@ GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | @@ -3189,7 +3370,9 @@ GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type) \ | ||
3189 | } | 3370 | } |
3190 | 3371 | ||
3191 | #define GEN_STUF(name, stop, opc, type) \ | 3372 | #define GEN_STUF(name, stop, opc, type) \ |
3192 | -GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | 3373 | +GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type); \ |
3374 | + \ | ||
3375 | +static void glue(gen_, name##u)(DisasContext *ctx) \ | ||
3193 | { \ | 3376 | { \ |
3194 | TCGv EA; \ | 3377 | TCGv EA; \ |
3195 | if (unlikely(!ctx->fpu_enabled)) { \ | 3378 | if (unlikely(!ctx->fpu_enabled)) { \ |
@@ -3209,7 +3392,9 @@ GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | @@ -3209,7 +3392,9 @@ GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type) \ | ||
3209 | } | 3392 | } |
3210 | 3393 | ||
3211 | #define GEN_STUXF(name, stop, opc, type) \ | 3394 | #define GEN_STUXF(name, stop, opc, type) \ |
3212 | -GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type) \ | 3395 | +GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type); \ |
3396 | + \ | ||
3397 | +static void glue(gen_, name##ux)(DisasContext *ctx) \ | ||
3213 | { \ | 3398 | { \ |
3214 | TCGv EA; \ | 3399 | TCGv EA; \ |
3215 | if (unlikely(!ctx->fpu_enabled)) { \ | 3400 | if (unlikely(!ctx->fpu_enabled)) { \ |
@@ -3229,7 +3414,9 @@ GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type) \ | @@ -3229,7 +3414,9 @@ GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type) \ | ||
3229 | } | 3414 | } |
3230 | 3415 | ||
3231 | #define GEN_STXF(name, stop, opc2, opc3, type) \ | 3416 | #define GEN_STXF(name, stop, opc2, opc3, type) \ |
3232 | -GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type) \ | 3417 | +GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type); \ |
3418 | + \ | ||
3419 | +static void glue(gen_, name##x)(DisasContext *ctx) \ | ||
3233 | { \ | 3420 | { \ |
3234 | TCGv EA; \ | 3421 | TCGv EA; \ |
3235 | if (unlikely(!ctx->fpu_enabled)) { \ | 3422 | if (unlikely(!ctx->fpu_enabled)) { \ |
@@ -3321,7 +3508,9 @@ static always_inline void gen_setlr (DisasContext *ctx, target_ulong nip) | @@ -3321,7 +3508,9 @@ static always_inline void gen_setlr (DisasContext *ctx, target_ulong nip) | ||
3321 | } | 3508 | } |
3322 | 3509 | ||
3323 | /* b ba bl bla */ | 3510 | /* b ba bl bla */ |
3324 | -GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000000, PPC_FLOW) | 3511 | +GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000000, PPC_FLOW); |
3512 | + | ||
3513 | +static void gen_b(DisasContext *ctx) | ||
3325 | { | 3514 | { |
3326 | target_ulong li, target; | 3515 | target_ulong li, target; |
3327 | 3516 | ||
@@ -3427,24 +3616,32 @@ static always_inline void gen_bcond (DisasContext *ctx, int type) | @@ -3427,24 +3616,32 @@ static always_inline void gen_bcond (DisasContext *ctx, int type) | ||
3427 | } | 3616 | } |
3428 | } | 3617 | } |
3429 | 3618 | ||
3430 | -GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW) | 3619 | +GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW); |
3620 | + | ||
3621 | +static void gen_bc(DisasContext *ctx) | ||
3431 | { | 3622 | { |
3432 | gen_bcond(ctx, BCOND_IM); | 3623 | gen_bcond(ctx, BCOND_IM); |
3433 | } | 3624 | } |
3434 | 3625 | ||
3435 | -GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW) | 3626 | +GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW); |
3627 | + | ||
3628 | +static void gen_bcctr(DisasContext *ctx) | ||
3436 | { | 3629 | { |
3437 | gen_bcond(ctx, BCOND_CTR); | 3630 | gen_bcond(ctx, BCOND_CTR); |
3438 | } | 3631 | } |
3439 | 3632 | ||
3440 | -GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW) | 3633 | +GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW); |
3634 | + | ||
3635 | +static void gen_bclr(DisasContext *ctx) | ||
3441 | { | 3636 | { |
3442 | gen_bcond(ctx, BCOND_LR); | 3637 | gen_bcond(ctx, BCOND_LR); |
3443 | } | 3638 | } |
3444 | 3639 | ||
3445 | /*** Condition register logical ***/ | 3640 | /*** Condition register logical ***/ |
3446 | #define GEN_CRLOGIC(name, tcg_op, opc) \ | 3641 | #define GEN_CRLOGIC(name, tcg_op, opc) \ |
3447 | -GEN_HANDLER(name, 0x13, 0x01, opc, 0x00000001, PPC_INTEGER) \ | 3642 | +GEN_HANDLER(name, 0x13, 0x01, opc, 0x00000001, PPC_INTEGER); \ |
3643 | + \ | ||
3644 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
3448 | { \ | 3645 | { \ |
3449 | uint8_t bitmask; \ | 3646 | uint8_t bitmask; \ |
3450 | int sh; \ | 3647 | int sh; \ |
@@ -3491,14 +3688,18 @@ GEN_CRLOGIC(crorc, tcg_gen_orc_i32, 0x0D); | @@ -3491,14 +3688,18 @@ GEN_CRLOGIC(crorc, tcg_gen_orc_i32, 0x0D); | ||
3491 | /* crxor */ | 3688 | /* crxor */ |
3492 | GEN_CRLOGIC(crxor, tcg_gen_xor_i32, 0x06); | 3689 | GEN_CRLOGIC(crxor, tcg_gen_xor_i32, 0x06); |
3493 | /* mcrf */ | 3690 | /* mcrf */ |
3494 | -GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001, PPC_INTEGER) | 3691 | +GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001, PPC_INTEGER); |
3692 | + | ||
3693 | +static void gen_mcrf(DisasContext *ctx) | ||
3495 | { | 3694 | { |
3496 | tcg_gen_mov_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfS(ctx->opcode)]); | 3695 | tcg_gen_mov_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfS(ctx->opcode)]); |
3497 | } | 3696 | } |
3498 | 3697 | ||
3499 | /*** System linkage ***/ | 3698 | /*** System linkage ***/ |
3500 | /* rfi (mem_idx only) */ | 3699 | /* rfi (mem_idx only) */ |
3501 | -GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW) | 3700 | +GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW); |
3701 | + | ||
3702 | +static void gen_rfi(DisasContext *ctx) | ||
3502 | { | 3703 | { |
3503 | #if defined(CONFIG_USER_ONLY) | 3704 | #if defined(CONFIG_USER_ONLY) |
3504 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 3705 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -3514,7 +3715,9 @@ GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW) | @@ -3514,7 +3715,9 @@ GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW) | ||
3514 | } | 3715 | } |
3515 | 3716 | ||
3516 | #if defined(TARGET_PPC64) | 3717 | #if defined(TARGET_PPC64) |
3517 | -GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B) | 3718 | +GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B); |
3719 | + | ||
3720 | +static void gen_rfid(DisasContext *ctx) | ||
3518 | { | 3721 | { |
3519 | #if defined(CONFIG_USER_ONLY) | 3722 | #if defined(CONFIG_USER_ONLY) |
3520 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 3723 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -3529,7 +3732,9 @@ GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B) | @@ -3529,7 +3732,9 @@ GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B) | ||
3529 | #endif | 3732 | #endif |
3530 | } | 3733 | } |
3531 | 3734 | ||
3532 | -GEN_HANDLER(hrfid, 0x13, 0x12, 0x08, 0x03FF8001, PPC_64H) | 3735 | +GEN_HANDLER(hrfid, 0x13, 0x12, 0x08, 0x03FF8001, PPC_64H); |
3736 | + | ||
3737 | +static void gen_hrfid(DisasContext *ctx) | ||
3533 | { | 3738 | { |
3534 | #if defined(CONFIG_USER_ONLY) | 3739 | #if defined(CONFIG_USER_ONLY) |
3535 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 3740 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -3551,7 +3756,9 @@ GEN_HANDLER(hrfid, 0x13, 0x12, 0x08, 0x03FF8001, PPC_64H) | @@ -3551,7 +3756,9 @@ GEN_HANDLER(hrfid, 0x13, 0x12, 0x08, 0x03FF8001, PPC_64H) | ||
3551 | #else | 3756 | #else |
3552 | #define POWERPC_SYSCALL POWERPC_EXCP_SYSCALL | 3757 | #define POWERPC_SYSCALL POWERPC_EXCP_SYSCALL |
3553 | #endif | 3758 | #endif |
3554 | -GEN_HANDLER(sc, 0x11, 0xFF, 0xFF, 0x03FFF01D, PPC_FLOW) | 3759 | +GEN_HANDLER(sc, 0x11, 0xFF, 0xFF, 0x03FFF01D, PPC_FLOW); |
3760 | + | ||
3761 | +static void gen_sc(DisasContext *ctx) | ||
3555 | { | 3762 | { |
3556 | uint32_t lev; | 3763 | uint32_t lev; |
3557 | 3764 | ||
@@ -3561,7 +3768,9 @@ GEN_HANDLER(sc, 0x11, 0xFF, 0xFF, 0x03FFF01D, PPC_FLOW) | @@ -3561,7 +3768,9 @@ GEN_HANDLER(sc, 0x11, 0xFF, 0xFF, 0x03FFF01D, PPC_FLOW) | ||
3561 | 3768 | ||
3562 | /*** Trap ***/ | 3769 | /*** Trap ***/ |
3563 | /* tw */ | 3770 | /* tw */ |
3564 | -GEN_HANDLER(tw, 0x1F, 0x04, 0x00, 0x00000001, PPC_FLOW) | 3771 | +GEN_HANDLER(tw, 0x1F, 0x04, 0x00, 0x00000001, PPC_FLOW); |
3772 | + | ||
3773 | +static void gen_tw(DisasContext *ctx) | ||
3565 | { | 3774 | { |
3566 | TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); | 3775 | TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); |
3567 | /* Update the nip since this might generate a trap exception */ | 3776 | /* Update the nip since this might generate a trap exception */ |
@@ -3571,7 +3780,9 @@ GEN_HANDLER(tw, 0x1F, 0x04, 0x00, 0x00000001, PPC_FLOW) | @@ -3571,7 +3780,9 @@ GEN_HANDLER(tw, 0x1F, 0x04, 0x00, 0x00000001, PPC_FLOW) | ||
3571 | } | 3780 | } |
3572 | 3781 | ||
3573 | /* twi */ | 3782 | /* twi */ |
3574 | -GEN_HANDLER(twi, 0x03, 0xFF, 0xFF, 0x00000000, PPC_FLOW) | 3783 | +GEN_HANDLER(twi, 0x03, 0xFF, 0xFF, 0x00000000, PPC_FLOW); |
3784 | + | ||
3785 | +static void gen_twi(DisasContext *ctx) | ||
3575 | { | 3786 | { |
3576 | TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); | 3787 | TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); |
3577 | TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); | 3788 | TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); |
@@ -3584,7 +3795,9 @@ GEN_HANDLER(twi, 0x03, 0xFF, 0xFF, 0x00000000, PPC_FLOW) | @@ -3584,7 +3795,9 @@ GEN_HANDLER(twi, 0x03, 0xFF, 0xFF, 0x00000000, PPC_FLOW) | ||
3584 | 3795 | ||
3585 | #if defined(TARGET_PPC64) | 3796 | #if defined(TARGET_PPC64) |
3586 | /* td */ | 3797 | /* td */ |
3587 | -GEN_HANDLER(td, 0x1F, 0x04, 0x02, 0x00000001, PPC_64B) | 3798 | +GEN_HANDLER(td, 0x1F, 0x04, 0x02, 0x00000001, PPC_64B); |
3799 | + | ||
3800 | +static void gen_td(DisasContext *ctx) | ||
3588 | { | 3801 | { |
3589 | TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); | 3802 | TCGv_i32 t0 = tcg_const_i32(TO(ctx->opcode)); |
3590 | /* Update the nip since this might generate a trap exception */ | 3803 | /* Update the nip since this might generate a trap exception */ |
@@ -3594,7 +3807,9 @@ GEN_HANDLER(td, 0x1F, 0x04, 0x02, 0x00000001, PPC_64B) | @@ -3594,7 +3807,9 @@ GEN_HANDLER(td, 0x1F, 0x04, 0x02, 0x00000001, PPC_64B) | ||
3594 | } | 3807 | } |
3595 | 3808 | ||
3596 | /* tdi */ | 3809 | /* tdi */ |
3597 | -GEN_HANDLER(tdi, 0x02, 0xFF, 0xFF, 0x00000000, PPC_64B) | 3810 | +GEN_HANDLER(tdi, 0x02, 0xFF, 0xFF, 0x00000000, PPC_64B); |
3811 | + | ||
3812 | +static void gen_tdi(DisasContext *ctx) | ||
3598 | { | 3813 | { |
3599 | TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); | 3814 | TCGv t0 = tcg_const_tl(SIMM(ctx->opcode)); |
3600 | TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); | 3815 | TCGv_i32 t1 = tcg_const_i32(TO(ctx->opcode)); |
@@ -3608,7 +3823,9 @@ GEN_HANDLER(tdi, 0x02, 0xFF, 0xFF, 0x00000000, PPC_64B) | @@ -3608,7 +3823,9 @@ GEN_HANDLER(tdi, 0x02, 0xFF, 0xFF, 0x00000000, PPC_64B) | ||
3608 | 3823 | ||
3609 | /*** Processor control ***/ | 3824 | /*** Processor control ***/ |
3610 | /* mcrxr */ | 3825 | /* mcrxr */ |
3611 | -GEN_HANDLER(mcrxr, 0x1F, 0x00, 0x10, 0x007FF801, PPC_MISC) | 3826 | +GEN_HANDLER(mcrxr, 0x1F, 0x00, 0x10, 0x007FF801, PPC_MISC); |
3827 | + | ||
3828 | +static void gen_mcrxr(DisasContext *ctx) | ||
3612 | { | 3829 | { |
3613 | tcg_gen_trunc_tl_i32(cpu_crf[crfD(ctx->opcode)], cpu_xer); | 3830 | tcg_gen_trunc_tl_i32(cpu_crf[crfD(ctx->opcode)], cpu_xer); |
3614 | tcg_gen_shri_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfD(ctx->opcode)], XER_CA); | 3831 | tcg_gen_shri_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfD(ctx->opcode)], XER_CA); |
@@ -3616,7 +3833,9 @@ GEN_HANDLER(mcrxr, 0x1F, 0x00, 0x10, 0x007FF801, PPC_MISC) | @@ -3616,7 +3833,9 @@ GEN_HANDLER(mcrxr, 0x1F, 0x00, 0x10, 0x007FF801, PPC_MISC) | ||
3616 | } | 3833 | } |
3617 | 3834 | ||
3618 | /* mfcr mfocrf */ | 3835 | /* mfcr mfocrf */ |
3619 | -GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC) | 3836 | +GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC); |
3837 | + | ||
3838 | +static void gen_mfcr(DisasContext *ctx) | ||
3620 | { | 3839 | { |
3621 | uint32_t crm, crn; | 3840 | uint32_t crm, crn; |
3622 | 3841 | ||
@@ -3651,7 +3870,9 @@ GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC) | @@ -3651,7 +3870,9 @@ GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC) | ||
3651 | } | 3870 | } |
3652 | 3871 | ||
3653 | /* mfmsr */ | 3872 | /* mfmsr */ |
3654 | -GEN_HANDLER(mfmsr, 0x1F, 0x13, 0x02, 0x001FF801, PPC_MISC) | 3873 | +GEN_HANDLER(mfmsr, 0x1F, 0x13, 0x02, 0x001FF801, PPC_MISC); |
3874 | + | ||
3875 | +static void gen_mfmsr(DisasContext *ctx) | ||
3655 | { | 3876 | { |
3656 | #if defined(CONFIG_USER_ONLY) | 3877 | #if defined(CONFIG_USER_ONLY) |
3657 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 3878 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -3716,19 +3937,25 @@ static always_inline void gen_op_mfspr (DisasContext *ctx) | @@ -3716,19 +3937,25 @@ static always_inline void gen_op_mfspr (DisasContext *ctx) | ||
3716 | } | 3937 | } |
3717 | } | 3938 | } |
3718 | 3939 | ||
3719 | -GEN_HANDLER(mfspr, 0x1F, 0x13, 0x0A, 0x00000001, PPC_MISC) | 3940 | +GEN_HANDLER(mfspr, 0x1F, 0x13, 0x0A, 0x00000001, PPC_MISC); |
3941 | + | ||
3942 | +static void gen_mfspr(DisasContext *ctx) | ||
3720 | { | 3943 | { |
3721 | gen_op_mfspr(ctx); | 3944 | gen_op_mfspr(ctx); |
3722 | } | 3945 | } |
3723 | 3946 | ||
3724 | /* mftb */ | 3947 | /* mftb */ |
3725 | -GEN_HANDLER(mftb, 0x1F, 0x13, 0x0B, 0x00000001, PPC_MFTB) | 3948 | +GEN_HANDLER(mftb, 0x1F, 0x13, 0x0B, 0x00000001, PPC_MFTB); |
3949 | + | ||
3950 | +static void gen_mftb(DisasContext *ctx) | ||
3726 | { | 3951 | { |
3727 | gen_op_mfspr(ctx); | 3952 | gen_op_mfspr(ctx); |
3728 | } | 3953 | } |
3729 | 3954 | ||
3730 | /* mtcrf mtocrf*/ | 3955 | /* mtcrf mtocrf*/ |
3731 | -GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC) | 3956 | +GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC); |
3957 | + | ||
3958 | +static void gen_mtcrf(DisasContext *ctx) | ||
3732 | { | 3959 | { |
3733 | uint32_t crm, crn; | 3960 | uint32_t crm, crn; |
3734 | 3961 | ||
@@ -3757,7 +3984,9 @@ GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC) | @@ -3757,7 +3984,9 @@ GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC) | ||
3757 | 3984 | ||
3758 | /* mtmsr */ | 3985 | /* mtmsr */ |
3759 | #if defined(TARGET_PPC64) | 3986 | #if defined(TARGET_PPC64) |
3760 | -GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001EF801, PPC_64B) | 3987 | +GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001EF801, PPC_64B); |
3988 | + | ||
3989 | +static void gen_mtmsrd(DisasContext *ctx) | ||
3761 | { | 3990 | { |
3762 | #if defined(CONFIG_USER_ONLY) | 3991 | #if defined(CONFIG_USER_ONLY) |
3763 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 3992 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -3788,7 +4017,9 @@ GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001EF801, PPC_64B) | @@ -3788,7 +4017,9 @@ GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001EF801, PPC_64B) | ||
3788 | } | 4017 | } |
3789 | #endif | 4018 | #endif |
3790 | 4019 | ||
3791 | -GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC) | 4020 | +GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC); |
4021 | + | ||
4022 | +static void gen_mtmsr(DisasContext *ctx) | ||
3792 | { | 4023 | { |
3793 | #if defined(CONFIG_USER_ONLY) | 4024 | #if defined(CONFIG_USER_ONLY) |
3794 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 4025 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -3831,7 +4062,9 @@ GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC) | @@ -3831,7 +4062,9 @@ GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC) | ||
3831 | } | 4062 | } |
3832 | 4063 | ||
3833 | /* mtspr */ | 4064 | /* mtspr */ |
3834 | -GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC) | 4065 | +GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC); |
4066 | + | ||
4067 | +static void gen_mtspr(DisasContext *ctx) | ||
3835 | { | 4068 | { |
3836 | void (*write_cb)(void *opaque, int sprn, int gprn); | 4069 | void (*write_cb)(void *opaque, int sprn, int gprn); |
3837 | uint32_t sprn = SPR(ctx->opcode); | 4070 | uint32_t sprn = SPR(ctx->opcode); |
@@ -3867,7 +4100,9 @@ GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC) | @@ -3867,7 +4100,9 @@ GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC) | ||
3867 | 4100 | ||
3868 | /*** Cache management ***/ | 4101 | /*** Cache management ***/ |
3869 | /* dcbf */ | 4102 | /* dcbf */ |
3870 | -GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE) | 4103 | +GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE); |
4104 | + | ||
4105 | +static void gen_dcbf(DisasContext *ctx) | ||
3871 | { | 4106 | { |
3872 | /* XXX: specification says this is treated as a load by the MMU */ | 4107 | /* XXX: specification says this is treated as a load by the MMU */ |
3873 | TCGv t0; | 4108 | TCGv t0; |
@@ -3879,7 +4114,9 @@ GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE) | @@ -3879,7 +4114,9 @@ GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE) | ||
3879 | } | 4114 | } |
3880 | 4115 | ||
3881 | /* dcbi (Supervisor only) */ | 4116 | /* dcbi (Supervisor only) */ |
3882 | -GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE) | 4117 | +GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE); |
4118 | + | ||
4119 | +static void gen_dcbi(DisasContext *ctx) | ||
3883 | { | 4120 | { |
3884 | #if defined(CONFIG_USER_ONLY) | 4121 | #if defined(CONFIG_USER_ONLY) |
3885 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 4122 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -3902,7 +4139,9 @@ GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE) | @@ -3902,7 +4139,9 @@ GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE) | ||
3902 | } | 4139 | } |
3903 | 4140 | ||
3904 | /* dcdst */ | 4141 | /* dcdst */ |
3905 | -GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE) | 4142 | +GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE); |
4143 | + | ||
4144 | +static void gen_dcbst(DisasContext *ctx) | ||
3906 | { | 4145 | { |
3907 | /* XXX: specification say this is treated as a load by the MMU */ | 4146 | /* XXX: specification say this is treated as a load by the MMU */ |
3908 | TCGv t0; | 4147 | TCGv t0; |
@@ -3914,7 +4153,9 @@ GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE) | @@ -3914,7 +4153,9 @@ GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE) | ||
3914 | } | 4153 | } |
3915 | 4154 | ||
3916 | /* dcbt */ | 4155 | /* dcbt */ |
3917 | -GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x02000001, PPC_CACHE) | 4156 | +GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x02000001, PPC_CACHE); |
4157 | + | ||
4158 | +static void gen_dcbt(DisasContext *ctx) | ||
3918 | { | 4159 | { |
3919 | /* interpreted as no-op */ | 4160 | /* interpreted as no-op */ |
3920 | /* XXX: specification say this is treated as a load by the MMU | 4161 | /* XXX: specification say this is treated as a load by the MMU |
@@ -3923,7 +4164,9 @@ GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x02000001, PPC_CACHE) | @@ -3923,7 +4164,9 @@ GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x02000001, PPC_CACHE) | ||
3923 | } | 4164 | } |
3924 | 4165 | ||
3925 | /* dcbtst */ | 4166 | /* dcbtst */ |
3926 | -GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x02000001, PPC_CACHE) | 4167 | +GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x02000001, PPC_CACHE); |
4168 | + | ||
4169 | +static void gen_dcbtst(DisasContext *ctx) | ||
3927 | { | 4170 | { |
3928 | /* interpreted as no-op */ | 4171 | /* interpreted as no-op */ |
3929 | /* XXX: specification say this is treated as a load by the MMU | 4172 | /* XXX: specification say this is treated as a load by the MMU |
@@ -3932,7 +4175,9 @@ GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x02000001, PPC_CACHE) | @@ -3932,7 +4175,9 @@ GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x02000001, PPC_CACHE) | ||
3932 | } | 4175 | } |
3933 | 4176 | ||
3934 | /* dcbz */ | 4177 | /* dcbz */ |
3935 | -GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03E00001, PPC_CACHE_DCBZ) | 4178 | +GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03E00001, PPC_CACHE_DCBZ); |
4179 | + | ||
4180 | +static void gen_dcbz(DisasContext *ctx) | ||
3936 | { | 4181 | { |
3937 | TCGv t0; | 4182 | TCGv t0; |
3938 | gen_set_access_type(ctx, ACCESS_CACHE); | 4183 | gen_set_access_type(ctx, ACCESS_CACHE); |
@@ -3960,7 +4205,9 @@ GEN_HANDLER2(dcbz_970, "dcbz", 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZT) | @@ -3960,7 +4205,9 @@ GEN_HANDLER2(dcbz_970, "dcbz", 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZT) | ||
3960 | } | 4205 | } |
3961 | 4206 | ||
3962 | /* dst / dstt */ | 4207 | /* dst / dstt */ |
3963 | -GEN_HANDLER(dst, 0x1F, 0x16, 0x0A, 0x01800001, PPC_ALTIVEC) | 4208 | +GEN_HANDLER(dst, 0x1F, 0x16, 0x0A, 0x01800001, PPC_ALTIVEC); |
4209 | + | ||
4210 | +static void gen_dst(DisasContext *ctx) | ||
3964 | { | 4211 | { |
3965 | if (rA(ctx->opcode) == 0) { | 4212 | if (rA(ctx->opcode) == 0) { |
3966 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX); | 4213 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX); |
@@ -3970,7 +4217,9 @@ GEN_HANDLER(dst, 0x1F, 0x16, 0x0A, 0x01800001, PPC_ALTIVEC) | @@ -3970,7 +4217,9 @@ GEN_HANDLER(dst, 0x1F, 0x16, 0x0A, 0x01800001, PPC_ALTIVEC) | ||
3970 | } | 4217 | } |
3971 | 4218 | ||
3972 | /* dstst /dststt */ | 4219 | /* dstst /dststt */ |
3973 | -GEN_HANDLER(dstst, 0x1F, 0x16, 0x0B, 0x02000001, PPC_ALTIVEC) | 4220 | +GEN_HANDLER(dstst, 0x1F, 0x16, 0x0B, 0x02000001, PPC_ALTIVEC); |
4221 | + | ||
4222 | +static void gen_dstst(DisasContext *ctx) | ||
3974 | { | 4223 | { |
3975 | if (rA(ctx->opcode) == 0) { | 4224 | if (rA(ctx->opcode) == 0) { |
3976 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX); | 4225 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX); |
@@ -3981,13 +4230,17 @@ GEN_HANDLER(dstst, 0x1F, 0x16, 0x0B, 0x02000001, PPC_ALTIVEC) | @@ -3981,13 +4230,17 @@ GEN_HANDLER(dstst, 0x1F, 0x16, 0x0B, 0x02000001, PPC_ALTIVEC) | ||
3981 | } | 4230 | } |
3982 | 4231 | ||
3983 | /* dss / dssall */ | 4232 | /* dss / dssall */ |
3984 | -GEN_HANDLER(dss, 0x1F, 0x16, 0x19, 0x019FF801, PPC_ALTIVEC) | 4233 | +GEN_HANDLER(dss, 0x1F, 0x16, 0x19, 0x019FF801, PPC_ALTIVEC); |
4234 | + | ||
4235 | +static void gen_dss(DisasContext *ctx) | ||
3985 | { | 4236 | { |
3986 | /* interpreted as no-op */ | 4237 | /* interpreted as no-op */ |
3987 | } | 4238 | } |
3988 | 4239 | ||
3989 | /* icbi */ | 4240 | /* icbi */ |
3990 | -GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03E00001, PPC_CACHE_ICBI) | 4241 | +GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03E00001, PPC_CACHE_ICBI); |
4242 | + | ||
4243 | +static void gen_icbi(DisasContext *ctx) | ||
3991 | { | 4244 | { |
3992 | TCGv t0; | 4245 | TCGv t0; |
3993 | gen_set_access_type(ctx, ACCESS_CACHE); | 4246 | gen_set_access_type(ctx, ACCESS_CACHE); |
@@ -4001,7 +4254,9 @@ GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03E00001, PPC_CACHE_ICBI) | @@ -4001,7 +4254,9 @@ GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03E00001, PPC_CACHE_ICBI) | ||
4001 | 4254 | ||
4002 | /* Optional: */ | 4255 | /* Optional: */ |
4003 | /* dcba */ | 4256 | /* dcba */ |
4004 | -GEN_HANDLER(dcba, 0x1F, 0x16, 0x17, 0x03E00001, PPC_CACHE_DCBA) | 4257 | +GEN_HANDLER(dcba, 0x1F, 0x16, 0x17, 0x03E00001, PPC_CACHE_DCBA); |
4258 | + | ||
4259 | +static void gen_dcba(DisasContext *ctx) | ||
4005 | { | 4260 | { |
4006 | /* interpreted as no-op */ | 4261 | /* interpreted as no-op */ |
4007 | /* XXX: specification say this is treated as a store by the MMU | 4262 | /* XXX: specification say this is treated as a store by the MMU |
@@ -4012,7 +4267,9 @@ GEN_HANDLER(dcba, 0x1F, 0x16, 0x17, 0x03E00001, PPC_CACHE_DCBA) | @@ -4012,7 +4267,9 @@ GEN_HANDLER(dcba, 0x1F, 0x16, 0x17, 0x03E00001, PPC_CACHE_DCBA) | ||
4012 | /*** Segment register manipulation ***/ | 4267 | /*** Segment register manipulation ***/ |
4013 | /* Supervisor only: */ | 4268 | /* Supervisor only: */ |
4014 | /* mfsr */ | 4269 | /* mfsr */ |
4015 | -GEN_HANDLER(mfsr, 0x1F, 0x13, 0x12, 0x0010F801, PPC_SEGMENT) | 4270 | +GEN_HANDLER(mfsr, 0x1F, 0x13, 0x12, 0x0010F801, PPC_SEGMENT); |
4271 | + | ||
4272 | +static void gen_mfsr(DisasContext *ctx) | ||
4016 | { | 4273 | { |
4017 | #if defined(CONFIG_USER_ONLY) | 4274 | #if defined(CONFIG_USER_ONLY) |
4018 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 4275 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -4029,7 +4286,9 @@ GEN_HANDLER(mfsr, 0x1F, 0x13, 0x12, 0x0010F801, PPC_SEGMENT) | @@ -4029,7 +4286,9 @@ GEN_HANDLER(mfsr, 0x1F, 0x13, 0x12, 0x0010F801, PPC_SEGMENT) | ||
4029 | } | 4286 | } |
4030 | 4287 | ||
4031 | /* mfsrin */ | 4288 | /* mfsrin */ |
4032 | -GEN_HANDLER(mfsrin, 0x1F, 0x13, 0x14, 0x001F0001, PPC_SEGMENT) | 4289 | +GEN_HANDLER(mfsrin, 0x1F, 0x13, 0x14, 0x001F0001, PPC_SEGMENT); |
4290 | + | ||
4291 | +static void gen_mfsrin(DisasContext *ctx) | ||
4033 | { | 4292 | { |
4034 | #if defined(CONFIG_USER_ONLY) | 4293 | #if defined(CONFIG_USER_ONLY) |
4035 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 4294 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -4048,7 +4307,9 @@ GEN_HANDLER(mfsrin, 0x1F, 0x13, 0x14, 0x001F0001, PPC_SEGMENT) | @@ -4048,7 +4307,9 @@ GEN_HANDLER(mfsrin, 0x1F, 0x13, 0x14, 0x001F0001, PPC_SEGMENT) | ||
4048 | } | 4307 | } |
4049 | 4308 | ||
4050 | /* mtsr */ | 4309 | /* mtsr */ |
4051 | -GEN_HANDLER(mtsr, 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT) | 4310 | +GEN_HANDLER(mtsr, 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT); |
4311 | + | ||
4312 | +static void gen_mtsr(DisasContext *ctx) | ||
4052 | { | 4313 | { |
4053 | #if defined(CONFIG_USER_ONLY) | 4314 | #if defined(CONFIG_USER_ONLY) |
4054 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 4315 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -4065,7 +4326,9 @@ GEN_HANDLER(mtsr, 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT) | @@ -4065,7 +4326,9 @@ GEN_HANDLER(mtsr, 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT) | ||
4065 | } | 4326 | } |
4066 | 4327 | ||
4067 | /* mtsrin */ | 4328 | /* mtsrin */ |
4068 | -GEN_HANDLER(mtsrin, 0x1F, 0x12, 0x07, 0x001F0001, PPC_SEGMENT) | 4329 | +GEN_HANDLER(mtsrin, 0x1F, 0x12, 0x07, 0x001F0001, PPC_SEGMENT); |
4330 | + | ||
4331 | +static void gen_mtsrin(DisasContext *ctx) | ||
4069 | { | 4332 | { |
4070 | #if defined(CONFIG_USER_ONLY) | 4333 | #if defined(CONFIG_USER_ONLY) |
4071 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 4334 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -4178,7 +4441,9 @@ GEN_HANDLER2(slbmte, "slbmte", 0x1F, 0x12, 0x0C, 0x00000000, PPC_SEGMENT_64B) | @@ -4178,7 +4441,9 @@ GEN_HANDLER2(slbmte, "slbmte", 0x1F, 0x12, 0x0C, 0x00000000, PPC_SEGMENT_64B) | ||
4178 | /*** Lookaside buffer management ***/ | 4441 | /*** Lookaside buffer management ***/ |
4179 | /* Optional & mem_idx only: */ | 4442 | /* Optional & mem_idx only: */ |
4180 | /* tlbia */ | 4443 | /* tlbia */ |
4181 | -GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA) | 4444 | +GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA); |
4445 | + | ||
4446 | +static void gen_tlbia(DisasContext *ctx) | ||
4182 | { | 4447 | { |
4183 | #if defined(CONFIG_USER_ONLY) | 4448 | #if defined(CONFIG_USER_ONLY) |
4184 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 4449 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -4192,7 +4457,9 @@ GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA) | @@ -4192,7 +4457,9 @@ GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA) | ||
4192 | } | 4457 | } |
4193 | 4458 | ||
4194 | /* tlbiel */ | 4459 | /* tlbiel */ |
4195 | -GEN_HANDLER(tlbiel, 0x1F, 0x12, 0x08, 0x03FF0001, PPC_MEM_TLBIE) | 4460 | +GEN_HANDLER(tlbiel, 0x1F, 0x12, 0x08, 0x03FF0001, PPC_MEM_TLBIE); |
4461 | + | ||
4462 | +static void gen_tlbiel(DisasContext *ctx) | ||
4196 | { | 4463 | { |
4197 | #if defined(CONFIG_USER_ONLY) | 4464 | #if defined(CONFIG_USER_ONLY) |
4198 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 4465 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -4206,7 +4473,9 @@ GEN_HANDLER(tlbiel, 0x1F, 0x12, 0x08, 0x03FF0001, PPC_MEM_TLBIE) | @@ -4206,7 +4473,9 @@ GEN_HANDLER(tlbiel, 0x1F, 0x12, 0x08, 0x03FF0001, PPC_MEM_TLBIE) | ||
4206 | } | 4473 | } |
4207 | 4474 | ||
4208 | /* tlbie */ | 4475 | /* tlbie */ |
4209 | -GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x03FF0001, PPC_MEM_TLBIE) | 4476 | +GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x03FF0001, PPC_MEM_TLBIE); |
4477 | + | ||
4478 | +static void gen_tlbie(DisasContext *ctx) | ||
4210 | { | 4479 | { |
4211 | #if defined(CONFIG_USER_ONLY) | 4480 | #if defined(CONFIG_USER_ONLY) |
4212 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 4481 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -4228,7 +4497,9 @@ GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x03FF0001, PPC_MEM_TLBIE) | @@ -4228,7 +4497,9 @@ GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x03FF0001, PPC_MEM_TLBIE) | ||
4228 | } | 4497 | } |
4229 | 4498 | ||
4230 | /* tlbsync */ | 4499 | /* tlbsync */ |
4231 | -GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC) | 4500 | +GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC); |
4501 | + | ||
4502 | +static void gen_tlbsync(DisasContext *ctx) | ||
4232 | { | 4503 | { |
4233 | #if defined(CONFIG_USER_ONLY) | 4504 | #if defined(CONFIG_USER_ONLY) |
4234 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 4505 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -4246,7 +4517,9 @@ GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC) | @@ -4246,7 +4517,9 @@ GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC) | ||
4246 | 4517 | ||
4247 | #if defined(TARGET_PPC64) | 4518 | #if defined(TARGET_PPC64) |
4248 | /* slbia */ | 4519 | /* slbia */ |
4249 | -GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI) | 4520 | +GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI); |
4521 | + | ||
4522 | +static void gen_slbia(DisasContext *ctx) | ||
4250 | { | 4523 | { |
4251 | #if defined(CONFIG_USER_ONLY) | 4524 | #if defined(CONFIG_USER_ONLY) |
4252 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 4525 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -4260,7 +4533,9 @@ GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI) | @@ -4260,7 +4533,9 @@ GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI) | ||
4260 | } | 4533 | } |
4261 | 4534 | ||
4262 | /* slbie */ | 4535 | /* slbie */ |
4263 | -GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI) | 4536 | +GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI); |
4537 | + | ||
4538 | +static void gen_slbie(DisasContext *ctx) | ||
4264 | { | 4539 | { |
4265 | #if defined(CONFIG_USER_ONLY) | 4540 | #if defined(CONFIG_USER_ONLY) |
4266 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 4541 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -4277,7 +4552,9 @@ GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI) | @@ -4277,7 +4552,9 @@ GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI) | ||
4277 | /*** External control ***/ | 4552 | /*** External control ***/ |
4278 | /* Optional: */ | 4553 | /* Optional: */ |
4279 | /* eciwx */ | 4554 | /* eciwx */ |
4280 | -GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN) | 4555 | +GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN); |
4556 | + | ||
4557 | +static void gen_eciwx(DisasContext *ctx) | ||
4281 | { | 4558 | { |
4282 | TCGv t0; | 4559 | TCGv t0; |
4283 | /* Should check EAR[E] ! */ | 4560 | /* Should check EAR[E] ! */ |
@@ -4290,7 +4567,9 @@ GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN) | @@ -4290,7 +4567,9 @@ GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN) | ||
4290 | } | 4567 | } |
4291 | 4568 | ||
4292 | /* ecowx */ | 4569 | /* ecowx */ |
4293 | -GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN) | 4570 | +GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN); |
4571 | + | ||
4572 | +static void gen_ecowx(DisasContext *ctx) | ||
4294 | { | 4573 | { |
4295 | TCGv t0; | 4574 | TCGv t0; |
4296 | /* Should check EAR[E] ! */ | 4575 | /* Should check EAR[E] ! */ |
@@ -4304,7 +4583,9 @@ GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN) | @@ -4304,7 +4583,9 @@ GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN) | ||
4304 | 4583 | ||
4305 | /* PowerPC 601 specific instructions */ | 4584 | /* PowerPC 601 specific instructions */ |
4306 | /* abs - abs. */ | 4585 | /* abs - abs. */ |
4307 | -GEN_HANDLER(abs, 0x1F, 0x08, 0x0B, 0x0000F800, PPC_POWER_BR) | 4586 | +GEN_HANDLER(abs, 0x1F, 0x08, 0x0B, 0x0000F800, PPC_POWER_BR); |
4587 | + | ||
4588 | +static void gen_abs(DisasContext *ctx) | ||
4308 | { | 4589 | { |
4309 | int l1 = gen_new_label(); | 4590 | int l1 = gen_new_label(); |
4310 | int l2 = gen_new_label(); | 4591 | int l2 = gen_new_label(); |
@@ -4319,7 +4600,9 @@ GEN_HANDLER(abs, 0x1F, 0x08, 0x0B, 0x0000F800, PPC_POWER_BR) | @@ -4319,7 +4600,9 @@ GEN_HANDLER(abs, 0x1F, 0x08, 0x0B, 0x0000F800, PPC_POWER_BR) | ||
4319 | } | 4600 | } |
4320 | 4601 | ||
4321 | /* abso - abso. */ | 4602 | /* abso - abso. */ |
4322 | -GEN_HANDLER(abso, 0x1F, 0x08, 0x1B, 0x0000F800, PPC_POWER_BR) | 4603 | +GEN_HANDLER(abso, 0x1F, 0x08, 0x1B, 0x0000F800, PPC_POWER_BR); |
4604 | + | ||
4605 | +static void gen_abso(DisasContext *ctx) | ||
4323 | { | 4606 | { |
4324 | int l1 = gen_new_label(); | 4607 | int l1 = gen_new_label(); |
4325 | int l2 = gen_new_label(); | 4608 | int l2 = gen_new_label(); |
@@ -4341,7 +4624,9 @@ GEN_HANDLER(abso, 0x1F, 0x08, 0x1B, 0x0000F800, PPC_POWER_BR) | @@ -4341,7 +4624,9 @@ GEN_HANDLER(abso, 0x1F, 0x08, 0x1B, 0x0000F800, PPC_POWER_BR) | ||
4341 | } | 4624 | } |
4342 | 4625 | ||
4343 | /* clcs */ | 4626 | /* clcs */ |
4344 | -GEN_HANDLER(clcs, 0x1F, 0x10, 0x13, 0x0000F800, PPC_POWER_BR) | 4627 | +GEN_HANDLER(clcs, 0x1F, 0x10, 0x13, 0x0000F800, PPC_POWER_BR); |
4628 | + | ||
4629 | +static void gen_clcs(DisasContext *ctx) | ||
4345 | { | 4630 | { |
4346 | TCGv_i32 t0 = tcg_const_i32(rA(ctx->opcode)); | 4631 | TCGv_i32 t0 = tcg_const_i32(rA(ctx->opcode)); |
4347 | gen_helper_clcs(cpu_gpr[rD(ctx->opcode)], t0); | 4632 | gen_helper_clcs(cpu_gpr[rD(ctx->opcode)], t0); |
@@ -4350,7 +4635,9 @@ GEN_HANDLER(clcs, 0x1F, 0x10, 0x13, 0x0000F800, PPC_POWER_BR) | @@ -4350,7 +4635,9 @@ GEN_HANDLER(clcs, 0x1F, 0x10, 0x13, 0x0000F800, PPC_POWER_BR) | ||
4350 | } | 4635 | } |
4351 | 4636 | ||
4352 | /* div - div. */ | 4637 | /* div - div. */ |
4353 | -GEN_HANDLER(div, 0x1F, 0x0B, 0x0A, 0x00000000, PPC_POWER_BR) | 4638 | +GEN_HANDLER(div, 0x1F, 0x0B, 0x0A, 0x00000000, PPC_POWER_BR); |
4639 | + | ||
4640 | +static void gen_div(DisasContext *ctx) | ||
4354 | { | 4641 | { |
4355 | gen_helper_div(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); | 4642 | gen_helper_div(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); |
4356 | if (unlikely(Rc(ctx->opcode) != 0)) | 4643 | if (unlikely(Rc(ctx->opcode) != 0)) |
@@ -4358,7 +4645,9 @@ GEN_HANDLER(div, 0x1F, 0x0B, 0x0A, 0x00000000, PPC_POWER_BR) | @@ -4358,7 +4645,9 @@ GEN_HANDLER(div, 0x1F, 0x0B, 0x0A, 0x00000000, PPC_POWER_BR) | ||
4358 | } | 4645 | } |
4359 | 4646 | ||
4360 | /* divo - divo. */ | 4647 | /* divo - divo. */ |
4361 | -GEN_HANDLER(divo, 0x1F, 0x0B, 0x1A, 0x00000000, PPC_POWER_BR) | 4648 | +GEN_HANDLER(divo, 0x1F, 0x0B, 0x1A, 0x00000000, PPC_POWER_BR); |
4649 | + | ||
4650 | +static void gen_divo(DisasContext *ctx) | ||
4362 | { | 4651 | { |
4363 | gen_helper_divo(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); | 4652 | gen_helper_divo(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); |
4364 | if (unlikely(Rc(ctx->opcode) != 0)) | 4653 | if (unlikely(Rc(ctx->opcode) != 0)) |
@@ -4366,7 +4655,9 @@ GEN_HANDLER(divo, 0x1F, 0x0B, 0x1A, 0x00000000, PPC_POWER_BR) | @@ -4366,7 +4655,9 @@ GEN_HANDLER(divo, 0x1F, 0x0B, 0x1A, 0x00000000, PPC_POWER_BR) | ||
4366 | } | 4655 | } |
4367 | 4656 | ||
4368 | /* divs - divs. */ | 4657 | /* divs - divs. */ |
4369 | -GEN_HANDLER(divs, 0x1F, 0x0B, 0x0B, 0x00000000, PPC_POWER_BR) | 4658 | +GEN_HANDLER(divs, 0x1F, 0x0B, 0x0B, 0x00000000, PPC_POWER_BR); |
4659 | + | ||
4660 | +static void gen_divs(DisasContext *ctx) | ||
4370 | { | 4661 | { |
4371 | gen_helper_divs(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); | 4662 | gen_helper_divs(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); |
4372 | if (unlikely(Rc(ctx->opcode) != 0)) | 4663 | if (unlikely(Rc(ctx->opcode) != 0)) |
@@ -4374,7 +4665,9 @@ GEN_HANDLER(divs, 0x1F, 0x0B, 0x0B, 0x00000000, PPC_POWER_BR) | @@ -4374,7 +4665,9 @@ GEN_HANDLER(divs, 0x1F, 0x0B, 0x0B, 0x00000000, PPC_POWER_BR) | ||
4374 | } | 4665 | } |
4375 | 4666 | ||
4376 | /* divso - divso. */ | 4667 | /* divso - divso. */ |
4377 | -GEN_HANDLER(divso, 0x1F, 0x0B, 0x1B, 0x00000000, PPC_POWER_BR) | 4668 | +GEN_HANDLER(divso, 0x1F, 0x0B, 0x1B, 0x00000000, PPC_POWER_BR); |
4669 | + | ||
4670 | +static void gen_divso(DisasContext *ctx) | ||
4378 | { | 4671 | { |
4379 | gen_helper_divso(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); | 4672 | gen_helper_divso(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); |
4380 | if (unlikely(Rc(ctx->opcode) != 0)) | 4673 | if (unlikely(Rc(ctx->opcode) != 0)) |
@@ -4382,7 +4675,9 @@ GEN_HANDLER(divso, 0x1F, 0x0B, 0x1B, 0x00000000, PPC_POWER_BR) | @@ -4382,7 +4675,9 @@ GEN_HANDLER(divso, 0x1F, 0x0B, 0x1B, 0x00000000, PPC_POWER_BR) | ||
4382 | } | 4675 | } |
4383 | 4676 | ||
4384 | /* doz - doz. */ | 4677 | /* doz - doz. */ |
4385 | -GEN_HANDLER(doz, 0x1F, 0x08, 0x08, 0x00000000, PPC_POWER_BR) | 4678 | +GEN_HANDLER(doz, 0x1F, 0x08, 0x08, 0x00000000, PPC_POWER_BR); |
4679 | + | ||
4680 | +static void gen_doz(DisasContext *ctx) | ||
4386 | { | 4681 | { |
4387 | int l1 = gen_new_label(); | 4682 | int l1 = gen_new_label(); |
4388 | int l2 = gen_new_label(); | 4683 | int l2 = gen_new_label(); |
@@ -4397,7 +4692,9 @@ GEN_HANDLER(doz, 0x1F, 0x08, 0x08, 0x00000000, PPC_POWER_BR) | @@ -4397,7 +4692,9 @@ GEN_HANDLER(doz, 0x1F, 0x08, 0x08, 0x00000000, PPC_POWER_BR) | ||
4397 | } | 4692 | } |
4398 | 4693 | ||
4399 | /* dozo - dozo. */ | 4694 | /* dozo - dozo. */ |
4400 | -GEN_HANDLER(dozo, 0x1F, 0x08, 0x18, 0x00000000, PPC_POWER_BR) | 4695 | +GEN_HANDLER(dozo, 0x1F, 0x08, 0x18, 0x00000000, PPC_POWER_BR); |
4696 | + | ||
4697 | +static void gen_dozo(DisasContext *ctx) | ||
4401 | { | 4698 | { |
4402 | int l1 = gen_new_label(); | 4699 | int l1 = gen_new_label(); |
4403 | int l2 = gen_new_label(); | 4700 | int l2 = gen_new_label(); |
@@ -4426,7 +4723,9 @@ GEN_HANDLER(dozo, 0x1F, 0x08, 0x18, 0x00000000, PPC_POWER_BR) | @@ -4426,7 +4723,9 @@ GEN_HANDLER(dozo, 0x1F, 0x08, 0x18, 0x00000000, PPC_POWER_BR) | ||
4426 | } | 4723 | } |
4427 | 4724 | ||
4428 | /* dozi */ | 4725 | /* dozi */ |
4429 | -GEN_HANDLER(dozi, 0x09, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR) | 4726 | +GEN_HANDLER(dozi, 0x09, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR); |
4727 | + | ||
4728 | +static void gen_dozi(DisasContext *ctx) | ||
4430 | { | 4729 | { |
4431 | target_long simm = SIMM(ctx->opcode); | 4730 | target_long simm = SIMM(ctx->opcode); |
4432 | int l1 = gen_new_label(); | 4731 | int l1 = gen_new_label(); |
@@ -4442,7 +4741,9 @@ GEN_HANDLER(dozi, 0x09, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR) | @@ -4442,7 +4741,9 @@ GEN_HANDLER(dozi, 0x09, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR) | ||
4442 | } | 4741 | } |
4443 | 4742 | ||
4444 | /* lscbx - lscbx. */ | 4743 | /* lscbx - lscbx. */ |
4445 | -GEN_HANDLER(lscbx, 0x1F, 0x15, 0x08, 0x00000000, PPC_POWER_BR) | 4744 | +GEN_HANDLER(lscbx, 0x1F, 0x15, 0x08, 0x00000000, PPC_POWER_BR); |
4745 | + | ||
4746 | +static void gen_lscbx(DisasContext *ctx) | ||
4446 | { | 4747 | { |
4447 | TCGv t0 = tcg_temp_new(); | 4748 | TCGv t0 = tcg_temp_new(); |
4448 | TCGv_i32 t1 = tcg_const_i32(rD(ctx->opcode)); | 4749 | TCGv_i32 t1 = tcg_const_i32(rD(ctx->opcode)); |
@@ -4464,7 +4765,9 @@ GEN_HANDLER(lscbx, 0x1F, 0x15, 0x08, 0x00000000, PPC_POWER_BR) | @@ -4464,7 +4765,9 @@ GEN_HANDLER(lscbx, 0x1F, 0x15, 0x08, 0x00000000, PPC_POWER_BR) | ||
4464 | } | 4765 | } |
4465 | 4766 | ||
4466 | /* maskg - maskg. */ | 4767 | /* maskg - maskg. */ |
4467 | -GEN_HANDLER(maskg, 0x1F, 0x1D, 0x00, 0x00000000, PPC_POWER_BR) | 4768 | +GEN_HANDLER(maskg, 0x1F, 0x1D, 0x00, 0x00000000, PPC_POWER_BR); |
4769 | + | ||
4770 | +static void gen_maskg(DisasContext *ctx) | ||
4468 | { | 4771 | { |
4469 | int l1 = gen_new_label(); | 4772 | int l1 = gen_new_label(); |
4470 | TCGv t0 = tcg_temp_new(); | 4773 | TCGv t0 = tcg_temp_new(); |
@@ -4490,7 +4793,9 @@ GEN_HANDLER(maskg, 0x1F, 0x1D, 0x00, 0x00000000, PPC_POWER_BR) | @@ -4490,7 +4793,9 @@ GEN_HANDLER(maskg, 0x1F, 0x1D, 0x00, 0x00000000, PPC_POWER_BR) | ||
4490 | } | 4793 | } |
4491 | 4794 | ||
4492 | /* maskir - maskir. */ | 4795 | /* maskir - maskir. */ |
4493 | -GEN_HANDLER(maskir, 0x1F, 0x1D, 0x10, 0x00000000, PPC_POWER_BR) | 4796 | +GEN_HANDLER(maskir, 0x1F, 0x1D, 0x10, 0x00000000, PPC_POWER_BR); |
4797 | + | ||
4798 | +static void gen_maskir(DisasContext *ctx) | ||
4494 | { | 4799 | { |
4495 | TCGv t0 = tcg_temp_new(); | 4800 | TCGv t0 = tcg_temp_new(); |
4496 | TCGv t1 = tcg_temp_new(); | 4801 | TCGv t1 = tcg_temp_new(); |
@@ -4504,7 +4809,9 @@ GEN_HANDLER(maskir, 0x1F, 0x1D, 0x10, 0x00000000, PPC_POWER_BR) | @@ -4504,7 +4809,9 @@ GEN_HANDLER(maskir, 0x1F, 0x1D, 0x10, 0x00000000, PPC_POWER_BR) | ||
4504 | } | 4809 | } |
4505 | 4810 | ||
4506 | /* mul - mul. */ | 4811 | /* mul - mul. */ |
4507 | -GEN_HANDLER(mul, 0x1F, 0x0B, 0x03, 0x00000000, PPC_POWER_BR) | 4812 | +GEN_HANDLER(mul, 0x1F, 0x0B, 0x03, 0x00000000, PPC_POWER_BR); |
4813 | + | ||
4814 | +static void gen_mul(DisasContext *ctx) | ||
4508 | { | 4815 | { |
4509 | TCGv_i64 t0 = tcg_temp_new_i64(); | 4816 | TCGv_i64 t0 = tcg_temp_new_i64(); |
4510 | TCGv_i64 t1 = tcg_temp_new_i64(); | 4817 | TCGv_i64 t1 = tcg_temp_new_i64(); |
@@ -4524,7 +4831,9 @@ GEN_HANDLER(mul, 0x1F, 0x0B, 0x03, 0x00000000, PPC_POWER_BR) | @@ -4524,7 +4831,9 @@ GEN_HANDLER(mul, 0x1F, 0x0B, 0x03, 0x00000000, PPC_POWER_BR) | ||
4524 | } | 4831 | } |
4525 | 4832 | ||
4526 | /* mulo - mulo. */ | 4833 | /* mulo - mulo. */ |
4527 | -GEN_HANDLER(mulo, 0x1F, 0x0B, 0x13, 0x00000000, PPC_POWER_BR) | 4834 | +GEN_HANDLER(mulo, 0x1F, 0x0B, 0x13, 0x00000000, PPC_POWER_BR); |
4835 | + | ||
4836 | +static void gen_mulo(DisasContext *ctx) | ||
4528 | { | 4837 | { |
4529 | int l1 = gen_new_label(); | 4838 | int l1 = gen_new_label(); |
4530 | TCGv_i64 t0 = tcg_temp_new_i64(); | 4839 | TCGv_i64 t0 = tcg_temp_new_i64(); |
@@ -4551,7 +4860,9 @@ GEN_HANDLER(mulo, 0x1F, 0x0B, 0x13, 0x00000000, PPC_POWER_BR) | @@ -4551,7 +4860,9 @@ GEN_HANDLER(mulo, 0x1F, 0x0B, 0x13, 0x00000000, PPC_POWER_BR) | ||
4551 | } | 4860 | } |
4552 | 4861 | ||
4553 | /* nabs - nabs. */ | 4862 | /* nabs - nabs. */ |
4554 | -GEN_HANDLER(nabs, 0x1F, 0x08, 0x0F, 0x00000000, PPC_POWER_BR) | 4863 | +GEN_HANDLER(nabs, 0x1F, 0x08, 0x0F, 0x00000000, PPC_POWER_BR); |
4864 | + | ||
4865 | +static void gen_nabs(DisasContext *ctx) | ||
4555 | { | 4866 | { |
4556 | int l1 = gen_new_label(); | 4867 | int l1 = gen_new_label(); |
4557 | int l2 = gen_new_label(); | 4868 | int l2 = gen_new_label(); |
@@ -4566,7 +4877,9 @@ GEN_HANDLER(nabs, 0x1F, 0x08, 0x0F, 0x00000000, PPC_POWER_BR) | @@ -4566,7 +4877,9 @@ GEN_HANDLER(nabs, 0x1F, 0x08, 0x0F, 0x00000000, PPC_POWER_BR) | ||
4566 | } | 4877 | } |
4567 | 4878 | ||
4568 | /* nabso - nabso. */ | 4879 | /* nabso - nabso. */ |
4569 | -GEN_HANDLER(nabso, 0x1F, 0x08, 0x1F, 0x00000000, PPC_POWER_BR) | 4880 | +GEN_HANDLER(nabso, 0x1F, 0x08, 0x1F, 0x00000000, PPC_POWER_BR); |
4881 | + | ||
4882 | +static void gen_nabso(DisasContext *ctx) | ||
4570 | { | 4883 | { |
4571 | int l1 = gen_new_label(); | 4884 | int l1 = gen_new_label(); |
4572 | int l2 = gen_new_label(); | 4885 | int l2 = gen_new_label(); |
@@ -4583,7 +4896,9 @@ GEN_HANDLER(nabso, 0x1F, 0x08, 0x1F, 0x00000000, PPC_POWER_BR) | @@ -4583,7 +4896,9 @@ GEN_HANDLER(nabso, 0x1F, 0x08, 0x1F, 0x00000000, PPC_POWER_BR) | ||
4583 | } | 4896 | } |
4584 | 4897 | ||
4585 | /* rlmi - rlmi. */ | 4898 | /* rlmi - rlmi. */ |
4586 | -GEN_HANDLER(rlmi, 0x16, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR) | 4899 | +GEN_HANDLER(rlmi, 0x16, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR); |
4900 | + | ||
4901 | +static void gen_rlmi(DisasContext *ctx) | ||
4587 | { | 4902 | { |
4588 | uint32_t mb = MB(ctx->opcode); | 4903 | uint32_t mb = MB(ctx->opcode); |
4589 | uint32_t me = ME(ctx->opcode); | 4904 | uint32_t me = ME(ctx->opcode); |
@@ -4599,7 +4914,9 @@ GEN_HANDLER(rlmi, 0x16, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR) | @@ -4599,7 +4914,9 @@ GEN_HANDLER(rlmi, 0x16, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR) | ||
4599 | } | 4914 | } |
4600 | 4915 | ||
4601 | /* rrib - rrib. */ | 4916 | /* rrib - rrib. */ |
4602 | -GEN_HANDLER(rrib, 0x1F, 0x19, 0x10, 0x00000000, PPC_POWER_BR) | 4917 | +GEN_HANDLER(rrib, 0x1F, 0x19, 0x10, 0x00000000, PPC_POWER_BR); |
4918 | + | ||
4919 | +static void gen_rrib(DisasContext *ctx) | ||
4603 | { | 4920 | { |
4604 | TCGv t0 = tcg_temp_new(); | 4921 | TCGv t0 = tcg_temp_new(); |
4605 | TCGv t1 = tcg_temp_new(); | 4922 | TCGv t1 = tcg_temp_new(); |
@@ -4617,7 +4934,9 @@ GEN_HANDLER(rrib, 0x1F, 0x19, 0x10, 0x00000000, PPC_POWER_BR) | @@ -4617,7 +4934,9 @@ GEN_HANDLER(rrib, 0x1F, 0x19, 0x10, 0x00000000, PPC_POWER_BR) | ||
4617 | } | 4934 | } |
4618 | 4935 | ||
4619 | /* sle - sle. */ | 4936 | /* sle - sle. */ |
4620 | -GEN_HANDLER(sle, 0x1F, 0x19, 0x04, 0x00000000, PPC_POWER_BR) | 4937 | +GEN_HANDLER(sle, 0x1F, 0x19, 0x04, 0x00000000, PPC_POWER_BR); |
4938 | + | ||
4939 | +static void gen_sle(DisasContext *ctx) | ||
4621 | { | 4940 | { |
4622 | TCGv t0 = tcg_temp_new(); | 4941 | TCGv t0 = tcg_temp_new(); |
4623 | TCGv t1 = tcg_temp_new(); | 4942 | TCGv t1 = tcg_temp_new(); |
@@ -4635,7 +4954,9 @@ GEN_HANDLER(sle, 0x1F, 0x19, 0x04, 0x00000000, PPC_POWER_BR) | @@ -4635,7 +4954,9 @@ GEN_HANDLER(sle, 0x1F, 0x19, 0x04, 0x00000000, PPC_POWER_BR) | ||
4635 | } | 4954 | } |
4636 | 4955 | ||
4637 | /* sleq - sleq. */ | 4956 | /* sleq - sleq. */ |
4638 | -GEN_HANDLER(sleq, 0x1F, 0x19, 0x06, 0x00000000, PPC_POWER_BR) | 4957 | +GEN_HANDLER(sleq, 0x1F, 0x19, 0x06, 0x00000000, PPC_POWER_BR); |
4958 | + | ||
4959 | +static void gen_sleq(DisasContext *ctx) | ||
4639 | { | 4960 | { |
4640 | TCGv t0 = tcg_temp_new(); | 4961 | TCGv t0 = tcg_temp_new(); |
4641 | TCGv t1 = tcg_temp_new(); | 4962 | TCGv t1 = tcg_temp_new(); |
@@ -4657,7 +4978,9 @@ GEN_HANDLER(sleq, 0x1F, 0x19, 0x06, 0x00000000, PPC_POWER_BR) | @@ -4657,7 +4978,9 @@ GEN_HANDLER(sleq, 0x1F, 0x19, 0x06, 0x00000000, PPC_POWER_BR) | ||
4657 | } | 4978 | } |
4658 | 4979 | ||
4659 | /* sliq - sliq. */ | 4980 | /* sliq - sliq. */ |
4660 | -GEN_HANDLER(sliq, 0x1F, 0x18, 0x05, 0x00000000, PPC_POWER_BR) | 4981 | +GEN_HANDLER(sliq, 0x1F, 0x18, 0x05, 0x00000000, PPC_POWER_BR); |
4982 | + | ||
4983 | +static void gen_sliq(DisasContext *ctx) | ||
4661 | { | 4984 | { |
4662 | int sh = SH(ctx->opcode); | 4985 | int sh = SH(ctx->opcode); |
4663 | TCGv t0 = tcg_temp_new(); | 4986 | TCGv t0 = tcg_temp_new(); |
@@ -4674,7 +4997,9 @@ GEN_HANDLER(sliq, 0x1F, 0x18, 0x05, 0x00000000, PPC_POWER_BR) | @@ -4674,7 +4997,9 @@ GEN_HANDLER(sliq, 0x1F, 0x18, 0x05, 0x00000000, PPC_POWER_BR) | ||
4674 | } | 4997 | } |
4675 | 4998 | ||
4676 | /* slliq - slliq. */ | 4999 | /* slliq - slliq. */ |
4677 | -GEN_HANDLER(slliq, 0x1F, 0x18, 0x07, 0x00000000, PPC_POWER_BR) | 5000 | +GEN_HANDLER(slliq, 0x1F, 0x18, 0x07, 0x00000000, PPC_POWER_BR); |
5001 | + | ||
5002 | +static void gen_slliq(DisasContext *ctx) | ||
4678 | { | 5003 | { |
4679 | int sh = SH(ctx->opcode); | 5004 | int sh = SH(ctx->opcode); |
4680 | TCGv t0 = tcg_temp_new(); | 5005 | TCGv t0 = tcg_temp_new(); |
@@ -4692,7 +5017,9 @@ GEN_HANDLER(slliq, 0x1F, 0x18, 0x07, 0x00000000, PPC_POWER_BR) | @@ -4692,7 +5017,9 @@ GEN_HANDLER(slliq, 0x1F, 0x18, 0x07, 0x00000000, PPC_POWER_BR) | ||
4692 | } | 5017 | } |
4693 | 5018 | ||
4694 | /* sllq - sllq. */ | 5019 | /* sllq - sllq. */ |
4695 | -GEN_HANDLER(sllq, 0x1F, 0x18, 0x06, 0x00000000, PPC_POWER_BR) | 5020 | +GEN_HANDLER(sllq, 0x1F, 0x18, 0x06, 0x00000000, PPC_POWER_BR); |
5021 | + | ||
5022 | +static void gen_sllq(DisasContext *ctx) | ||
4696 | { | 5023 | { |
4697 | int l1 = gen_new_label(); | 5024 | int l1 = gen_new_label(); |
4698 | int l2 = gen_new_label(); | 5025 | int l2 = gen_new_label(); |
@@ -4721,7 +5048,9 @@ GEN_HANDLER(sllq, 0x1F, 0x18, 0x06, 0x00000000, PPC_POWER_BR) | @@ -4721,7 +5048,9 @@ GEN_HANDLER(sllq, 0x1F, 0x18, 0x06, 0x00000000, PPC_POWER_BR) | ||
4721 | } | 5048 | } |
4722 | 5049 | ||
4723 | /* slq - slq. */ | 5050 | /* slq - slq. */ |
4724 | -GEN_HANDLER(slq, 0x1F, 0x18, 0x04, 0x00000000, PPC_POWER_BR) | 5051 | +GEN_HANDLER(slq, 0x1F, 0x18, 0x04, 0x00000000, PPC_POWER_BR); |
5052 | + | ||
5053 | +static void gen_slq(DisasContext *ctx) | ||
4725 | { | 5054 | { |
4726 | int l1 = gen_new_label(); | 5055 | int l1 = gen_new_label(); |
4727 | TCGv t0 = tcg_temp_new(); | 5056 | TCGv t0 = tcg_temp_new(); |
@@ -4744,7 +5073,9 @@ GEN_HANDLER(slq, 0x1F, 0x18, 0x04, 0x00000000, PPC_POWER_BR) | @@ -4744,7 +5073,9 @@ GEN_HANDLER(slq, 0x1F, 0x18, 0x04, 0x00000000, PPC_POWER_BR) | ||
4744 | } | 5073 | } |
4745 | 5074 | ||
4746 | /* sraiq - sraiq. */ | 5075 | /* sraiq - sraiq. */ |
4747 | -GEN_HANDLER(sraiq, 0x1F, 0x18, 0x1D, 0x00000000, PPC_POWER_BR) | 5076 | +GEN_HANDLER(sraiq, 0x1F, 0x18, 0x1D, 0x00000000, PPC_POWER_BR); |
5077 | + | ||
5078 | +static void gen_sraiq(DisasContext *ctx) | ||
4748 | { | 5079 | { |
4749 | int sh = SH(ctx->opcode); | 5080 | int sh = SH(ctx->opcode); |
4750 | int l1 = gen_new_label(); | 5081 | int l1 = gen_new_label(); |
@@ -4767,7 +5098,9 @@ GEN_HANDLER(sraiq, 0x1F, 0x18, 0x1D, 0x00000000, PPC_POWER_BR) | @@ -4767,7 +5098,9 @@ GEN_HANDLER(sraiq, 0x1F, 0x18, 0x1D, 0x00000000, PPC_POWER_BR) | ||
4767 | } | 5098 | } |
4768 | 5099 | ||
4769 | /* sraq - sraq. */ | 5100 | /* sraq - sraq. */ |
4770 | -GEN_HANDLER(sraq, 0x1F, 0x18, 0x1C, 0x00000000, PPC_POWER_BR) | 5101 | +GEN_HANDLER(sraq, 0x1F, 0x18, 0x1C, 0x00000000, PPC_POWER_BR); |
5102 | + | ||
5103 | +static void gen_sraq(DisasContext *ctx) | ||
4771 | { | 5104 | { |
4772 | int l1 = gen_new_label(); | 5105 | int l1 = gen_new_label(); |
4773 | int l2 = gen_new_label(); | 5106 | int l2 = gen_new_label(); |
@@ -4800,7 +5133,9 @@ GEN_HANDLER(sraq, 0x1F, 0x18, 0x1C, 0x00000000, PPC_POWER_BR) | @@ -4800,7 +5133,9 @@ GEN_HANDLER(sraq, 0x1F, 0x18, 0x1C, 0x00000000, PPC_POWER_BR) | ||
4800 | } | 5133 | } |
4801 | 5134 | ||
4802 | /* sre - sre. */ | 5135 | /* sre - sre. */ |
4803 | -GEN_HANDLER(sre, 0x1F, 0x19, 0x14, 0x00000000, PPC_POWER_BR) | 5136 | +GEN_HANDLER(sre, 0x1F, 0x19, 0x14, 0x00000000, PPC_POWER_BR); |
5137 | + | ||
5138 | +static void gen_sre(DisasContext *ctx) | ||
4804 | { | 5139 | { |
4805 | TCGv t0 = tcg_temp_new(); | 5140 | TCGv t0 = tcg_temp_new(); |
4806 | TCGv t1 = tcg_temp_new(); | 5141 | TCGv t1 = tcg_temp_new(); |
@@ -4818,7 +5153,9 @@ GEN_HANDLER(sre, 0x1F, 0x19, 0x14, 0x00000000, PPC_POWER_BR) | @@ -4818,7 +5153,9 @@ GEN_HANDLER(sre, 0x1F, 0x19, 0x14, 0x00000000, PPC_POWER_BR) | ||
4818 | } | 5153 | } |
4819 | 5154 | ||
4820 | /* srea - srea. */ | 5155 | /* srea - srea. */ |
4821 | -GEN_HANDLER(srea, 0x1F, 0x19, 0x1C, 0x00000000, PPC_POWER_BR) | 5156 | +GEN_HANDLER(srea, 0x1F, 0x19, 0x1C, 0x00000000, PPC_POWER_BR); |
5157 | + | ||
5158 | +static void gen_srea(DisasContext *ctx) | ||
4822 | { | 5159 | { |
4823 | TCGv t0 = tcg_temp_new(); | 5160 | TCGv t0 = tcg_temp_new(); |
4824 | TCGv t1 = tcg_temp_new(); | 5161 | TCGv t1 = tcg_temp_new(); |
@@ -4833,7 +5170,9 @@ GEN_HANDLER(srea, 0x1F, 0x19, 0x1C, 0x00000000, PPC_POWER_BR) | @@ -4833,7 +5170,9 @@ GEN_HANDLER(srea, 0x1F, 0x19, 0x1C, 0x00000000, PPC_POWER_BR) | ||
4833 | } | 5170 | } |
4834 | 5171 | ||
4835 | /* sreq */ | 5172 | /* sreq */ |
4836 | -GEN_HANDLER(sreq, 0x1F, 0x19, 0x16, 0x00000000, PPC_POWER_BR) | 5173 | +GEN_HANDLER(sreq, 0x1F, 0x19, 0x16, 0x00000000, PPC_POWER_BR); |
5174 | + | ||
5175 | +static void gen_sreq(DisasContext *ctx) | ||
4837 | { | 5176 | { |
4838 | TCGv t0 = tcg_temp_new(); | 5177 | TCGv t0 = tcg_temp_new(); |
4839 | TCGv t1 = tcg_temp_new(); | 5178 | TCGv t1 = tcg_temp_new(); |
@@ -4855,7 +5194,9 @@ GEN_HANDLER(sreq, 0x1F, 0x19, 0x16, 0x00000000, PPC_POWER_BR) | @@ -4855,7 +5194,9 @@ GEN_HANDLER(sreq, 0x1F, 0x19, 0x16, 0x00000000, PPC_POWER_BR) | ||
4855 | } | 5194 | } |
4856 | 5195 | ||
4857 | /* sriq */ | 5196 | /* sriq */ |
4858 | -GEN_HANDLER(sriq, 0x1F, 0x18, 0x15, 0x00000000, PPC_POWER_BR) | 5197 | +GEN_HANDLER(sriq, 0x1F, 0x18, 0x15, 0x00000000, PPC_POWER_BR); |
5198 | + | ||
5199 | +static void gen_sriq(DisasContext *ctx) | ||
4859 | { | 5200 | { |
4860 | int sh = SH(ctx->opcode); | 5201 | int sh = SH(ctx->opcode); |
4861 | TCGv t0 = tcg_temp_new(); | 5202 | TCGv t0 = tcg_temp_new(); |
@@ -4872,7 +5213,9 @@ GEN_HANDLER(sriq, 0x1F, 0x18, 0x15, 0x00000000, PPC_POWER_BR) | @@ -4872,7 +5213,9 @@ GEN_HANDLER(sriq, 0x1F, 0x18, 0x15, 0x00000000, PPC_POWER_BR) | ||
4872 | } | 5213 | } |
4873 | 5214 | ||
4874 | /* srliq */ | 5215 | /* srliq */ |
4875 | -GEN_HANDLER(srliq, 0x1F, 0x18, 0x17, 0x00000000, PPC_POWER_BR) | 5216 | +GEN_HANDLER(srliq, 0x1F, 0x18, 0x17, 0x00000000, PPC_POWER_BR); |
5217 | + | ||
5218 | +static void gen_srliq(DisasContext *ctx) | ||
4876 | { | 5219 | { |
4877 | int sh = SH(ctx->opcode); | 5220 | int sh = SH(ctx->opcode); |
4878 | TCGv t0 = tcg_temp_new(); | 5221 | TCGv t0 = tcg_temp_new(); |
@@ -4890,7 +5233,9 @@ GEN_HANDLER(srliq, 0x1F, 0x18, 0x17, 0x00000000, PPC_POWER_BR) | @@ -4890,7 +5233,9 @@ GEN_HANDLER(srliq, 0x1F, 0x18, 0x17, 0x00000000, PPC_POWER_BR) | ||
4890 | } | 5233 | } |
4891 | 5234 | ||
4892 | /* srlq */ | 5235 | /* srlq */ |
4893 | -GEN_HANDLER(srlq, 0x1F, 0x18, 0x16, 0x00000000, PPC_POWER_BR) | 5236 | +GEN_HANDLER(srlq, 0x1F, 0x18, 0x16, 0x00000000, PPC_POWER_BR); |
5237 | + | ||
5238 | +static void gen_srlq(DisasContext *ctx) | ||
4894 | { | 5239 | { |
4895 | int l1 = gen_new_label(); | 5240 | int l1 = gen_new_label(); |
4896 | int l2 = gen_new_label(); | 5241 | int l2 = gen_new_label(); |
@@ -4920,7 +5265,9 @@ GEN_HANDLER(srlq, 0x1F, 0x18, 0x16, 0x00000000, PPC_POWER_BR) | @@ -4920,7 +5265,9 @@ GEN_HANDLER(srlq, 0x1F, 0x18, 0x16, 0x00000000, PPC_POWER_BR) | ||
4920 | } | 5265 | } |
4921 | 5266 | ||
4922 | /* srq */ | 5267 | /* srq */ |
4923 | -GEN_HANDLER(srq, 0x1F, 0x18, 0x14, 0x00000000, PPC_POWER_BR) | 5268 | +GEN_HANDLER(srq, 0x1F, 0x18, 0x14, 0x00000000, PPC_POWER_BR); |
5269 | + | ||
5270 | +static void gen_srq(DisasContext *ctx) | ||
4924 | { | 5271 | { |
4925 | int l1 = gen_new_label(); | 5272 | int l1 = gen_new_label(); |
4926 | TCGv t0 = tcg_temp_new(); | 5273 | TCGv t0 = tcg_temp_new(); |
@@ -4944,21 +5291,27 @@ GEN_HANDLER(srq, 0x1F, 0x18, 0x14, 0x00000000, PPC_POWER_BR) | @@ -4944,21 +5291,27 @@ GEN_HANDLER(srq, 0x1F, 0x18, 0x14, 0x00000000, PPC_POWER_BR) | ||
4944 | 5291 | ||
4945 | /* PowerPC 602 specific instructions */ | 5292 | /* PowerPC 602 specific instructions */ |
4946 | /* dsa */ | 5293 | /* dsa */ |
4947 | -GEN_HANDLER(dsa, 0x1F, 0x14, 0x13, 0x03FFF801, PPC_602_SPEC) | 5294 | +GEN_HANDLER(dsa, 0x1F, 0x14, 0x13, 0x03FFF801, PPC_602_SPEC); |
5295 | + | ||
5296 | +static void gen_dsa(DisasContext *ctx) | ||
4948 | { | 5297 | { |
4949 | /* XXX: TODO */ | 5298 | /* XXX: TODO */ |
4950 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); | 5299 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); |
4951 | } | 5300 | } |
4952 | 5301 | ||
4953 | /* esa */ | 5302 | /* esa */ |
4954 | -GEN_HANDLER(esa, 0x1F, 0x14, 0x12, 0x03FFF801, PPC_602_SPEC) | 5303 | +GEN_HANDLER(esa, 0x1F, 0x14, 0x12, 0x03FFF801, PPC_602_SPEC); |
5304 | + | ||
5305 | +static void gen_esa(DisasContext *ctx) | ||
4955 | { | 5306 | { |
4956 | /* XXX: TODO */ | 5307 | /* XXX: TODO */ |
4957 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); | 5308 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); |
4958 | } | 5309 | } |
4959 | 5310 | ||
4960 | /* mfrom */ | 5311 | /* mfrom */ |
4961 | -GEN_HANDLER(mfrom, 0x1F, 0x09, 0x08, 0x03E0F801, PPC_602_SPEC) | 5312 | +GEN_HANDLER(mfrom, 0x1F, 0x09, 0x08, 0x03E0F801, PPC_602_SPEC); |
5313 | + | ||
5314 | +static void gen_mfrom(DisasContext *ctx) | ||
4962 | { | 5315 | { |
4963 | #if defined(CONFIG_USER_ONLY) | 5316 | #if defined(CONFIG_USER_ONLY) |
4964 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 5317 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5031,13 +5384,17 @@ GEN_HANDLER2(tlbli_74xx, "tlbli", 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_74xx_TLB) | @@ -5031,13 +5384,17 @@ GEN_HANDLER2(tlbli_74xx, "tlbli", 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_74xx_TLB) | ||
5031 | 5384 | ||
5032 | /* POWER instructions not in PowerPC 601 */ | 5385 | /* POWER instructions not in PowerPC 601 */ |
5033 | /* clf */ | 5386 | /* clf */ |
5034 | -GEN_HANDLER(clf, 0x1F, 0x16, 0x03, 0x03E00000, PPC_POWER) | 5387 | +GEN_HANDLER(clf, 0x1F, 0x16, 0x03, 0x03E00000, PPC_POWER); |
5388 | + | ||
5389 | +static void gen_clf(DisasContext *ctx) | ||
5035 | { | 5390 | { |
5036 | /* Cache line flush: implemented as no-op */ | 5391 | /* Cache line flush: implemented as no-op */ |
5037 | } | 5392 | } |
5038 | 5393 | ||
5039 | /* cli */ | 5394 | /* cli */ |
5040 | -GEN_HANDLER(cli, 0x1F, 0x16, 0x0F, 0x03E00000, PPC_POWER) | 5395 | +GEN_HANDLER(cli, 0x1F, 0x16, 0x0F, 0x03E00000, PPC_POWER); |
5396 | + | ||
5397 | +static void gen_cli(DisasContext *ctx) | ||
5041 | { | 5398 | { |
5042 | /* Cache line invalidate: privileged and treated as no-op */ | 5399 | /* Cache line invalidate: privileged and treated as no-op */ |
5043 | #if defined(CONFIG_USER_ONLY) | 5400 | #if defined(CONFIG_USER_ONLY) |
@@ -5051,12 +5408,16 @@ GEN_HANDLER(cli, 0x1F, 0x16, 0x0F, 0x03E00000, PPC_POWER) | @@ -5051,12 +5408,16 @@ GEN_HANDLER(cli, 0x1F, 0x16, 0x0F, 0x03E00000, PPC_POWER) | ||
5051 | } | 5408 | } |
5052 | 5409 | ||
5053 | /* dclst */ | 5410 | /* dclst */ |
5054 | -GEN_HANDLER(dclst, 0x1F, 0x16, 0x13, 0x03E00000, PPC_POWER) | 5411 | +GEN_HANDLER(dclst, 0x1F, 0x16, 0x13, 0x03E00000, PPC_POWER); |
5412 | + | ||
5413 | +static void gen_dclst(DisasContext *ctx) | ||
5055 | { | 5414 | { |
5056 | /* Data cache line store: treated as no-op */ | 5415 | /* Data cache line store: treated as no-op */ |
5057 | } | 5416 | } |
5058 | 5417 | ||
5059 | -GEN_HANDLER(mfsri, 0x1F, 0x13, 0x13, 0x00000001, PPC_POWER) | 5418 | +GEN_HANDLER(mfsri, 0x1F, 0x13, 0x13, 0x00000001, PPC_POWER); |
5419 | + | ||
5420 | +static void gen_mfsri(DisasContext *ctx) | ||
5060 | { | 5421 | { |
5061 | #if defined(CONFIG_USER_ONLY) | 5422 | #if defined(CONFIG_USER_ONLY) |
5062 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 5423 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5079,7 +5440,9 @@ GEN_HANDLER(mfsri, 0x1F, 0x13, 0x13, 0x00000001, PPC_POWER) | @@ -5079,7 +5440,9 @@ GEN_HANDLER(mfsri, 0x1F, 0x13, 0x13, 0x00000001, PPC_POWER) | ||
5079 | #endif | 5440 | #endif |
5080 | } | 5441 | } |
5081 | 5442 | ||
5082 | -GEN_HANDLER(rac, 0x1F, 0x12, 0x19, 0x00000001, PPC_POWER) | 5443 | +GEN_HANDLER(rac, 0x1F, 0x12, 0x19, 0x00000001, PPC_POWER); |
5444 | + | ||
5445 | +static void gen_rac(DisasContext *ctx) | ||
5083 | { | 5446 | { |
5084 | #if defined(CONFIG_USER_ONLY) | 5447 | #if defined(CONFIG_USER_ONLY) |
5085 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 5448 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5096,7 +5459,9 @@ GEN_HANDLER(rac, 0x1F, 0x12, 0x19, 0x00000001, PPC_POWER) | @@ -5096,7 +5459,9 @@ GEN_HANDLER(rac, 0x1F, 0x12, 0x19, 0x00000001, PPC_POWER) | ||
5096 | #endif | 5459 | #endif |
5097 | } | 5460 | } |
5098 | 5461 | ||
5099 | -GEN_HANDLER(rfsvc, 0x13, 0x12, 0x02, 0x03FFF0001, PPC_POWER) | 5462 | +GEN_HANDLER(rfsvc, 0x13, 0x12, 0x02, 0x03FFF0001, PPC_POWER); |
5463 | + | ||
5464 | +static void gen_rfsvc(DisasContext *ctx) | ||
5100 | { | 5465 | { |
5101 | #if defined(CONFIG_USER_ONLY) | 5466 | #if defined(CONFIG_USER_ONLY) |
5102 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 5467 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5116,7 +5481,9 @@ GEN_HANDLER(rfsvc, 0x13, 0x12, 0x02, 0x03FFF0001, PPC_POWER) | @@ -5116,7 +5481,9 @@ GEN_HANDLER(rfsvc, 0x13, 0x12, 0x02, 0x03FFF0001, PPC_POWER) | ||
5116 | /* Quad manipulation (load/store two floats at a time) */ | 5481 | /* Quad manipulation (load/store two floats at a time) */ |
5117 | 5482 | ||
5118 | /* lfq */ | 5483 | /* lfq */ |
5119 | -GEN_HANDLER(lfq, 0x38, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | 5484 | +GEN_HANDLER(lfq, 0x38, 0xFF, 0xFF, 0x00000003, PPC_POWER2); |
5485 | + | ||
5486 | +static void gen_lfq(DisasContext *ctx) | ||
5120 | { | 5487 | { |
5121 | int rd = rD(ctx->opcode); | 5488 | int rd = rD(ctx->opcode); |
5122 | TCGv t0; | 5489 | TCGv t0; |
@@ -5130,7 +5497,9 @@ GEN_HANDLER(lfq, 0x38, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | @@ -5130,7 +5497,9 @@ GEN_HANDLER(lfq, 0x38, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | ||
5130 | } | 5497 | } |
5131 | 5498 | ||
5132 | /* lfqu */ | 5499 | /* lfqu */ |
5133 | -GEN_HANDLER(lfqu, 0x39, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | 5500 | +GEN_HANDLER(lfqu, 0x39, 0xFF, 0xFF, 0x00000003, PPC_POWER2); |
5501 | + | ||
5502 | +static void gen_lfqu(DisasContext *ctx) | ||
5134 | { | 5503 | { |
5135 | int ra = rA(ctx->opcode); | 5504 | int ra = rA(ctx->opcode); |
5136 | int rd = rD(ctx->opcode); | 5505 | int rd = rD(ctx->opcode); |
@@ -5149,7 +5518,9 @@ GEN_HANDLER(lfqu, 0x39, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | @@ -5149,7 +5518,9 @@ GEN_HANDLER(lfqu, 0x39, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | ||
5149 | } | 5518 | } |
5150 | 5519 | ||
5151 | /* lfqux */ | 5520 | /* lfqux */ |
5152 | -GEN_HANDLER(lfqux, 0x1F, 0x17, 0x19, 0x00000001, PPC_POWER2) | 5521 | +GEN_HANDLER(lfqux, 0x1F, 0x17, 0x19, 0x00000001, PPC_POWER2); |
5522 | + | ||
5523 | +static void gen_lfqux(DisasContext *ctx) | ||
5153 | { | 5524 | { |
5154 | int ra = rA(ctx->opcode); | 5525 | int ra = rA(ctx->opcode); |
5155 | int rd = rD(ctx->opcode); | 5526 | int rd = rD(ctx->opcode); |
@@ -5168,7 +5539,9 @@ GEN_HANDLER(lfqux, 0x1F, 0x17, 0x19, 0x00000001, PPC_POWER2) | @@ -5168,7 +5539,9 @@ GEN_HANDLER(lfqux, 0x1F, 0x17, 0x19, 0x00000001, PPC_POWER2) | ||
5168 | } | 5539 | } |
5169 | 5540 | ||
5170 | /* lfqx */ | 5541 | /* lfqx */ |
5171 | -GEN_HANDLER(lfqx, 0x1F, 0x17, 0x18, 0x00000001, PPC_POWER2) | 5542 | +GEN_HANDLER(lfqx, 0x1F, 0x17, 0x18, 0x00000001, PPC_POWER2); |
5543 | + | ||
5544 | +static void gen_lfqx(DisasContext *ctx) | ||
5172 | { | 5545 | { |
5173 | int rd = rD(ctx->opcode); | 5546 | int rd = rD(ctx->opcode); |
5174 | TCGv t0; | 5547 | TCGv t0; |
@@ -5182,7 +5555,9 @@ GEN_HANDLER(lfqx, 0x1F, 0x17, 0x18, 0x00000001, PPC_POWER2) | @@ -5182,7 +5555,9 @@ GEN_HANDLER(lfqx, 0x1F, 0x17, 0x18, 0x00000001, PPC_POWER2) | ||
5182 | } | 5555 | } |
5183 | 5556 | ||
5184 | /* stfq */ | 5557 | /* stfq */ |
5185 | -GEN_HANDLER(stfq, 0x3C, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | 5558 | +GEN_HANDLER(stfq, 0x3C, 0xFF, 0xFF, 0x00000003, PPC_POWER2); |
5559 | + | ||
5560 | +static void gen_stfq(DisasContext *ctx) | ||
5186 | { | 5561 | { |
5187 | int rd = rD(ctx->opcode); | 5562 | int rd = rD(ctx->opcode); |
5188 | TCGv t0; | 5563 | TCGv t0; |
@@ -5196,7 +5571,9 @@ GEN_HANDLER(stfq, 0x3C, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | @@ -5196,7 +5571,9 @@ GEN_HANDLER(stfq, 0x3C, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | ||
5196 | } | 5571 | } |
5197 | 5572 | ||
5198 | /* stfqu */ | 5573 | /* stfqu */ |
5199 | -GEN_HANDLER(stfqu, 0x3D, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | 5574 | +GEN_HANDLER(stfqu, 0x3D, 0xFF, 0xFF, 0x00000003, PPC_POWER2); |
5575 | + | ||
5576 | +static void gen_stfqu(DisasContext *ctx) | ||
5200 | { | 5577 | { |
5201 | int ra = rA(ctx->opcode); | 5578 | int ra = rA(ctx->opcode); |
5202 | int rd = rD(ctx->opcode); | 5579 | int rd = rD(ctx->opcode); |
@@ -5215,7 +5592,9 @@ GEN_HANDLER(stfqu, 0x3D, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | @@ -5215,7 +5592,9 @@ GEN_HANDLER(stfqu, 0x3D, 0xFF, 0xFF, 0x00000003, PPC_POWER2) | ||
5215 | } | 5592 | } |
5216 | 5593 | ||
5217 | /* stfqux */ | 5594 | /* stfqux */ |
5218 | -GEN_HANDLER(stfqux, 0x1F, 0x17, 0x1D, 0x00000001, PPC_POWER2) | 5595 | +GEN_HANDLER(stfqux, 0x1F, 0x17, 0x1D, 0x00000001, PPC_POWER2); |
5596 | + | ||
5597 | +static void gen_stfqux(DisasContext *ctx) | ||
5219 | { | 5598 | { |
5220 | int ra = rA(ctx->opcode); | 5599 | int ra = rA(ctx->opcode); |
5221 | int rd = rD(ctx->opcode); | 5600 | int rd = rD(ctx->opcode); |
@@ -5234,7 +5613,9 @@ GEN_HANDLER(stfqux, 0x1F, 0x17, 0x1D, 0x00000001, PPC_POWER2) | @@ -5234,7 +5613,9 @@ GEN_HANDLER(stfqux, 0x1F, 0x17, 0x1D, 0x00000001, PPC_POWER2) | ||
5234 | } | 5613 | } |
5235 | 5614 | ||
5236 | /* stfqx */ | 5615 | /* stfqx */ |
5237 | -GEN_HANDLER(stfqx, 0x1F, 0x17, 0x1C, 0x00000001, PPC_POWER2) | 5616 | +GEN_HANDLER(stfqx, 0x1F, 0x17, 0x1C, 0x00000001, PPC_POWER2); |
5617 | + | ||
5618 | +static void gen_stfqx(DisasContext *ctx) | ||
5238 | { | 5619 | { |
5239 | int rd = rD(ctx->opcode); | 5620 | int rd = rD(ctx->opcode); |
5240 | TCGv t0; | 5621 | TCGv t0; |
@@ -5249,14 +5630,18 @@ GEN_HANDLER(stfqx, 0x1F, 0x17, 0x1C, 0x00000001, PPC_POWER2) | @@ -5249,14 +5630,18 @@ GEN_HANDLER(stfqx, 0x1F, 0x17, 0x1C, 0x00000001, PPC_POWER2) | ||
5249 | 5630 | ||
5250 | /* BookE specific instructions */ | 5631 | /* BookE specific instructions */ |
5251 | /* XXX: not implemented on 440 ? */ | 5632 | /* XXX: not implemented on 440 ? */ |
5252 | -GEN_HANDLER(mfapidi, 0x1F, 0x13, 0x08, 0x0000F801, PPC_MFAPIDI) | 5633 | +GEN_HANDLER(mfapidi, 0x1F, 0x13, 0x08, 0x0000F801, PPC_MFAPIDI); |
5634 | + | ||
5635 | +static void gen_mfapidi(DisasContext *ctx) | ||
5253 | { | 5636 | { |
5254 | /* XXX: TODO */ | 5637 | /* XXX: TODO */ |
5255 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); | 5638 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); |
5256 | } | 5639 | } |
5257 | 5640 | ||
5258 | /* XXX: not implemented on 440 ? */ | 5641 | /* XXX: not implemented on 440 ? */ |
5259 | -GEN_HANDLER(tlbiva, 0x1F, 0x12, 0x18, 0x03FFF801, PPC_TLBIVA) | 5642 | +GEN_HANDLER(tlbiva, 0x1F, 0x12, 0x18, 0x03FFF801, PPC_TLBIVA); |
5643 | + | ||
5644 | +static void gen_tlbiva(DisasContext *ctx) | ||
5260 | { | 5645 | { |
5261 | #if defined(CONFIG_USER_ONLY) | 5646 | #if defined(CONFIG_USER_ONLY) |
5262 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 5647 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5396,7 +5781,9 @@ static always_inline void gen_405_mulladd_insn (DisasContext *ctx, | @@ -5396,7 +5781,9 @@ static always_inline void gen_405_mulladd_insn (DisasContext *ctx, | ||
5396 | } | 5781 | } |
5397 | 5782 | ||
5398 | #define GEN_MAC_HANDLER(name, opc2, opc3) \ | 5783 | #define GEN_MAC_HANDLER(name, opc2, opc3) \ |
5399 | -GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_405_MAC) \ | 5784 | +GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_405_MAC); \ |
5785 | + \ | ||
5786 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
5400 | { \ | 5787 | { \ |
5401 | gen_405_mulladd_insn(ctx, opc2, opc3, rA(ctx->opcode), rB(ctx->opcode), \ | 5788 | gen_405_mulladd_insn(ctx, opc2, opc3, rA(ctx->opcode), rB(ctx->opcode), \ |
5402 | rD(ctx->opcode), Rc(ctx->opcode)); \ | 5789 | rD(ctx->opcode), Rc(ctx->opcode)); \ |
@@ -5489,7 +5876,9 @@ GEN_MAC_HANDLER(mullhw, 0x08, 0x0D); | @@ -5489,7 +5876,9 @@ GEN_MAC_HANDLER(mullhw, 0x08, 0x0D); | ||
5489 | GEN_MAC_HANDLER(mullhwu, 0x08, 0x0C); | 5876 | GEN_MAC_HANDLER(mullhwu, 0x08, 0x0C); |
5490 | 5877 | ||
5491 | /* mfdcr */ | 5878 | /* mfdcr */ |
5492 | -GEN_HANDLER(mfdcr, 0x1F, 0x03, 0x0A, 0x00000001, PPC_DCR) | 5879 | +GEN_HANDLER(mfdcr, 0x1F, 0x03, 0x0A, 0x00000001, PPC_DCR); |
5880 | + | ||
5881 | +static void gen_mfdcr(DisasContext *ctx) | ||
5493 | { | 5882 | { |
5494 | #if defined(CONFIG_USER_ONLY) | 5883 | #if defined(CONFIG_USER_ONLY) |
5495 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 5884 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -5508,7 +5897,9 @@ GEN_HANDLER(mfdcr, 0x1F, 0x03, 0x0A, 0x00000001, PPC_DCR) | @@ -5508,7 +5897,9 @@ GEN_HANDLER(mfdcr, 0x1F, 0x03, 0x0A, 0x00000001, PPC_DCR) | ||
5508 | } | 5897 | } |
5509 | 5898 | ||
5510 | /* mtdcr */ | 5899 | /* mtdcr */ |
5511 | -GEN_HANDLER(mtdcr, 0x1F, 0x03, 0x0E, 0x00000001, PPC_DCR) | 5900 | +GEN_HANDLER(mtdcr, 0x1F, 0x03, 0x0E, 0x00000001, PPC_DCR); |
5901 | + | ||
5902 | +static void gen_mtdcr(DisasContext *ctx) | ||
5512 | { | 5903 | { |
5513 | #if defined(CONFIG_USER_ONLY) | 5904 | #if defined(CONFIG_USER_ONLY) |
5514 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 5905 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -5528,7 +5919,9 @@ GEN_HANDLER(mtdcr, 0x1F, 0x03, 0x0E, 0x00000001, PPC_DCR) | @@ -5528,7 +5919,9 @@ GEN_HANDLER(mtdcr, 0x1F, 0x03, 0x0E, 0x00000001, PPC_DCR) | ||
5528 | 5919 | ||
5529 | /* mfdcrx */ | 5920 | /* mfdcrx */ |
5530 | /* XXX: not implemented on 440 ? */ | 5921 | /* XXX: not implemented on 440 ? */ |
5531 | -GEN_HANDLER(mfdcrx, 0x1F, 0x03, 0x08, 0x00000000, PPC_DCRX) | 5922 | +GEN_HANDLER(mfdcrx, 0x1F, 0x03, 0x08, 0x00000000, PPC_DCRX); |
5923 | + | ||
5924 | +static void gen_mfdcrx(DisasContext *ctx) | ||
5532 | { | 5925 | { |
5533 | #if defined(CONFIG_USER_ONLY) | 5926 | #if defined(CONFIG_USER_ONLY) |
5534 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 5927 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -5546,7 +5939,9 @@ GEN_HANDLER(mfdcrx, 0x1F, 0x03, 0x08, 0x00000000, PPC_DCRX) | @@ -5546,7 +5939,9 @@ GEN_HANDLER(mfdcrx, 0x1F, 0x03, 0x08, 0x00000000, PPC_DCRX) | ||
5546 | 5939 | ||
5547 | /* mtdcrx */ | 5940 | /* mtdcrx */ |
5548 | /* XXX: not implemented on 440 ? */ | 5941 | /* XXX: not implemented on 440 ? */ |
5549 | -GEN_HANDLER(mtdcrx, 0x1F, 0x03, 0x0C, 0x00000000, PPC_DCRX) | 5942 | +GEN_HANDLER(mtdcrx, 0x1F, 0x03, 0x0C, 0x00000000, PPC_DCRX); |
5943 | + | ||
5944 | +static void gen_mtdcrx(DisasContext *ctx) | ||
5550 | { | 5945 | { |
5551 | #if defined(CONFIG_USER_ONLY) | 5946 | #if defined(CONFIG_USER_ONLY) |
5552 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); | 5947 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
@@ -5563,7 +5958,9 @@ GEN_HANDLER(mtdcrx, 0x1F, 0x03, 0x0C, 0x00000000, PPC_DCRX) | @@ -5563,7 +5958,9 @@ GEN_HANDLER(mtdcrx, 0x1F, 0x03, 0x0C, 0x00000000, PPC_DCRX) | ||
5563 | } | 5958 | } |
5564 | 5959 | ||
5565 | /* mfdcrux (PPC 460) : user-mode access to DCR */ | 5960 | /* mfdcrux (PPC 460) : user-mode access to DCR */ |
5566 | -GEN_HANDLER(mfdcrux, 0x1F, 0x03, 0x09, 0x00000000, PPC_DCRUX) | 5961 | +GEN_HANDLER(mfdcrux, 0x1F, 0x03, 0x09, 0x00000000, PPC_DCRUX); |
5962 | + | ||
5963 | +static void gen_mfdcrux(DisasContext *ctx) | ||
5567 | { | 5964 | { |
5568 | /* NIP cannot be restored if the memory exception comes from an helper */ | 5965 | /* NIP cannot be restored if the memory exception comes from an helper */ |
5569 | gen_update_nip(ctx, ctx->nip - 4); | 5966 | gen_update_nip(ctx, ctx->nip - 4); |
@@ -5572,7 +5969,9 @@ GEN_HANDLER(mfdcrux, 0x1F, 0x03, 0x09, 0x00000000, PPC_DCRUX) | @@ -5572,7 +5969,9 @@ GEN_HANDLER(mfdcrux, 0x1F, 0x03, 0x09, 0x00000000, PPC_DCRUX) | ||
5572 | } | 5969 | } |
5573 | 5970 | ||
5574 | /* mtdcrux (PPC 460) : user-mode access to DCR */ | 5971 | /* mtdcrux (PPC 460) : user-mode access to DCR */ |
5575 | -GEN_HANDLER(mtdcrux, 0x1F, 0x03, 0x0D, 0x00000000, PPC_DCRUX) | 5972 | +GEN_HANDLER(mtdcrux, 0x1F, 0x03, 0x0D, 0x00000000, PPC_DCRUX); |
5973 | + | ||
5974 | +static void gen_mtdcrux(DisasContext *ctx) | ||
5576 | { | 5975 | { |
5577 | /* NIP cannot be restored if the memory exception comes from an helper */ | 5976 | /* NIP cannot be restored if the memory exception comes from an helper */ |
5578 | gen_update_nip(ctx, ctx->nip - 4); | 5977 | gen_update_nip(ctx, ctx->nip - 4); |
@@ -5581,7 +5980,9 @@ GEN_HANDLER(mtdcrux, 0x1F, 0x03, 0x0D, 0x00000000, PPC_DCRUX) | @@ -5581,7 +5980,9 @@ GEN_HANDLER(mtdcrux, 0x1F, 0x03, 0x0D, 0x00000000, PPC_DCRUX) | ||
5581 | } | 5980 | } |
5582 | 5981 | ||
5583 | /* dccci */ | 5982 | /* dccci */ |
5584 | -GEN_HANDLER(dccci, 0x1F, 0x06, 0x0E, 0x03E00001, PPC_4xx_COMMON) | 5983 | +GEN_HANDLER(dccci, 0x1F, 0x06, 0x0E, 0x03E00001, PPC_4xx_COMMON); |
5984 | + | ||
5985 | +static void gen_dccci(DisasContext *ctx) | ||
5585 | { | 5986 | { |
5586 | #if defined(CONFIG_USER_ONLY) | 5987 | #if defined(CONFIG_USER_ONLY) |
5587 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 5988 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5595,7 +5996,9 @@ GEN_HANDLER(dccci, 0x1F, 0x06, 0x0E, 0x03E00001, PPC_4xx_COMMON) | @@ -5595,7 +5996,9 @@ GEN_HANDLER(dccci, 0x1F, 0x06, 0x0E, 0x03E00001, PPC_4xx_COMMON) | ||
5595 | } | 5996 | } |
5596 | 5997 | ||
5597 | /* dcread */ | 5998 | /* dcread */ |
5598 | -GEN_HANDLER(dcread, 0x1F, 0x06, 0x0F, 0x00000001, PPC_4xx_COMMON) | 5999 | +GEN_HANDLER(dcread, 0x1F, 0x06, 0x0F, 0x00000001, PPC_4xx_COMMON); |
6000 | + | ||
6001 | +static void gen_dcread(DisasContext *ctx) | ||
5599 | { | 6002 | { |
5600 | #if defined(CONFIG_USER_ONLY) | 6003 | #if defined(CONFIG_USER_ONLY) |
5601 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 6004 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5626,7 +6029,9 @@ GEN_HANDLER2(icbt_40x, "icbt", 0x1F, 0x06, 0x08, 0x03E00001, PPC_40x_ICBT) | @@ -5626,7 +6029,9 @@ GEN_HANDLER2(icbt_40x, "icbt", 0x1F, 0x06, 0x08, 0x03E00001, PPC_40x_ICBT) | ||
5626 | } | 6029 | } |
5627 | 6030 | ||
5628 | /* iccci */ | 6031 | /* iccci */ |
5629 | -GEN_HANDLER(iccci, 0x1F, 0x06, 0x1E, 0x00000001, PPC_4xx_COMMON) | 6032 | +GEN_HANDLER(iccci, 0x1F, 0x06, 0x1E, 0x00000001, PPC_4xx_COMMON); |
6033 | + | ||
6034 | +static void gen_iccci(DisasContext *ctx) | ||
5630 | { | 6035 | { |
5631 | #if defined(CONFIG_USER_ONLY) | 6036 | #if defined(CONFIG_USER_ONLY) |
5632 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 6037 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5640,7 +6045,9 @@ GEN_HANDLER(iccci, 0x1F, 0x06, 0x1E, 0x00000001, PPC_4xx_COMMON) | @@ -5640,7 +6045,9 @@ GEN_HANDLER(iccci, 0x1F, 0x06, 0x1E, 0x00000001, PPC_4xx_COMMON) | ||
5640 | } | 6045 | } |
5641 | 6046 | ||
5642 | /* icread */ | 6047 | /* icread */ |
5643 | -GEN_HANDLER(icread, 0x1F, 0x06, 0x1F, 0x03E00001, PPC_4xx_COMMON) | 6048 | +GEN_HANDLER(icread, 0x1F, 0x06, 0x1F, 0x03E00001, PPC_4xx_COMMON); |
6049 | + | ||
6050 | +static void gen_icread(DisasContext *ctx) | ||
5644 | { | 6051 | { |
5645 | #if defined(CONFIG_USER_ONLY) | 6052 | #if defined(CONFIG_USER_ONLY) |
5646 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 6053 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5669,7 +6076,9 @@ GEN_HANDLER2(rfci_40x, "rfci", 0x13, 0x13, 0x01, 0x03FF8001, PPC_40x_EXCP) | @@ -5669,7 +6076,9 @@ GEN_HANDLER2(rfci_40x, "rfci", 0x13, 0x13, 0x01, 0x03FF8001, PPC_40x_EXCP) | ||
5669 | #endif | 6076 | #endif |
5670 | } | 6077 | } |
5671 | 6078 | ||
5672 | -GEN_HANDLER(rfci, 0x13, 0x13, 0x01, 0x03FF8001, PPC_BOOKE) | 6079 | +GEN_HANDLER(rfci, 0x13, 0x13, 0x01, 0x03FF8001, PPC_BOOKE); |
6080 | + | ||
6081 | +static void gen_rfci(DisasContext *ctx) | ||
5673 | { | 6082 | { |
5674 | #if defined(CONFIG_USER_ONLY) | 6083 | #if defined(CONFIG_USER_ONLY) |
5675 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 6084 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5686,7 +6095,9 @@ GEN_HANDLER(rfci, 0x13, 0x13, 0x01, 0x03FF8001, PPC_BOOKE) | @@ -5686,7 +6095,9 @@ GEN_HANDLER(rfci, 0x13, 0x13, 0x01, 0x03FF8001, PPC_BOOKE) | ||
5686 | 6095 | ||
5687 | /* BookE specific */ | 6096 | /* BookE specific */ |
5688 | /* XXX: not implemented on 440 ? */ | 6097 | /* XXX: not implemented on 440 ? */ |
5689 | -GEN_HANDLER(rfdi, 0x13, 0x07, 0x01, 0x03FF8001, PPC_RFDI) | 6098 | +GEN_HANDLER(rfdi, 0x13, 0x07, 0x01, 0x03FF8001, PPC_RFDI); |
6099 | + | ||
6100 | +static void gen_rfdi(DisasContext *ctx) | ||
5690 | { | 6101 | { |
5691 | #if defined(CONFIG_USER_ONLY) | 6102 | #if defined(CONFIG_USER_ONLY) |
5692 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 6103 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5702,7 +6113,9 @@ GEN_HANDLER(rfdi, 0x13, 0x07, 0x01, 0x03FF8001, PPC_RFDI) | @@ -5702,7 +6113,9 @@ GEN_HANDLER(rfdi, 0x13, 0x07, 0x01, 0x03FF8001, PPC_RFDI) | ||
5702 | } | 6113 | } |
5703 | 6114 | ||
5704 | /* XXX: not implemented on 440 ? */ | 6115 | /* XXX: not implemented on 440 ? */ |
5705 | -GEN_HANDLER(rfmci, 0x13, 0x06, 0x01, 0x03FF8001, PPC_RFMCI) | 6116 | +GEN_HANDLER(rfmci, 0x13, 0x06, 0x01, 0x03FF8001, PPC_RFMCI); |
6117 | + | ||
6118 | +static void gen_rfmci(DisasContext *ctx) | ||
5706 | { | 6119 | { |
5707 | #if defined(CONFIG_USER_ONLY) | 6120 | #if defined(CONFIG_USER_ONLY) |
5708 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 6121 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5876,7 +6289,9 @@ GEN_HANDLER2(tlbwe_440, "tlbwe", 0x1F, 0x12, 0x1E, 0x00000001, PPC_BOOKE) | @@ -5876,7 +6289,9 @@ GEN_HANDLER2(tlbwe_440, "tlbwe", 0x1F, 0x12, 0x1E, 0x00000001, PPC_BOOKE) | ||
5876 | } | 6289 | } |
5877 | 6290 | ||
5878 | /* wrtee */ | 6291 | /* wrtee */ |
5879 | -GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_WRTEE) | 6292 | +GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_WRTEE); |
6293 | + | ||
6294 | +static void gen_wrtee(DisasContext *ctx) | ||
5880 | { | 6295 | { |
5881 | #if defined(CONFIG_USER_ONLY) | 6296 | #if defined(CONFIG_USER_ONLY) |
5882 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 6297 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5899,7 +6314,9 @@ GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_WRTEE) | @@ -5899,7 +6314,9 @@ GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_WRTEE) | ||
5899 | } | 6314 | } |
5900 | 6315 | ||
5901 | /* wrteei */ | 6316 | /* wrteei */ |
5902 | -GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_WRTEE) | 6317 | +GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_WRTEE); |
6318 | + | ||
6319 | +static void gen_wrteei(DisasContext *ctx) | ||
5903 | { | 6320 | { |
5904 | #if defined(CONFIG_USER_ONLY) | 6321 | #if defined(CONFIG_USER_ONLY) |
5905 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); | 6322 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_OPC); |
@@ -5920,7 +6337,9 @@ GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_WRTEE) | @@ -5920,7 +6337,9 @@ GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_WRTEE) | ||
5920 | 6337 | ||
5921 | /* PowerPC 440 specific instructions */ | 6338 | /* PowerPC 440 specific instructions */ |
5922 | /* dlmzb */ | 6339 | /* dlmzb */ |
5923 | -GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC) | 6340 | +GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC); |
6341 | + | ||
6342 | +static void gen_dlmzb(DisasContext *ctx) | ||
5924 | { | 6343 | { |
5925 | TCGv_i32 t0 = tcg_const_i32(Rc(ctx->opcode)); | 6344 | TCGv_i32 t0 = tcg_const_i32(Rc(ctx->opcode)); |
5926 | gen_helper_dlmzb(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], | 6345 | gen_helper_dlmzb(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], |
@@ -5929,13 +6348,17 @@ GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC) | @@ -5929,13 +6348,17 @@ GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC) | ||
5929 | } | 6348 | } |
5930 | 6349 | ||
5931 | /* mbar replaces eieio on 440 */ | 6350 | /* mbar replaces eieio on 440 */ |
5932 | -GEN_HANDLER(mbar, 0x1F, 0x16, 0x1a, 0x001FF801, PPC_BOOKE) | 6351 | +GEN_HANDLER(mbar, 0x1F, 0x16, 0x1a, 0x001FF801, PPC_BOOKE); |
6352 | + | ||
6353 | +static void gen_mbar(DisasContext *ctx) | ||
5933 | { | 6354 | { |
5934 | /* interpreted as no-op */ | 6355 | /* interpreted as no-op */ |
5935 | } | 6356 | } |
5936 | 6357 | ||
5937 | /* msync replaces sync on 440 */ | 6358 | /* msync replaces sync on 440 */ |
5938 | -GEN_HANDLER(msync, 0x1F, 0x16, 0x12, 0x03FFF801, PPC_BOOKE) | 6359 | +GEN_HANDLER(msync, 0x1F, 0x16, 0x12, 0x03FFF801, PPC_BOOKE); |
6360 | + | ||
6361 | +static void gen_msync(DisasContext *ctx) | ||
5939 | { | 6362 | { |
5940 | /* interpreted as no-op */ | 6363 | /* interpreted as no-op */ |
5941 | } | 6364 | } |
@@ -5960,7 +6383,9 @@ static always_inline TCGv_ptr gen_avr_ptr(int reg) | @@ -5960,7 +6383,9 @@ static always_inline TCGv_ptr gen_avr_ptr(int reg) | ||
5960 | } | 6383 | } |
5961 | 6384 | ||
5962 | #define GEN_VR_LDX(name, opc2, opc3) \ | 6385 | #define GEN_VR_LDX(name, opc2, opc3) \ |
5963 | -GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \ | 6386 | +GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC); \ |
6387 | + \ | ||
6388 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
5964 | { \ | 6389 | { \ |
5965 | TCGv EA; \ | 6390 | TCGv EA; \ |
5966 | if (unlikely(!ctx->altivec_enabled)) { \ | 6391 | if (unlikely(!ctx->altivec_enabled)) { \ |
@@ -5984,7 +6409,9 @@ GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \ | @@ -5984,7 +6409,9 @@ GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \ | ||
5984 | } | 6409 | } |
5985 | 6410 | ||
5986 | #define GEN_VR_STX(name, opc2, opc3) \ | 6411 | #define GEN_VR_STX(name, opc2, opc3) \ |
5987 | -GEN_HANDLER(st##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \ | 6412 | +GEN_HANDLER(st##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC); \ |
6413 | + \ | ||
6414 | +static void gen_st##name(DisasContext *ctx) \ | ||
5988 | { \ | 6415 | { \ |
5989 | TCGv EA; \ | 6416 | TCGv EA; \ |
5990 | if (unlikely(!ctx->altivec_enabled)) { \ | 6417 | if (unlikely(!ctx->altivec_enabled)) { \ |
@@ -6008,7 +6435,9 @@ GEN_HANDLER(st##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \ | @@ -6008,7 +6435,9 @@ GEN_HANDLER(st##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \ | ||
6008 | } | 6435 | } |
6009 | 6436 | ||
6010 | #define GEN_VR_LVE(name, opc2, opc3) \ | 6437 | #define GEN_VR_LVE(name, opc2, opc3) \ |
6011 | - GEN_HANDLER(lve##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \ | 6438 | + GEN_HANDLER(lve##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC); \ |
6439 | + \ | ||
6440 | +static void gen_lve##name(DisasContext *ctx) \ | ||
6012 | { \ | 6441 | { \ |
6013 | TCGv EA; \ | 6442 | TCGv EA; \ |
6014 | TCGv_ptr rs; \ | 6443 | TCGv_ptr rs; \ |
@@ -6026,7 +6455,9 @@ GEN_HANDLER(st##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \ | @@ -6026,7 +6455,9 @@ GEN_HANDLER(st##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \ | ||
6026 | } | 6455 | } |
6027 | 6456 | ||
6028 | #define GEN_VR_STVE(name, opc2, opc3) \ | 6457 | #define GEN_VR_STVE(name, opc2, opc3) \ |
6029 | - GEN_HANDLER(stve##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC) \ | 6458 | + GEN_HANDLER(stve##name, 0x1F, opc2, opc3, 0x00000001, PPC_ALTIVEC); \ |
6459 | + \ | ||
6460 | +static void gen_stve##name(DisasContext *ctx) \ | ||
6030 | { \ | 6461 | { \ |
6031 | TCGv EA; \ | 6462 | TCGv EA; \ |
6032 | TCGv_ptr rs; \ | 6463 | TCGv_ptr rs; \ |
@@ -6059,7 +6490,9 @@ GEN_VR_STVE(bx, 0x07, 0x04); | @@ -6059,7 +6490,9 @@ GEN_VR_STVE(bx, 0x07, 0x04); | ||
6059 | GEN_VR_STVE(hx, 0x07, 0x05); | 6490 | GEN_VR_STVE(hx, 0x07, 0x05); |
6060 | GEN_VR_STVE(wx, 0x07, 0x06); | 6491 | GEN_VR_STVE(wx, 0x07, 0x06); |
6061 | 6492 | ||
6062 | -GEN_HANDLER(lvsl, 0x1f, 0x06, 0x00, 0x00000001, PPC_ALTIVEC) | 6493 | +GEN_HANDLER(lvsl, 0x1f, 0x06, 0x00, 0x00000001, PPC_ALTIVEC); |
6494 | + | ||
6495 | +static void gen_lvsl(DisasContext *ctx) | ||
6063 | { | 6496 | { |
6064 | TCGv_ptr rd; | 6497 | TCGv_ptr rd; |
6065 | TCGv EA; | 6498 | TCGv EA; |
@@ -6075,7 +6508,9 @@ GEN_HANDLER(lvsl, 0x1f, 0x06, 0x00, 0x00000001, PPC_ALTIVEC) | @@ -6075,7 +6508,9 @@ GEN_HANDLER(lvsl, 0x1f, 0x06, 0x00, 0x00000001, PPC_ALTIVEC) | ||
6075 | tcg_temp_free_ptr(rd); | 6508 | tcg_temp_free_ptr(rd); |
6076 | } | 6509 | } |
6077 | 6510 | ||
6078 | -GEN_HANDLER(lvsr, 0x1f, 0x06, 0x01, 0x00000001, PPC_ALTIVEC) | 6511 | +GEN_HANDLER(lvsr, 0x1f, 0x06, 0x01, 0x00000001, PPC_ALTIVEC); |
6512 | + | ||
6513 | +static void gen_lvsr(DisasContext *ctx) | ||
6079 | { | 6514 | { |
6080 | TCGv_ptr rd; | 6515 | TCGv_ptr rd; |
6081 | TCGv EA; | 6516 | TCGv EA; |
@@ -6091,7 +6526,9 @@ GEN_HANDLER(lvsr, 0x1f, 0x06, 0x01, 0x00000001, PPC_ALTIVEC) | @@ -6091,7 +6526,9 @@ GEN_HANDLER(lvsr, 0x1f, 0x06, 0x01, 0x00000001, PPC_ALTIVEC) | ||
6091 | tcg_temp_free_ptr(rd); | 6526 | tcg_temp_free_ptr(rd); |
6092 | } | 6527 | } |
6093 | 6528 | ||
6094 | -GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC) | 6529 | +GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC); |
6530 | + | ||
6531 | +static void gen_mfvscr(DisasContext *ctx) | ||
6095 | { | 6532 | { |
6096 | TCGv_i32 t; | 6533 | TCGv_i32 t; |
6097 | if (unlikely(!ctx->altivec_enabled)) { | 6534 | if (unlikely(!ctx->altivec_enabled)) { |
@@ -6105,7 +6542,9 @@ GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC) | @@ -6105,7 +6542,9 @@ GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC) | ||
6105 | tcg_temp_free_i32(t); | 6542 | tcg_temp_free_i32(t); |
6106 | } | 6543 | } |
6107 | 6544 | ||
6108 | -GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC) | 6545 | +GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC); |
6546 | + | ||
6547 | +static void gen_mtvscr(DisasContext *ctx) | ||
6109 | { | 6548 | { |
6110 | TCGv_ptr p; | 6549 | TCGv_ptr p; |
6111 | if (unlikely(!ctx->altivec_enabled)) { | 6550 | if (unlikely(!ctx->altivec_enabled)) { |
@@ -6119,7 +6558,9 @@ GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC) | @@ -6119,7 +6558,9 @@ GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC) | ||
6119 | 6558 | ||
6120 | /* Logical operations */ | 6559 | /* Logical operations */ |
6121 | #define GEN_VX_LOGICAL(name, tcg_op, opc2, opc3) \ | 6560 | #define GEN_VX_LOGICAL(name, tcg_op, opc2, opc3) \ |
6122 | -GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ | 6561 | +GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC); \ |
6562 | + \ | ||
6563 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
6123 | { \ | 6564 | { \ |
6124 | if (unlikely(!ctx->altivec_enabled)) { \ | 6565 | if (unlikely(!ctx->altivec_enabled)) { \ |
6125 | gen_exception(ctx, POWERPC_EXCP_VPU); \ | 6566 | gen_exception(ctx, POWERPC_EXCP_VPU); \ |
@@ -6136,7 +6577,9 @@ GEN_VX_LOGICAL(vxor, tcg_gen_xor_i64, 2, 19); | @@ -6136,7 +6577,9 @@ GEN_VX_LOGICAL(vxor, tcg_gen_xor_i64, 2, 19); | ||
6136 | GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 2, 20); | 6577 | GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 2, 20); |
6137 | 6578 | ||
6138 | #define GEN_VXFORM(name, opc2, opc3) \ | 6579 | #define GEN_VXFORM(name, opc2, opc3) \ |
6139 | -GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ | 6580 | +GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC); \ |
6581 | + \ | ||
6582 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
6140 | { \ | 6583 | { \ |
6141 | TCGv_ptr ra, rb, rd; \ | 6584 | TCGv_ptr ra, rb, rd; \ |
6142 | if (unlikely(!ctx->altivec_enabled)) { \ | 6585 | if (unlikely(!ctx->altivec_enabled)) { \ |
@@ -6275,7 +6718,9 @@ GEN_VXRFORM(vcmpgtfp, 3, 11) | @@ -6275,7 +6718,9 @@ GEN_VXRFORM(vcmpgtfp, 3, 11) | ||
6275 | GEN_VXRFORM(vcmpbfp, 3, 15) | 6718 | GEN_VXRFORM(vcmpbfp, 3, 15) |
6276 | 6719 | ||
6277 | #define GEN_VXFORM_SIMM(name, opc2, opc3) \ | 6720 | #define GEN_VXFORM_SIMM(name, opc2, opc3) \ |
6278 | - GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ | 6721 | + GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC); \ |
6722 | + \ | ||
6723 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
6279 | { \ | 6724 | { \ |
6280 | TCGv_ptr rd; \ | 6725 | TCGv_ptr rd; \ |
6281 | TCGv_i32 simm; \ | 6726 | TCGv_i32 simm; \ |
@@ -6295,7 +6740,9 @@ GEN_VXFORM_SIMM(vspltish, 6, 13); | @@ -6295,7 +6740,9 @@ GEN_VXFORM_SIMM(vspltish, 6, 13); | ||
6295 | GEN_VXFORM_SIMM(vspltisw, 6, 14); | 6740 | GEN_VXFORM_SIMM(vspltisw, 6, 14); |
6296 | 6741 | ||
6297 | #define GEN_VXFORM_NOA(name, opc2, opc3) \ | 6742 | #define GEN_VXFORM_NOA(name, opc2, opc3) \ |
6298 | - GEN_HANDLER(name, 0x04, opc2, opc3, 0x001f0000, PPC_ALTIVEC) \ | 6743 | + GEN_HANDLER(name, 0x04, opc2, opc3, 0x001f0000, PPC_ALTIVEC); \ |
6744 | + \ | ||
6745 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
6299 | { \ | 6746 | { \ |
6300 | TCGv_ptr rb, rd; \ | 6747 | TCGv_ptr rb, rd; \ |
6301 | if (unlikely(!ctx->altivec_enabled)) { \ | 6748 | if (unlikely(!ctx->altivec_enabled)) { \ |
@@ -6324,7 +6771,9 @@ GEN_VXFORM_NOA(vrfip, 5, 10); | @@ -6324,7 +6771,9 @@ GEN_VXFORM_NOA(vrfip, 5, 10); | ||
6324 | GEN_VXFORM_NOA(vrfiz, 5, 11); | 6771 | GEN_VXFORM_NOA(vrfiz, 5, 11); |
6325 | 6772 | ||
6326 | #define GEN_VXFORM_SIMM(name, opc2, opc3) \ | 6773 | #define GEN_VXFORM_SIMM(name, opc2, opc3) \ |
6327 | - GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ | 6774 | + GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC); \ |
6775 | + \ | ||
6776 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
6328 | { \ | 6777 | { \ |
6329 | TCGv_ptr rd; \ | 6778 | TCGv_ptr rd; \ |
6330 | TCGv_i32 simm; \ | 6779 | TCGv_i32 simm; \ |
@@ -6340,7 +6789,9 @@ GEN_VXFORM_NOA(vrfiz, 5, 11); | @@ -6340,7 +6789,9 @@ GEN_VXFORM_NOA(vrfiz, 5, 11); | ||
6340 | } | 6789 | } |
6341 | 6790 | ||
6342 | #define GEN_VXFORM_UIMM(name, opc2, opc3) \ | 6791 | #define GEN_VXFORM_UIMM(name, opc2, opc3) \ |
6343 | - GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ | 6792 | + GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC); \ |
6793 | + \ | ||
6794 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
6344 | { \ | 6795 | { \ |
6345 | TCGv_ptr rb, rd; \ | 6796 | TCGv_ptr rb, rd; \ |
6346 | TCGv_i32 uimm; \ | 6797 | TCGv_i32 uimm; \ |
@@ -6365,7 +6816,9 @@ GEN_VXFORM_UIMM(vcfsx, 5, 13); | @@ -6365,7 +6816,9 @@ GEN_VXFORM_UIMM(vcfsx, 5, 13); | ||
6365 | GEN_VXFORM_UIMM(vctuxs, 5, 14); | 6816 | GEN_VXFORM_UIMM(vctuxs, 5, 14); |
6366 | GEN_VXFORM_UIMM(vctsxs, 5, 15); | 6817 | GEN_VXFORM_UIMM(vctsxs, 5, 15); |
6367 | 6818 | ||
6368 | -GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) | 6819 | +GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC); |
6820 | + | ||
6821 | +static void gen_vsldoi(DisasContext *ctx) | ||
6369 | { | 6822 | { |
6370 | TCGv_ptr ra, rb, rd; | 6823 | TCGv_ptr ra, rb, rd; |
6371 | TCGv_i32 sh; | 6824 | TCGv_i32 sh; |
@@ -6385,7 +6838,9 @@ GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) | @@ -6385,7 +6838,9 @@ GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) | ||
6385 | } | 6838 | } |
6386 | 6839 | ||
6387 | #define GEN_VAFORM_PAIRED(name0, name1, opc2) \ | 6840 | #define GEN_VAFORM_PAIRED(name0, name1, opc2) \ |
6388 | - GEN_HANDLER(name0##_##name1, 0x04, opc2, 0xFF, 0x00000000, PPC_ALTIVEC) \ | 6841 | + GEN_HANDLER(name0##_##name1, 0x04, opc2, 0xFF, 0x00000000, PPC_ALTIVEC);\ |
6842 | + \ | ||
6843 | +static void glue(gen_, name0##_##name1)(DisasContext *ctx) \ | ||
6389 | { \ | 6844 | { \ |
6390 | TCGv_ptr ra, rb, rc, rd; \ | 6845 | TCGv_ptr ra, rb, rc, rd; \ |
6391 | if (unlikely(!ctx->altivec_enabled)) { \ | 6846 | if (unlikely(!ctx->altivec_enabled)) { \ |
@@ -6409,7 +6864,9 @@ GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) | @@ -6409,7 +6864,9 @@ GEN_HANDLER(vsldoi, 0x04, 0x16, 0xFF, 0x00000400, PPC_ALTIVEC) | ||
6409 | 6864 | ||
6410 | GEN_VAFORM_PAIRED(vmhaddshs, vmhraddshs, 16) | 6865 | GEN_VAFORM_PAIRED(vmhaddshs, vmhraddshs, 16) |
6411 | 6866 | ||
6412 | -GEN_HANDLER(vmladduhm, 0x04, 0x11, 0xFF, 0x00000000, PPC_ALTIVEC) | 6867 | +GEN_HANDLER(vmladduhm, 0x04, 0x11, 0xFF, 0x00000000, PPC_ALTIVEC); |
6868 | + | ||
6869 | +static void gen_vmladduhm(DisasContext *ctx) | ||
6413 | { | 6870 | { |
6414 | TCGv_ptr ra, rb, rc, rd; | 6871 | TCGv_ptr ra, rb, rc, rd; |
6415 | if (unlikely(!ctx->altivec_enabled)) { | 6872 | if (unlikely(!ctx->altivec_enabled)) { |
@@ -6457,7 +6914,9 @@ static always_inline void gen_store_gpr64(int reg, TCGv_i64 t) { | @@ -6457,7 +6914,9 @@ static always_inline void gen_store_gpr64(int reg, TCGv_i64 t) { | ||
6457 | } | 6914 | } |
6458 | 6915 | ||
6459 | #define GEN_SPE(name0, name1, opc2, opc3, inval, type) \ | 6916 | #define GEN_SPE(name0, name1, opc2, opc3, inval, type) \ |
6460 | -GEN_HANDLER(name0##_##name1, 0x04, opc2, opc3, inval, type) \ | 6917 | +GEN_HANDLER(name0##_##name1, 0x04, opc2, opc3, inval, type); \ |
6918 | + \ | ||
6919 | +static void glue(gen_, name0##_##name1)(DisasContext *ctx) \ | ||
6461 | { \ | 6920 | { \ |
6462 | if (Rc(ctx->opcode)) \ | 6921 | if (Rc(ctx->opcode)) \ |
6463 | gen_##name1(ctx); \ | 6922 | gen_##name1(ctx); \ |
@@ -7353,7 +7812,9 @@ static always_inline void gen_op_evstwwo(DisasContext *ctx, TCGv addr) | @@ -7353,7 +7812,9 @@ static always_inline void gen_op_evstwwo(DisasContext *ctx, TCGv addr) | ||
7353 | } | 7812 | } |
7354 | 7813 | ||
7355 | #define GEN_SPEOP_LDST(name, opc2, sh) \ | 7814 | #define GEN_SPEOP_LDST(name, opc2, sh) \ |
7356 | -GEN_HANDLER(name, 0x04, opc2, 0x0C, 0x00000000, PPC_SPE) \ | 7815 | +GEN_HANDLER(name, 0x04, opc2, 0x0C, 0x00000000, PPC_SPE); \ |
7816 | + \ | ||
7817 | +static void glue(gen_, name)(DisasContext *ctx) \ | ||
7357 | { \ | 7818 | { \ |
7358 | TCGv t0; \ | 7819 | TCGv t0; \ |
7359 | if (unlikely(!ctx->spe_enabled)) { \ | 7820 | if (unlikely(!ctx->spe_enabled)) { \ |