Commit 996ba2ccf59891a8abe188c073eab3bae1c93b90

Authored by ths
1 parent e04ea3dc

MIPS64 improvements, based on a patch by Aurelien Jarno.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3021 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips/helper.c
... ... @@ -130,11 +130,11 @@ static int get_physical_address (CPUState *env, target_ulong *physical,
130 130  
131 131 if (address <= (int32_t)0x7FFFFFFFUL) {
132 132 /* useg */
133   - if (!(env->CP0_Status & (1 << CP0St_ERL) && user_mode)) {
134   - ret = env->map_address(env, physical, prot, address, rw, access_type);
135   - } else {
  133 + if (env->CP0_Status & (1 << CP0St_ERL)) {
136 134 *physical = address & 0xFFFFFFFF;
137 135 *prot = PAGE_READ | PAGE_WRITE;
  136 + } else {
  137 + ret = env->map_address(env, physical, prot, address, rw, access_type);
138 138 }
139 139 #ifdef TARGET_MIPS64
140 140 /*
... ...
target-mips/op.c
... ... @@ -297,7 +297,7 @@ void op_addr_add (void)
297 297 with Status_UX = 0 should be casted to 32-bit and sign extended.
298 298 See the MIPS64 PRA manual, section 4.10. */
299 299 #ifdef TARGET_MIPS64
300   - if ((env->CP0_Status & (1 << CP0St_UM)) &&
  300 + if ((env->hflags & MIPS_HFLAG_UM) &&
301 301 !(env->CP0_Status & (1 << CP0St_UX)))
302 302 T0 = (int64_t)(int32_t)(T0 + T1);
303 303 else
... ... @@ -1608,7 +1608,7 @@ void op_dmfc0_errorepc (void)
1608 1608 void op_cp0_enabled(void)
1609 1609 {
1610 1610 if (!(env->CP0_Status & (1 << CP0St_CU0)) &&
1611   - (env->hflags & MIPS_HFLAG_UM)) {
  1611 + (env->hflags & MIPS_HFLAG_UM)) {
1612 1612 CALL_FROM_TB2(do_raise_exception_err, EXCP_CpU, 0);
1613 1613 }
1614 1614 RETURN();
... ...