Commit 9843a0d2c62d683c1940cfd2d7c6533837b56bb2
1 parent
764dfc3f
Free some more temporaries.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4729 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
1 changed file
with
11 additions
and
16 deletions
target-mips/translate.c
@@ -840,21 +840,15 @@ static inline void gen_op_addr_add (void) | @@ -840,21 +840,15 @@ static inline void gen_op_addr_add (void) | ||
840 | See the MIPS64 PRA manual, section 4.10. */ | 840 | See the MIPS64 PRA manual, section 4.10. */ |
841 | { | 841 | { |
842 | int l1 = gen_new_label(); | 842 | int l1 = gen_new_label(); |
843 | - | ||
844 | - { | ||
845 | - TCGv r_tmp = tcg_temp_new(TCG_TYPE_I32); | ||
846 | - | ||
847 | - tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, hflags)); | ||
848 | - tcg_gen_andi_i32(r_tmp, r_tmp, MIPS_HFLAG_KSU); | ||
849 | - tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, MIPS_HFLAG_UM, l1); | ||
850 | - } | ||
851 | - { | ||
852 | - TCGv r_tmp = tcg_temp_new(TCG_TYPE_I32); | ||
853 | - | ||
854 | - tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_Status)); | ||
855 | - tcg_gen_andi_i32(r_tmp, r_tmp, (1 << CP0St_UX)); | ||
856 | - tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, 0, l1); | ||
857 | - } | 843 | + TCGv r_tmp = tcg_temp_local_new(TCG_TYPE_I32); |
844 | + | ||
845 | + tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, hflags)); | ||
846 | + tcg_gen_andi_i32(r_tmp, r_tmp, MIPS_HFLAG_KSU); | ||
847 | + tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, MIPS_HFLAG_UM, l1); | ||
848 | + tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_Status)); | ||
849 | + tcg_gen_andi_i32(r_tmp, r_tmp, (1 << CP0St_UX)); | ||
850 | + tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, 0, l1); | ||
851 | + tcg_temp_free(r_tmp); | ||
858 | tcg_gen_ext32s_i64(cpu_T[0], cpu_T[0]); | 852 | tcg_gen_ext32s_i64(cpu_T[0], cpu_T[0]); |
859 | gen_set_label(l1); | 853 | gen_set_label(l1); |
860 | } | 854 | } |
@@ -5542,13 +5536,14 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf) | @@ -5542,13 +5536,14 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf) | ||
5542 | gen_load_gpr(cpu_T[1], rs); | 5536 | gen_load_gpr(cpu_T[1], rs); |
5543 | { | 5537 | { |
5544 | TCGv r_ptr = tcg_temp_new(TCG_TYPE_PTR); | 5538 | TCGv r_ptr = tcg_temp_new(TCG_TYPE_PTR); |
5545 | - TCGv r_tmp = tcg_temp_new(TCG_TYPE_I32); | 5539 | + TCGv r_tmp = tcg_temp_local_new(TCG_TYPE_I32); |
5546 | 5540 | ||
5547 | tcg_gen_ld_ptr(r_ptr, cpu_env, offsetof(CPUState, fpu)); | 5541 | tcg_gen_ld_ptr(r_ptr, cpu_env, offsetof(CPUState, fpu)); |
5548 | tcg_gen_ld_i32(r_tmp, r_ptr, offsetof(CPUMIPSFPUContext, fcr31)); | 5542 | tcg_gen_ld_i32(r_tmp, r_ptr, offsetof(CPUMIPSFPUContext, fcr31)); |
5549 | tcg_temp_free(r_ptr); | 5543 | tcg_temp_free(r_ptr); |
5550 | tcg_gen_andi_i32(r_tmp, r_tmp, ccbit); | 5544 | tcg_gen_andi_i32(r_tmp, r_tmp, ccbit); |
5551 | tcg_gen_brcondi_i32(cond, r_tmp, 0, l1); | 5545 | tcg_gen_brcondi_i32(cond, r_tmp, 0, l1); |
5546 | + tcg_temp_free(r_tmp); | ||
5552 | } | 5547 | } |
5553 | tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); | 5548 | tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); |
5554 | 5549 |