Commit 980f8a0b394b8542e49a8df0db420e9862b8f3d1

Authored by edgar_igl
1 parent 00dbbb03

CRIS: Mask off the cache selection bit after MMU translations.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5170 c046a42c-6fe2-441c-8c8c-71466251a162
hw/etraxfs.c
... ... @@ -72,41 +72,32 @@ void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,
72 72 /* allocate RAM */
73 73 phys_ram = qemu_ram_alloc(ram_size);
74 74 cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);
75   - /* Unached mapping. */
76   - cpu_register_physical_memory(0xc0000000, ram_size, phys_ram | IO_MEM_RAM);
77 75  
78 76 /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
79   - internal memory. Cached and uncached mappings. */
  77 + internal memory. */
80 78 phys_intmem = qemu_ram_alloc(INTMEM_SIZE);
81   - cpu_register_physical_memory(0xb8000000, INTMEM_SIZE,
82   - phys_intmem | IO_MEM_RAM);
83 79 cpu_register_physical_memory(0x38000000, INTMEM_SIZE,
84 80 phys_intmem | IO_MEM_RAM);
85 81  
86 82  
87 83 phys_flash = qemu_ram_alloc(FLASH_SIZE);
88 84 i = drive_get_index(IF_PFLASH, 0, 0);
89   - pflash_cfi02_register(0x80000000, phys_flash,
90   - drives_table[i].bdrv, (64 * 1024),
91   - FLASH_SIZE >> 16,
92   - 1, 2, 0x0000, 0x0000, 0x0000, 0x0000,
93   - 0x555, 0x2aa);
94 85 pflash_cfi02_register(0x0, phys_flash,
95 86 drives_table[i].bdrv, (64 * 1024),
96 87 FLASH_SIZE >> 16,
97 88 1, 2, 0x0000, 0x0000, 0x0000, 0x0000,
98 89 0x555, 0x2aa);
99   - pic = etraxfs_pic_init(env, 0xb001c000);
100   - etraxfs_dmac = etraxfs_dmac_init(env, 0xb0000000, 10);
  90 + pic = etraxfs_pic_init(env, 0x3001c000);
  91 + etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);
101 92 for (i = 0; i < 10; i++) {
102 93 /* On ETRAX, odd numbered channels are inputs. */
103 94 etraxfs_dmac_connect(etraxfs_dmac, i, pic->irq + 7 + i, i & 1);
104 95 }
105 96  
106 97 /* Add the two ethernet blocks. */
107   - eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0xb0034000);
  98 + eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0x30034000);
108 99 if (nb_nics > 1)
109   - eth[1] = etraxfs_eth_init(&nd_table[1], env, pic->irq + 26, 0xb0036000);
  100 + eth[1] = etraxfs_eth_init(&nd_table[1], env, pic->irq + 26, 0x30036000);
110 101  
111 102 /* The DMA Connector block is missing, hardwire things for now. */
112 103 etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);
... ... @@ -117,13 +108,13 @@ void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,
117 108 }
118 109  
119 110 /* 2 timers. */
120   - etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0xb001e000);
121   - etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0xb005e000);
  111 + etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3001e000);
  112 + etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3005e000);
122 113  
123 114 for (i = 0; i < 4; i++) {
124 115 if (serial_hds[i]) {
125 116 etraxfs_ser_init(env, pic->irq + 0x14 + i,
126   - serial_hds[i], 0xb0026000 + i * 0x2000);
  117 + serial_hds[i], 0x30026000 + i * 0x2000);
127 118 }
128 119 }
129 120  
... ...
target-cris/helper.c
... ... @@ -89,7 +89,11 @@ int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
89 89 }
90 90 else
91 91 {
92   - phy = res.phy;
  92 + /*
  93 + * Mask off the cache selection bit. The ETRAX busses do not
  94 + * see the top bit.
  95 + */
  96 + phy = res.phy & ~0x80000000;
93 97 prot = res.prot;
94 98 r = tlb_set_page(env, address, phy, prot, mmu_idx, is_softmmu);
95 99 }
... ...