Commit 98070ce00f1561bb244c366b2cb76c4b4f7c2de1
Committed by
Aurelien Jarno
1 parent
7d69c52e
target-mips: fix MADD and MSUB/MSUBU instructions
MADD was not correctly writing to HI. MSUB/MSUBU are specified as `HI||LO - product', not `product - HI||LO'. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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3 additions
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3 deletions
target-mips/translate.c
... | ... | @@ -2132,7 +2132,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, |
2132 | 2132 | tcg_gen_trunc_i64_tl(t1, t2); |
2133 | 2133 | tcg_temp_free_i64(t2); |
2134 | 2134 | tcg_gen_ext32s_tl(cpu_LO[0], t0); |
2135 | - tcg_gen_ext32s_tl(cpu_LO[1], t1); | |
2135 | + tcg_gen_ext32s_tl(cpu_HI[0], t1); | |
2136 | 2136 | } |
2137 | 2137 | opn = "madd"; |
2138 | 2138 | break; |
... | ... | @@ -2167,7 +2167,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, |
2167 | 2167 | tcg_gen_ext_tl_i64(t3, t1); |
2168 | 2168 | tcg_gen_mul_i64(t2, t2, t3); |
2169 | 2169 | tcg_gen_concat_tl_i64(t3, cpu_LO[0], cpu_HI[0]); |
2170 | - tcg_gen_sub_i64(t2, t2, t3); | |
2170 | + tcg_gen_sub_i64(t2, t3, t2); | |
2171 | 2171 | tcg_temp_free_i64(t3); |
2172 | 2172 | tcg_gen_trunc_i64_tl(t0, t2); |
2173 | 2173 | tcg_gen_shri_i64(t2, t2, 32); |
... | ... | @@ -2189,7 +2189,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, |
2189 | 2189 | tcg_gen_extu_tl_i64(t3, t1); |
2190 | 2190 | tcg_gen_mul_i64(t2, t2, t3); |
2191 | 2191 | tcg_gen_concat_tl_i64(t3, cpu_LO[0], cpu_HI[0]); |
2192 | - tcg_gen_sub_i64(t2, t2, t3); | |
2192 | + tcg_gen_sub_i64(t2, t3, t2); | |
2193 | 2193 | tcg_temp_free_i64(t3); |
2194 | 2194 | tcg_gen_trunc_i64_tl(t0, t2); |
2195 | 2195 | tcg_gen_shri_i64(t2, t2, 32); | ... | ... |