Commit 967032c3d5547a9973465f495f8f25e3c7967633
1 parent
acb98efb
Use correct types to enable > 2G support, based on a patch from
Anthony Liguori. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4238 c046a42c-6fe2-441c-8c8c-71466251a162
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36 changed files
with
153 additions
and
98 deletions
cpu-all.h
... | ... | @@ -700,7 +700,7 @@ static inline void stfq_be_p(void *ptr, float64 v) |
700 | 700 | |
701 | 701 | /* page related stuff */ |
702 | 702 | |
703 | -#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) | |
703 | +#define TARGET_PAGE_SIZE (1UL << TARGET_PAGE_BITS) | |
704 | 704 | #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1) |
705 | 705 | #define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK) |
706 | 706 | |
... | ... | @@ -806,12 +806,16 @@ int cpu_inw(CPUState *env, int addr); |
806 | 806 | int cpu_inl(CPUState *env, int addr); |
807 | 807 | #endif |
808 | 808 | |
809 | +/* address in the RAM (different from a physical address) */ | |
810 | +typedef unsigned long ram_addr_t; | |
811 | + | |
809 | 812 | /* memory API */ |
810 | 813 | |
811 | -extern int phys_ram_size; | |
814 | +extern ram_addr_t phys_ram_size; | |
812 | 815 | extern int phys_ram_fd; |
813 | 816 | extern uint8_t *phys_ram_base; |
814 | 817 | extern uint8_t *phys_ram_dirty; |
818 | +extern ram_addr_t ram_size; | |
815 | 819 | |
816 | 820 | /* physical memory access */ |
817 | 821 | #define TLB_INVALID_MASK (1 << 3) |
... | ... | @@ -833,10 +837,10 @@ typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t |
833 | 837 | typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); |
834 | 838 | |
835 | 839 | void cpu_register_physical_memory(target_phys_addr_t start_addr, |
836 | - unsigned long size, | |
837 | - unsigned long phys_offset); | |
838 | -uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr); | |
839 | -ram_addr_t qemu_ram_alloc(unsigned int size); | |
840 | + ram_addr_t size, | |
841 | + ram_addr_t phys_offset); | |
842 | +ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr); | |
843 | +ram_addr_t qemu_ram_alloc(ram_addr_t); | |
840 | 844 | void qemu_ram_free(ram_addr_t addr); |
841 | 845 | int cpu_register_io_memory(int io_index, |
842 | 846 | CPUReadMemoryFunc **mem_read, | ... | ... |
cpu-defs.h
... | ... | @@ -76,9 +76,6 @@ typedef uint64_t target_phys_addr_t; |
76 | 76 | #error TARGET_PHYS_ADDR_BITS undefined |
77 | 77 | #endif |
78 | 78 | |
79 | -/* address in the RAM (different from a physical address) */ | |
80 | -typedef unsigned long ram_addr_t; | |
81 | - | |
82 | 79 | #define HOST_LONG_SIZE (HOST_LONG_BITS / 8) |
83 | 80 | |
84 | 81 | #define EXCP_INTERRUPT 0x10000 /* async interruption */ | ... | ... |
exec-all.h
... | ... | @@ -82,7 +82,7 @@ int cpu_restore_state_copy(struct TranslationBlock *tb, |
82 | 82 | void cpu_resume_from_signal(CPUState *env1, void *puc); |
83 | 83 | void cpu_exec_init(CPUState *env); |
84 | 84 | int page_unprotect(target_ulong address, unsigned long pc, void *puc); |
85 | -void tb_invalidate_phys_page_range(target_ulong start, target_ulong end, | |
85 | +void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end, | |
86 | 86 | int is_cpu_write_access); |
87 | 87 | void tb_invalidate_page_range(target_ulong start, target_ulong end); |
88 | 88 | void tlb_flush_page(CPUState *env, target_ulong addr); | ... | ... |
exec.c
... | ... | @@ -74,6 +74,10 @@ |
74 | 74 | #define TARGET_VIRT_ADDR_SPACE_BITS 42 |
75 | 75 | #elif defined(TARGET_PPC64) |
76 | 76 | #define TARGET_PHYS_ADDR_SPACE_BITS 42 |
77 | +#elif defined(TARGET_X86_64) && !defined(USE_KQEMU) | |
78 | +#define TARGET_PHYS_ADDR_SPACE_BITS 40 | |
79 | +#elif defined(TARGET_I386) && !defined(USE_KQEMU) | |
80 | +#define TARGET_PHYS_ADDR_SPACE_BITS 36 | |
77 | 81 | #else |
78 | 82 | /* Note: for compatibility with kqemu, we use 32 bits for x86_64 */ |
79 | 83 | #define TARGET_PHYS_ADDR_SPACE_BITS 32 |
... | ... | @@ -88,7 +92,7 @@ spinlock_t tb_lock = SPIN_LOCK_UNLOCKED; |
88 | 92 | uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE] __attribute__((aligned (32))); |
89 | 93 | uint8_t *code_gen_ptr; |
90 | 94 | |
91 | -int phys_ram_size; | |
95 | +ram_addr_t phys_ram_size; | |
92 | 96 | int phys_ram_fd; |
93 | 97 | uint8_t *phys_ram_base; |
94 | 98 | uint8_t *phys_ram_dirty; |
... | ... | @@ -113,7 +117,7 @@ typedef struct PageDesc { |
113 | 117 | |
114 | 118 | typedef struct PhysPageDesc { |
115 | 119 | /* offset in host memory of the page + io_index in the low 12 bits */ |
116 | - uint32_t phys_offset; | |
120 | + ram_addr_t phys_offset; | |
117 | 121 | } PhysPageDesc; |
118 | 122 | |
119 | 123 | #define L2_BITS 10 |
... | ... | @@ -124,9 +128,14 @@ typedef struct PhysPageDesc { |
124 | 128 | */ |
125 | 129 | #define L1_BITS (TARGET_VIRT_ADDR_SPACE_BITS - L2_BITS - TARGET_PAGE_BITS) |
126 | 130 | #else |
127 | -#define L1_BITS (32 - L2_BITS - TARGET_PAGE_BITS) | |
131 | +#define L1_BITS (TARGET_PHYS_ADDR_SPACE_BITS - L2_BITS - TARGET_PAGE_BITS) | |
128 | 132 | #endif |
129 | 133 | |
134 | +#undef L1_BITS | |
135 | +#undef L2_BITS | |
136 | +#define L1_BITS 13 | |
137 | +#define L2_BITS 13 | |
138 | + | |
130 | 139 | #define L1_SIZE (1 << L1_BITS) |
131 | 140 | #define L2_SIZE (1 << L2_BITS) |
132 | 141 | |
... | ... | @@ -234,7 +243,7 @@ static void page_init(void) |
234 | 243 | #endif |
235 | 244 | } |
236 | 245 | |
237 | -static inline PageDesc *page_find_alloc(unsigned int index) | |
246 | +static inline PageDesc *page_find_alloc(target_ulong index) | |
238 | 247 | { |
239 | 248 | PageDesc **lp, *p; |
240 | 249 | |
... | ... | @@ -249,7 +258,7 @@ static inline PageDesc *page_find_alloc(unsigned int index) |
249 | 258 | return p + (index & (L2_SIZE - 1)); |
250 | 259 | } |
251 | 260 | |
252 | -static inline PageDesc *page_find(unsigned int index) | |
261 | +static inline PageDesc *page_find(target_ulong index) | |
253 | 262 | { |
254 | 263 | PageDesc *p; |
255 | 264 | |
... | ... | @@ -265,6 +274,7 @@ static PhysPageDesc *phys_page_find_alloc(target_phys_addr_t index, int alloc) |
265 | 274 | PhysPageDesc *pd; |
266 | 275 | |
267 | 276 | p = (void **)l1_phys_map; |
277 | +#if 0 | |
268 | 278 | #if TARGET_PHYS_ADDR_SPACE_BITS > 32 |
269 | 279 | |
270 | 280 | #if TARGET_PHYS_ADDR_SPACE_BITS > (32 + L1_BITS) |
... | ... | @@ -281,6 +291,7 @@ static PhysPageDesc *phys_page_find_alloc(target_phys_addr_t index, int alloc) |
281 | 291 | *lp = p; |
282 | 292 | } |
283 | 293 | #endif |
294 | +#endif | |
284 | 295 | lp = p + ((index >> L2_BITS) & (L1_SIZE - 1)); |
285 | 296 | pd = *lp; |
286 | 297 | if (!pd) { |
... | ... | @@ -511,12 +522,12 @@ static inline void tb_reset_jump(TranslationBlock *tb, int n) |
511 | 522 | tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n])); |
512 | 523 | } |
513 | 524 | |
514 | -static inline void tb_phys_invalidate(TranslationBlock *tb, unsigned int page_addr) | |
525 | +static inline void tb_phys_invalidate(TranslationBlock *tb, target_ulong page_addr) | |
515 | 526 | { |
516 | 527 | CPUState *env; |
517 | 528 | PageDesc *p; |
518 | 529 | unsigned int h, n1; |
519 | - target_ulong phys_pc; | |
530 | + target_phys_addr_t phys_pc; | |
520 | 531 | TranslationBlock *tb1, *tb2; |
521 | 532 | |
522 | 533 | /* remove the TB from the hash list */ |
... | ... | @@ -667,7 +678,7 @@ static void tb_gen_code(CPUState *env, |
667 | 678 | the same physical page. 'is_cpu_write_access' should be true if called |
668 | 679 | from a real cpu write access: the virtual CPU will exit the current |
669 | 680 | TB if code is modified inside this TB. */ |
670 | -void tb_invalidate_phys_page_range(target_ulong start, target_ulong end, | |
681 | +void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end, | |
671 | 682 | int is_cpu_write_access) |
672 | 683 | { |
673 | 684 | int n, current_tb_modified, current_tb_not_found, current_flags; |
... | ... | @@ -780,7 +791,7 @@ void tb_invalidate_phys_page_range(target_ulong start, target_ulong end, |
780 | 791 | } |
781 | 792 | |
782 | 793 | /* len must be <= 8 and start must be a multiple of len */ |
783 | -static inline void tb_invalidate_phys_page_fast(target_ulong start, int len) | |
794 | +static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int len) | |
784 | 795 | { |
785 | 796 | PageDesc *p; |
786 | 797 | int offset, b; |
... | ... | @@ -809,7 +820,7 @@ static inline void tb_invalidate_phys_page_fast(target_ulong start, int len) |
809 | 820 | } |
810 | 821 | |
811 | 822 | #if !defined(CONFIG_SOFTMMU) |
812 | -static void tb_invalidate_phys_page(target_ulong addr, | |
823 | +static void tb_invalidate_phys_page(target_phys_addr_t addr, | |
813 | 824 | unsigned long pc, void *puc) |
814 | 825 | { |
815 | 826 | int n, current_flags, current_tb_modified; |
... | ... | @@ -1986,7 +1997,7 @@ static inline void tlb_set_dirty(CPUState *env, |
1986 | 1997 | |
1987 | 1998 | static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
1988 | 1999 | int memory); |
1989 | -static void *subpage_init (target_phys_addr_t base, uint32_t *phys, | |
2000 | +static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys, | |
1990 | 2001 | int orig_memory); |
1991 | 2002 | #define CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2, \ |
1992 | 2003 | need_subpage) \ |
... | ... | @@ -2012,13 +2023,13 @@ static void *subpage_init (target_phys_addr_t base, uint32_t *phys, |
2012 | 2023 | page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an |
2013 | 2024 | io memory page */ |
2014 | 2025 | void cpu_register_physical_memory(target_phys_addr_t start_addr, |
2015 | - unsigned long size, | |
2016 | - unsigned long phys_offset) | |
2026 | + ram_addr_t size, | |
2027 | + ram_addr_t phys_offset) | |
2017 | 2028 | { |
2018 | 2029 | target_phys_addr_t addr, end_addr; |
2019 | 2030 | PhysPageDesc *p; |
2020 | 2031 | CPUState *env; |
2021 | - unsigned long orig_size = size; | |
2032 | + ram_addr_t orig_size = size; | |
2022 | 2033 | void *subpage; |
2023 | 2034 | |
2024 | 2035 | size = (size + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK; |
... | ... | @@ -2026,7 +2037,7 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr, |
2026 | 2037 | for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) { |
2027 | 2038 | p = phys_page_find(addr >> TARGET_PAGE_BITS); |
2028 | 2039 | if (p && p->phys_offset != IO_MEM_UNASSIGNED) { |
2029 | - unsigned long orig_memory = p->phys_offset; | |
2040 | + ram_addr_t orig_memory = p->phys_offset; | |
2030 | 2041 | target_phys_addr_t start_addr2, end_addr2; |
2031 | 2042 | int need_subpage = 0; |
2032 | 2043 | |
... | ... | @@ -2079,7 +2090,7 @@ void cpu_register_physical_memory(target_phys_addr_t start_addr, |
2079 | 2090 | } |
2080 | 2091 | |
2081 | 2092 | /* XXX: temporary until new memory mapping API */ |
2082 | -uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr) | |
2093 | +ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr) | |
2083 | 2094 | { |
2084 | 2095 | PhysPageDesc *p; |
2085 | 2096 | |
... | ... | @@ -2090,12 +2101,12 @@ uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr) |
2090 | 2101 | } |
2091 | 2102 | |
2092 | 2103 | /* XXX: better than nothing */ |
2093 | -ram_addr_t qemu_ram_alloc(unsigned int size) | |
2104 | +ram_addr_t qemu_ram_alloc(ram_addr_t size) | |
2094 | 2105 | { |
2095 | 2106 | ram_addr_t addr; |
2096 | 2107 | if ((phys_ram_alloc_offset + size) >= phys_ram_size) { |
2097 | - fprintf(stderr, "Not enough memory (requested_size = %u, max memory = %d)\n", | |
2098 | - size, phys_ram_size); | |
2108 | + fprintf(stderr, "Not enough memory (requested_size = %lu, max memory = %" PRIu64 ")\n", | |
2109 | + size, (uint64_t)phys_ram_size); | |
2099 | 2110 | abort(); |
2100 | 2111 | } |
2101 | 2112 | addr = phys_ram_alloc_offset; |
... | ... | @@ -2438,7 +2449,7 @@ static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
2438 | 2449 | return 0; |
2439 | 2450 | } |
2440 | 2451 | |
2441 | -static void *subpage_init (target_phys_addr_t base, uint32_t *phys, | |
2452 | +static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys, | |
2442 | 2453 | int orig_memory) |
2443 | 2454 | { |
2444 | 2455 | subpage_t *mmio; | ... | ... |
hw/an5206.c
... | ... | @@ -30,7 +30,7 @@ void DMA_run (void) |
30 | 30 | |
31 | 31 | /* Board init. */ |
32 | 32 | |
33 | -static void an5206_init(int ram_size, int vga_ram_size, | |
33 | +static void an5206_init(ram_addr_t ram_size, int vga_ram_size, | |
34 | 34 | const char *boot_device, DisplayState *ds, |
35 | 35 | const char *kernel_filename, const char *kernel_cmdline, |
36 | 36 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/boards.h
... | ... | @@ -3,7 +3,7 @@ |
3 | 3 | #ifndef HW_BOARDS_H |
4 | 4 | #define HW_BOARDS_H |
5 | 5 | |
6 | -typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, | |
6 | +typedef void QEMUMachineInitFunc(ram_addr_t ram_size, int vga_ram_size, | |
7 | 7 | const char *boot_device, DisplayState *ds, |
8 | 8 | const char *kernel_filename, |
9 | 9 | const char *kernel_cmdline, | ... | ... |
hw/dummy_m68k.c
... | ... | @@ -14,7 +14,7 @@ |
14 | 14 | |
15 | 15 | /* Board init. */ |
16 | 16 | |
17 | -static void dummy_m68k_init(int ram_size, int vga_ram_size, | |
17 | +static void dummy_m68k_init(ram_addr_t ram_size, int vga_ram_size, | |
18 | 18 | const char *boot_device, DisplayState *ds, |
19 | 19 | const char *kernel_filename, const char *kernel_cmdline, |
20 | 20 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/etraxfs.c
... | ... | @@ -41,7 +41,7 @@ void etraxfs_timer_init(CPUState *env, qemu_irq *irqs, |
41 | 41 | void etraxfs_ser_init(CPUState *env, qemu_irq *irqs, target_phys_addr_t base); |
42 | 42 | |
43 | 43 | static |
44 | -void bareetraxfs_init (int ram_size, int vga_ram_size, | |
44 | +void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size, | |
45 | 45 | const char *boot_device, DisplayState *ds, |
46 | 46 | const char *kernel_filename, const char *kernel_cmdline, |
47 | 47 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/gumstix.c
... | ... | @@ -41,7 +41,7 @@ |
41 | 41 | |
42 | 42 | static const int sector_len = 128 * 1024; |
43 | 43 | |
44 | -static void connex_init(int ram_size, int vga_ram_size, | |
44 | +static void connex_init(ram_addr_t ram_size, int vga_ram_size, | |
45 | 45 | const char *boot_device, DisplayState *ds, |
46 | 46 | const char *kernel_filename, const char *kernel_cmdline, |
47 | 47 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -81,7 +81,7 @@ static void connex_init(int ram_size, int vga_ram_size, |
81 | 81 | pxa2xx_gpio_in_get(cpu->gpio)[36]); |
82 | 82 | } |
83 | 83 | |
84 | -static void verdex_init(int ram_size, int vga_ram_size, | |
84 | +static void verdex_init(ram_addr_t ram_size, int vga_ram_size, | |
85 | 85 | const char *boot_device, DisplayState *ds, |
86 | 86 | const char *kernel_filename, const char *kernel_cmdline, |
87 | 87 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/integratorcp.c
... | ... | @@ -474,7 +474,7 @@ static struct arm_boot_info integrator_binfo = { |
474 | 474 | .board_id = 0x113, |
475 | 475 | }; |
476 | 476 | |
477 | -static void integratorcp_init(int ram_size, int vga_ram_size, | |
477 | +static void integratorcp_init(ram_addr_t ram_size, int vga_ram_size, | |
478 | 478 | const char *boot_device, DisplayState *ds, |
479 | 479 | const char *kernel_filename, const char *kernel_cmdline, |
480 | 480 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/mainstone.c
... | ... | @@ -64,7 +64,7 @@ static struct arm_boot_info mainstone_binfo = { |
64 | 64 | .ram_size = 0x04000000, |
65 | 65 | }; |
66 | 66 | |
67 | -static void mainstone_common_init(int ram_size, int vga_ram_size, | |
67 | +static void mainstone_common_init(ram_addr_t ram_size, int vga_ram_size, | |
68 | 68 | DisplayState *ds, const char *kernel_filename, |
69 | 69 | const char *kernel_cmdline, const char *initrd_filename, |
70 | 70 | const char *cpu_model, enum mainstone_model_e model, int arm_id) |
... | ... | @@ -133,7 +133,7 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, |
133 | 133 | arm_load_kernel(cpu->env, &mainstone_binfo); |
134 | 134 | } |
135 | 135 | |
136 | -static void mainstone_init(int ram_size, int vga_ram_size, | |
136 | +static void mainstone_init(ram_addr_t ram_size, int vga_ram_size, | |
137 | 137 | const char *boot_device, DisplayState *ds, |
138 | 138 | const char *kernel_filename, const char *kernel_cmdline, |
139 | 139 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/mcf5208.c
... | ... | @@ -202,7 +202,7 @@ static void mcf5208_sys_init(qemu_irq *pic) |
202 | 202 | } |
203 | 203 | } |
204 | 204 | |
205 | -static void mcf5208evb_init(int ram_size, int vga_ram_size, | |
205 | +static void mcf5208evb_init(ram_addr_t ram_size, int vga_ram_size, | |
206 | 206 | const char *boot_device, DisplayState *ds, |
207 | 207 | const char *kernel_filename, const char *kernel_cmdline, |
208 | 208 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/mips_jazz.c
... | ... | @@ -116,7 +116,7 @@ void espdma_memory_write(void *opaque, uint8_t *buf, int len) |
116 | 116 | #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX) |
117 | 117 | |
118 | 118 | static |
119 | -void mips_jazz_init (int ram_size, int vga_ram_size, | |
119 | +void mips_jazz_init (ram_addr_t ram_size, int vga_ram_size, | |
120 | 120 | DisplayState *ds, const char *cpu_model, |
121 | 121 | enum jazz_model_e jazz_model) |
122 | 122 | { |
... | ... | @@ -256,7 +256,7 @@ void mips_jazz_init (int ram_size, int vga_ram_size, |
256 | 256 | } |
257 | 257 | |
258 | 258 | static |
259 | -void mips_magnum_init (int ram_size, int vga_ram_size, | |
259 | +void mips_magnum_init (ram_addr_t ram_size, int vga_ram_size, | |
260 | 260 | const char *boot_device, DisplayState *ds, |
261 | 261 | const char *kernel_filename, const char *kernel_cmdline, |
262 | 262 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -265,7 +265,7 @@ void mips_magnum_init (int ram_size, int vga_ram_size, |
265 | 265 | } |
266 | 266 | |
267 | 267 | static |
268 | -void mips_pica61_init (int ram_size, int vga_ram_size, | |
268 | +void mips_pica61_init (ram_addr_t ram_size, int vga_ram_size, | |
269 | 269 | const char *boot_device, DisplayState *ds, |
270 | 270 | const char *kernel_filename, const char *kernel_cmdline, |
271 | 271 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/mips_malta.c
... | ... | @@ -763,7 +763,7 @@ static void main_cpu_reset(void *opaque) |
763 | 763 | } |
764 | 764 | |
765 | 765 | static |
766 | -void mips_malta_init (int ram_size, int vga_ram_size, | |
766 | +void mips_malta_init (ram_addr_t ram_size, int vga_ram_size, | |
767 | 767 | const char *boot_device, DisplayState *ds, |
768 | 768 | const char *kernel_filename, const char *kernel_cmdline, |
769 | 769 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/mips_mipssim.c
... | ... | @@ -106,7 +106,7 @@ static void main_cpu_reset(void *opaque) |
106 | 106 | } |
107 | 107 | |
108 | 108 | static void |
109 | -mips_mipssim_init (int ram_size, int vga_ram_size, | |
109 | +mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size, | |
110 | 110 | const char *boot_device, DisplayState *ds, |
111 | 111 | const char *kernel_filename, const char *kernel_cmdline, |
112 | 112 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/mips_r4k.c
... | ... | @@ -147,7 +147,7 @@ static void main_cpu_reset(void *opaque) |
147 | 147 | |
148 | 148 | static const int sector_len = 32 * 1024; |
149 | 149 | static |
150 | -void mips_r4k_init (int ram_size, int vga_ram_size, | |
150 | +void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size, | |
151 | 151 | const char *boot_device, DisplayState *ds, |
152 | 152 | const char *kernel_filename, const char *kernel_cmdline, |
153 | 153 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/nseries.c
... | ... | @@ -891,7 +891,7 @@ static struct arm_boot_info n800_binfo = { |
891 | 891 | .atag_board = n800_atag_setup, |
892 | 892 | }; |
893 | 893 | |
894 | -static void n800_init(int ram_size, int vga_ram_size, | |
894 | +static void n800_init(ram_addr_t ram_size, int vga_ram_size, | |
895 | 895 | const char *boot_device, DisplayState *ds, |
896 | 896 | const char *kernel_filename, const char *kernel_cmdline, |
897 | 897 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/palm.c
... | ... | @@ -192,7 +192,7 @@ static struct arm_boot_info palmte_binfo = { |
192 | 192 | .board_id = 0x331, |
193 | 193 | }; |
194 | 194 | |
195 | -static void palmte_init(int ram_size, int vga_ram_size, | |
195 | +static void palmte_init(ram_addr_t ram_size, int vga_ram_size, | |
196 | 196 | const char *boot_device, DisplayState *ds, |
197 | 197 | const char *kernel_filename, const char *kernel_cmdline, |
198 | 198 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/pc.c
... | ... | @@ -188,7 +188,8 @@ static int boot_device2nibble(char boot_device) |
188 | 188 | } |
189 | 189 | |
190 | 190 | /* hd_table must contain 4 block drivers */ |
191 | -static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **hd_table) | |
191 | +static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, | |
192 | + const char *boot_device, BlockDriverState **hd_table) | |
192 | 193 | { |
193 | 194 | RTCState *s = rtc_state; |
194 | 195 | int nbds, bds[3] = { 0, }; |
... | ... | @@ -211,6 +212,12 @@ static void cmos_init(int ram_size, const char *boot_device, BlockDriverState ** |
211 | 212 | rtc_set_memory(s, 0x30, val); |
212 | 213 | rtc_set_memory(s, 0x31, val >> 8); |
213 | 214 | |
215 | + if (above_4g_mem_size) { | |
216 | + rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16); | |
217 | + rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24); | |
218 | + rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32); | |
219 | + } | |
220 | + | |
214 | 221 | if (ram_size > (16 * 1024 * 1024)) |
215 | 222 | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
216 | 223 | else |
... | ... | @@ -676,7 +683,7 @@ static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) |
676 | 683 | } |
677 | 684 | |
678 | 685 | /* PC hardware initialisation */ |
679 | -static void pc_init1(int ram_size, int vga_ram_size, | |
686 | +static void pc_init1(ram_addr_t ram_size, int vga_ram_size, | |
680 | 687 | const char *boot_device, DisplayState *ds, |
681 | 688 | const char *kernel_filename, const char *kernel_cmdline, |
682 | 689 | const char *initrd_filename, |
... | ... | @@ -685,6 +692,7 @@ static void pc_init1(int ram_size, int vga_ram_size, |
685 | 692 | char buf[1024]; |
686 | 693 | int ret, linux_boot, i; |
687 | 694 | ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
695 | + ram_addr_t below_4g_mem_size, above_4g_mem_size = 0; | |
688 | 696 | int bios_size, isa_bios_size, vga_bios_size; |
689 | 697 | PCIBus *pci_bus; |
690 | 698 | int piix3_devfn = -1; |
... | ... | @@ -696,6 +704,13 @@ static void pc_init1(int ram_size, int vga_ram_size, |
696 | 704 | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
697 | 705 | BlockDriverState *fd[MAX_FD]; |
698 | 706 | |
707 | + if (ram_size >= 0xe0000000 ) { | |
708 | + above_4g_mem_size = ram_size - 0xe0000000; | |
709 | + below_4g_mem_size = 0xe0000000; | |
710 | + } else { | |
711 | + below_4g_mem_size = ram_size; | |
712 | + } | |
713 | + | |
699 | 714 | linux_boot = (kernel_filename != NULL); |
700 | 715 | |
701 | 716 | /* init CPUs */ |
... | ... | @@ -730,7 +745,13 @@ static void pc_init1(int ram_size, int vga_ram_size, |
730 | 745 | |
731 | 746 | /* allocate RAM */ |
732 | 747 | ram_addr = qemu_ram_alloc(ram_size); |
733 | - cpu_register_physical_memory(0, ram_size, ram_addr); | |
748 | + cpu_register_physical_memory(0, below_4g_mem_size, ram_addr); | |
749 | + | |
750 | + /* above 4giga memory allocation */ | |
751 | + if (above_4g_mem_size > 0) { | |
752 | + cpu_register_physical_memory(0x100000000ULL, above_4g_mem_size, | |
753 | + ram_addr + below_4g_mem_size); | |
754 | + } | |
734 | 755 | |
735 | 756 | /* allocate VGA RAM */ |
736 | 757 | vga_ram_addr = qemu_ram_alloc(vga_ram_size); |
... | ... | @@ -950,7 +971,7 @@ static void pc_init1(int ram_size, int vga_ram_size, |
950 | 971 | } |
951 | 972 | floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd); |
952 | 973 | |
953 | - cmos_init(ram_size, boot_device, hd); | |
974 | + cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd); | |
954 | 975 | |
955 | 976 | if (pci_enabled && usb_enabled) { |
956 | 977 | usb_uhci_piix3_init(pci_bus, piix3_devfn + 2); |
... | ... | @@ -990,7 +1011,7 @@ static void pc_init1(int ram_size, int vga_ram_size, |
990 | 1011 | } |
991 | 1012 | } |
992 | 1013 | |
993 | -static void pc_init_pci(int ram_size, int vga_ram_size, | |
1014 | +static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size, | |
994 | 1015 | const char *boot_device, DisplayState *ds, |
995 | 1016 | const char *kernel_filename, |
996 | 1017 | const char *kernel_cmdline, |
... | ... | @@ -1002,7 +1023,7 @@ static void pc_init_pci(int ram_size, int vga_ram_size, |
1002 | 1023 | initrd_filename, 1, cpu_model); |
1003 | 1024 | } |
1004 | 1025 | |
1005 | -static void pc_init_isa(int ram_size, int vga_ram_size, | |
1026 | +static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size, | |
1006 | 1027 | const char *boot_device, DisplayState *ds, |
1007 | 1028 | const char *kernel_filename, |
1008 | 1029 | const char *kernel_cmdline, | ... | ... |
hw/piix_pci.c
... | ... | @@ -55,7 +55,7 @@ static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) |
55 | 55 | return (irq_num + slot_addend) & 3; |
56 | 56 | } |
57 | 57 | |
58 | -static uint32_t isa_page_descs[384 / 4]; | |
58 | +static target_phys_addr_t isa_page_descs[384 / 4]; | |
59 | 59 | static uint8_t smm_enabled; |
60 | 60 | static int pci_irq_levels[4]; |
61 | 61 | ... | ... |
hw/ppc405_boards.c
... | ... | @@ -177,7 +177,7 @@ static void ref405ep_fpga_init (uint32_t base) |
177 | 177 | } |
178 | 178 | } |
179 | 179 | |
180 | -static void ref405ep_init (int ram_size, int vga_ram_size, | |
180 | +static void ref405ep_init (ram_addr_t ram_size, int vga_ram_size, | |
181 | 181 | const char *boot_device, DisplayState *ds, |
182 | 182 | const char *kernel_filename, |
183 | 183 | const char *kernel_cmdline, |
... | ... | @@ -504,7 +504,7 @@ static void taihu_cpld_init (uint32_t base) |
504 | 504 | } |
505 | 505 | } |
506 | 506 | |
507 | -static void taihu_405ep_init(int ram_size, int vga_ram_size, | |
507 | +static void taihu_405ep_init(ram_addr_t ram_size, int vga_ram_size, | |
508 | 508 | const char *boot_device, DisplayState *ds, |
509 | 509 | const char *kernel_filename, |
510 | 510 | const char *kernel_cmdline, | ... | ... |
hw/ppc_chrp.c
... | ... | @@ -57,7 +57,7 @@ static CPUReadMemoryFunc *unin_read[] = { |
57 | 57 | }; |
58 | 58 | |
59 | 59 | /* PowerPC Mac99 hardware initialisation */ |
60 | -static void ppc_core99_init (int ram_size, int vga_ram_size, | |
60 | +static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size, | |
61 | 61 | const char *boot_device, DisplayState *ds, |
62 | 62 | const char *kernel_filename, |
63 | 63 | const char *kernel_cmdline, | ... | ... |
hw/ppc_oldworld.c
... | ... | @@ -103,7 +103,7 @@ static int vga_osi_call (CPUState *env) |
103 | 103 | return 1; /* osi_call handled */ |
104 | 104 | } |
105 | 105 | |
106 | -static void ppc_heathrow_init (int ram_size, int vga_ram_size, | |
106 | +static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, | |
107 | 107 | const char *boot_device, DisplayState *ds, |
108 | 108 | const char *kernel_filename, |
109 | 109 | const char *kernel_cmdline, | ... | ... |
hw/ppc_prep.c
... | ... | @@ -535,7 +535,7 @@ CPUReadMemoryFunc *PPC_prep_io_read[] = { |
535 | 535 | #define NVRAM_SIZE 0x2000 |
536 | 536 | |
537 | 537 | /* PowerPC PREP hardware initialisation */ |
538 | -static void ppc_prep_init (int ram_size, int vga_ram_size, | |
538 | +static void ppc_prep_init (ram_addr_t ram_size, int vga_ram_size, | |
539 | 539 | const char *boot_device, DisplayState *ds, |
540 | 540 | const char *kernel_filename, |
541 | 541 | const char *kernel_cmdline, | ... | ... |
hw/r2d.c
... | ... | @@ -30,7 +30,7 @@ |
30 | 30 | #define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */ |
31 | 31 | #define SDRAM_SIZE 0x04000000 |
32 | 32 | |
33 | -static void r2d_init(int ram_size, int vga_ram_size, | |
33 | +static void r2d_init(ram_addr_t ram_size, int vga_ram_size, | |
34 | 34 | const char *boot_device, DisplayState * ds, |
35 | 35 | const char *kernel_filename, const char *kernel_cmdline, |
36 | 36 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/realview.c
... | ... | @@ -23,7 +23,7 @@ static struct arm_boot_info realview_binfo = { |
23 | 23 | .board_id = 0x33b, |
24 | 24 | }; |
25 | 25 | |
26 | -static void realview_init(int ram_size, int vga_ram_size, | |
26 | +static void realview_init(ram_addr_t ram_size, int vga_ram_size, | |
27 | 27 | const char *boot_device, DisplayState *ds, |
28 | 28 | const char *kernel_filename, const char *kernel_cmdline, |
29 | 29 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/shix.c
... | ... | @@ -65,7 +65,7 @@ void vga_screen_dump(const char *filename) |
65 | 65 | /* XXXXX */ |
66 | 66 | } |
67 | 67 | |
68 | -static void shix_init(int ram_size, int vga_ram_size, | |
68 | +static void shix_init(ram_addr_t ram_size, int vga_ram_size, | |
69 | 69 | const char *boot_device, DisplayState * ds, |
70 | 70 | const char *kernel_filename, const char *kernel_cmdline, |
71 | 71 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/spitz.c
... | ... | @@ -1185,7 +1185,7 @@ static struct arm_boot_info spitz_binfo = { |
1185 | 1185 | .ram_size = 0x04000000, |
1186 | 1186 | }; |
1187 | 1187 | |
1188 | -static void spitz_common_init(int ram_size, int vga_ram_size, | |
1188 | +static void spitz_common_init(ram_addr_t ram_size, int vga_ram_size, | |
1189 | 1189 | DisplayState *ds, const char *kernel_filename, |
1190 | 1190 | const char *kernel_cmdline, const char *initrd_filename, |
1191 | 1191 | const char *cpu_model, enum spitz_model_e model, int arm_id) |
... | ... | @@ -1245,7 +1245,7 @@ static void spitz_common_init(int ram_size, int vga_ram_size, |
1245 | 1245 | sl_bootparam_write(SL_PXA_PARAM_BASE - PXA2XX_SDRAM_BASE); |
1246 | 1246 | } |
1247 | 1247 | |
1248 | -static void spitz_init(int ram_size, int vga_ram_size, | |
1248 | +static void spitz_init(ram_addr_t ram_size, int vga_ram_size, | |
1249 | 1249 | const char *boot_device, DisplayState *ds, |
1250 | 1250 | const char *kernel_filename, const char *kernel_cmdline, |
1251 | 1251 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -1254,7 +1254,7 @@ static void spitz_init(int ram_size, int vga_ram_size, |
1254 | 1254 | kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9); |
1255 | 1255 | } |
1256 | 1256 | |
1257 | -static void borzoi_init(int ram_size, int vga_ram_size, | |
1257 | +static void borzoi_init(ram_addr_t ram_size, int vga_ram_size, | |
1258 | 1258 | const char *boot_device, DisplayState *ds, |
1259 | 1259 | const char *kernel_filename, const char *kernel_cmdline, |
1260 | 1260 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -1263,7 +1263,7 @@ static void borzoi_init(int ram_size, int vga_ram_size, |
1263 | 1263 | kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f); |
1264 | 1264 | } |
1265 | 1265 | |
1266 | -static void akita_init(int ram_size, int vga_ram_size, | |
1266 | +static void akita_init(ram_addr_t ram_size, int vga_ram_size, | |
1267 | 1267 | const char *boot_device, DisplayState *ds, |
1268 | 1268 | const char *kernel_filename, const char *kernel_cmdline, |
1269 | 1269 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -1272,7 +1272,7 @@ static void akita_init(int ram_size, int vga_ram_size, |
1272 | 1272 | kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8); |
1273 | 1273 | } |
1274 | 1274 | |
1275 | -static void terrier_init(int ram_size, int vga_ram_size, | |
1275 | +static void terrier_init(ram_addr_t ram_size, int vga_ram_size, | |
1276 | 1276 | const char *boot_device, DisplayState *ds, |
1277 | 1277 | const char *kernel_filename, const char *kernel_cmdline, |
1278 | 1278 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/stellaris.c
... | ... | @@ -1169,7 +1169,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, |
1169 | 1169 | } |
1170 | 1170 | |
1171 | 1171 | /* FIXME: Figure out how to generate these from stellaris_boards. */ |
1172 | -static void lm3s811evb_init(int ram_size, int vga_ram_size, | |
1172 | +static void lm3s811evb_init(ram_addr_t ram_size, int vga_ram_size, | |
1173 | 1173 | const char *boot_device, DisplayState *ds, |
1174 | 1174 | const char *kernel_filename, const char *kernel_cmdline, |
1175 | 1175 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -1177,7 +1177,7 @@ static void lm3s811evb_init(int ram_size, int vga_ram_size, |
1177 | 1177 | stellaris_init(kernel_filename, cpu_model, ds, &stellaris_boards[0]); |
1178 | 1178 | } |
1179 | 1179 | |
1180 | -static void lm3s6965evb_init(int ram_size, int vga_ram_size, | |
1180 | +static void lm3s6965evb_init(ram_addr_t ram_size, int vga_ram_size, | |
1181 | 1181 | const char *boot_device, DisplayState *ds, |
1182 | 1182 | const char *kernel_filename, const char *kernel_cmdline, |
1183 | 1183 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/sun4m.c
... | ... | @@ -1110,7 +1110,7 @@ static const struct hwdef hwdefs[] = { |
1110 | 1110 | }; |
1111 | 1111 | |
1112 | 1112 | /* SPARCstation 5 hardware initialisation */ |
1113 | -static void ss5_init(int RAM_size, int vga_ram_size, | |
1113 | +static void ss5_init(ram_addr_t RAM_size, int vga_ram_size, | |
1114 | 1114 | const char *boot_device, DisplayState *ds, |
1115 | 1115 | const char *kernel_filename, const char *kernel_cmdline, |
1116 | 1116 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -1120,7 +1120,7 @@ static void ss5_init(int RAM_size, int vga_ram_size, |
1120 | 1120 | } |
1121 | 1121 | |
1122 | 1122 | /* SPARCstation 10 hardware initialisation */ |
1123 | -static void ss10_init(int RAM_size, int vga_ram_size, | |
1123 | +static void ss10_init(ram_addr_t RAM_size, int vga_ram_size, | |
1124 | 1124 | const char *boot_device, DisplayState *ds, |
1125 | 1125 | const char *kernel_filename, const char *kernel_cmdline, |
1126 | 1126 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -1130,7 +1130,7 @@ static void ss10_init(int RAM_size, int vga_ram_size, |
1130 | 1130 | } |
1131 | 1131 | |
1132 | 1132 | /* SPARCserver 600MP hardware initialisation */ |
1133 | -static void ss600mp_init(int RAM_size, int vga_ram_size, | |
1133 | +static void ss600mp_init(ram_addr_t RAM_size, int vga_ram_size, | |
1134 | 1134 | const char *boot_device, DisplayState *ds, |
1135 | 1135 | const char *kernel_filename, const char *kernel_cmdline, |
1136 | 1136 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -1140,7 +1140,7 @@ static void ss600mp_init(int RAM_size, int vga_ram_size, |
1140 | 1140 | } |
1141 | 1141 | |
1142 | 1142 | /* SPARCstation 20 hardware initialisation */ |
1143 | -static void ss20_init(int RAM_size, int vga_ram_size, | |
1143 | +static void ss20_init(ram_addr_t RAM_size, int vga_ram_size, | |
1144 | 1144 | const char *boot_device, DisplayState *ds, |
1145 | 1145 | const char *kernel_filename, const char *kernel_cmdline, |
1146 | 1146 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -1150,7 +1150,7 @@ static void ss20_init(int RAM_size, int vga_ram_size, |
1150 | 1150 | } |
1151 | 1151 | |
1152 | 1152 | /* SPARCstation 2 hardware initialisation */ |
1153 | -static void ss2_init(int RAM_size, int vga_ram_size, | |
1153 | +static void ss2_init(ram_addr_t RAM_size, int vga_ram_size, | |
1154 | 1154 | const char *boot_device, DisplayState *ds, |
1155 | 1155 | const char *kernel_filename, const char *kernel_cmdline, |
1156 | 1156 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -1480,7 +1480,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, int RAM_size, |
1480 | 1480 | } |
1481 | 1481 | |
1482 | 1482 | /* SPARCserver 1000 hardware initialisation */ |
1483 | -static void ss1000_init(int RAM_size, int vga_ram_size, | |
1483 | +static void ss1000_init(ram_addr_t RAM_size, int vga_ram_size, | |
1484 | 1484 | const char *boot_device, DisplayState *ds, |
1485 | 1485 | const char *kernel_filename, const char *kernel_cmdline, |
1486 | 1486 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -1490,7 +1490,7 @@ static void ss1000_init(int RAM_size, int vga_ram_size, |
1490 | 1490 | } |
1491 | 1491 | |
1492 | 1492 | /* SPARCcenter 2000 hardware initialisation */ |
1493 | -static void ss2000_init(int RAM_size, int vga_ram_size, | |
1493 | +static void ss2000_init(ram_addr_t RAM_size, int vga_ram_size, | |
1494 | 1494 | const char *boot_device, DisplayState *ds, |
1495 | 1495 | const char *kernel_filename, const char *kernel_cmdline, |
1496 | 1496 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/sun4u.c
... | ... | @@ -227,7 +227,7 @@ static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
227 | 227 | static fdctrl_t *floppy_controller; |
228 | 228 | |
229 | 229 | /* Sun4u hardware initialisation */ |
230 | -static void sun4u_init(int ram_size, int vga_ram_size, | |
230 | +static void sun4u_init(ram_addr_t ram_size, int vga_ram_size, | |
231 | 231 | const char *boot_devices, DisplayState *ds, |
232 | 232 | const char *kernel_filename, const char *kernel_cmdline, |
233 | 233 | const char *initrd_filename, const char *cpu_model) | ... | ... |
hw/versatilepb.c
... | ... | @@ -159,7 +159,7 @@ static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq) |
159 | 159 | |
160 | 160 | static struct arm_boot_info versatile_binfo; |
161 | 161 | |
162 | -static void versatile_init(int ram_size, int vga_ram_size, | |
162 | +static void versatile_init(ram_addr_t ram_size, int vga_ram_size, | |
163 | 163 | const char *boot_device, DisplayState *ds, |
164 | 164 | const char *kernel_filename, const char *kernel_cmdline, |
165 | 165 | const char *initrd_filename, const char *cpu_model, |
... | ... | @@ -293,7 +293,7 @@ static void versatile_init(int ram_size, int vga_ram_size, |
293 | 293 | arm_load_kernel(env, &versatile_binfo); |
294 | 294 | } |
295 | 295 | |
296 | -static void vpb_init(int ram_size, int vga_ram_size, | |
296 | +static void vpb_init(ram_addr_t ram_size, int vga_ram_size, | |
297 | 297 | const char *boot_device, DisplayState *ds, |
298 | 298 | const char *kernel_filename, const char *kernel_cmdline, |
299 | 299 | const char *initrd_filename, const char *cpu_model) |
... | ... | @@ -304,7 +304,7 @@ static void vpb_init(int ram_size, int vga_ram_size, |
304 | 304 | initrd_filename, cpu_model, 0x183); |
305 | 305 | } |
306 | 306 | |
307 | -static void vab_init(int ram_size, int vga_ram_size, | |
307 | +static void vab_init(ram_addr_t ram_size, int vga_ram_size, | |
308 | 308 | const char *boot_device, DisplayState *ds, |
309 | 309 | const char *kernel_filename, const char *kernel_cmdline, |
310 | 310 | const char *initrd_filename, const char *cpu_model) | ... | ... |
osdep.c
... | ... | @@ -98,7 +98,6 @@ static void *kqemu_vmalloc(size_t size) |
98 | 98 | int64_t free_space; |
99 | 99 | int ram_mb; |
100 | 100 | |
101 | - extern int ram_size; | |
102 | 101 | free_space = (int64_t)stfs.f_bavail * stfs.f_bsize; |
103 | 102 | if ((ram_size + 8192 * 1024) >= free_space) { |
104 | 103 | ram_mb = (ram_size / (1024 * 1024)); | ... | ... |
qemu-doc.texi
... | ... | @@ -322,7 +322,9 @@ Disable boot signature checking for floppy disks in Bochs BIOS. It may |
322 | 322 | be needed to boot from old floppy disks. |
323 | 323 | |
324 | 324 | @item -m @var{megs} |
325 | -Set virtual RAM size to @var{megs} megabytes. Default is 128 MiB. | |
325 | +Set virtual RAM size to @var{megs} megabytes. Default is 128 MiB. Optionally, | |
326 | +a suffix of ``M'' or ``G'' can be used to signify a value in megabytes or | |
327 | +gigabytes respectively. | |
326 | 328 | |
327 | 329 | @item -smp @var{n} |
328 | 330 | Simulate an SMP system with @var{n} CPUs. On the PC target, up to 255 | ... | ... |
sysemu.h
vl.c
... | ... | @@ -142,8 +142,6 @@ int inet_aton(const char *cp, struct in_addr *ia); |
142 | 142 | //#define DEBUG_UNUSED_IOPORT |
143 | 143 | //#define DEBUG_IOPORT |
144 | 144 | |
145 | -#define PHYS_RAM_MAX_SIZE (2047 * 1024 * 1024) | |
146 | - | |
147 | 145 | #ifdef TARGET_PPC |
148 | 146 | #define DEFAULT_RAM_SIZE 144 |
149 | 147 | #else |
... | ... | @@ -175,7 +173,7 @@ int nographic; |
175 | 173 | int curses; |
176 | 174 | const char* keyboard_layout = NULL; |
177 | 175 | int64_t ticks_per_sec; |
178 | -int ram_size; | |
176 | +ram_addr_t ram_size; | |
179 | 177 | int pit_min_timer_count = 0; |
180 | 178 | int nb_nics; |
181 | 179 | NICInfo nd_table[MAX_NICS]; |
... | ... | @@ -6877,7 +6875,8 @@ static int ram_get_page(QEMUFile *f, uint8_t *buf, int len) |
6877 | 6875 | |
6878 | 6876 | static int ram_load_v1(QEMUFile *f, void *opaque) |
6879 | 6877 | { |
6880 | - int i, ret; | |
6878 | + int ret; | |
6879 | + ram_addr_t i; | |
6881 | 6880 | |
6882 | 6881 | if (qemu_get_be32(f) != phys_ram_size) |
6883 | 6882 | return -EINVAL; |
... | ... | @@ -7013,7 +7012,7 @@ static void ram_decompress_close(RamDecompressState *s) |
7013 | 7012 | |
7014 | 7013 | static void ram_save(QEMUFile *f, void *opaque) |
7015 | 7014 | { |
7016 | - int i; | |
7015 | + ram_addr_t i; | |
7017 | 7016 | RamCompressState s1, *s = &s1; |
7018 | 7017 | uint8_t buf[10]; |
7019 | 7018 | |
... | ... | @@ -7058,7 +7057,7 @@ static int ram_load(QEMUFile *f, void *opaque, int version_id) |
7058 | 7057 | { |
7059 | 7058 | RamDecompressState s1, *s = &s1; |
7060 | 7059 | uint8_t buf[10]; |
7061 | - int i; | |
7060 | + ram_addr_t i; | |
7062 | 7061 | |
7063 | 7062 | if (version_id == 1) |
7064 | 7063 | return ram_load_v1(f, opaque); |
... | ... | @@ -7075,7 +7074,7 @@ static int ram_load(QEMUFile *f, void *opaque, int version_id) |
7075 | 7074 | } |
7076 | 7075 | if (buf[0] == 0) { |
7077 | 7076 | if (ram_decompress_buf(s, phys_ram_base + i, BDRV_HASH_BLOCK_SIZE) < 0) { |
7078 | - fprintf(stderr, "Error while reading ram block address=0x%08x", i); | |
7077 | + fprintf(stderr, "Error while reading ram block address=0x%08" PRIx64, (uint64_t)i); | |
7079 | 7078 | goto error; |
7080 | 7079 | } |
7081 | 7080 | } else |
... | ... | @@ -8556,16 +8555,39 @@ int main(int argc, char **argv) |
8556 | 8555 | case QEMU_OPTION_h: |
8557 | 8556 | help(0); |
8558 | 8557 | break; |
8559 | - case QEMU_OPTION_m: | |
8560 | - ram_size = atoi(optarg) * 1024 * 1024; | |
8561 | - if (ram_size <= 0) | |
8562 | - help(1); | |
8563 | - if (ram_size > PHYS_RAM_MAX_SIZE) { | |
8564 | - fprintf(stderr, "qemu: at most %d MB RAM can be simulated\n", | |
8565 | - PHYS_RAM_MAX_SIZE / (1024 * 1024)); | |
8558 | + case QEMU_OPTION_m: { | |
8559 | + uint64_t value; | |
8560 | + char *ptr; | |
8561 | + | |
8562 | + value = strtoul(optarg, &ptr, 10); | |
8563 | + switch (*ptr) { | |
8564 | + case 0: case 'M': case 'm': | |
8565 | + value <<= 20; | |
8566 | + break; | |
8567 | + case 'G': case 'g': | |
8568 | + value <<= 30; | |
8569 | + break; | |
8570 | + default: | |
8571 | + fprintf(stderr, "qemu: invalid ram size: %s\n", optarg); | |
8566 | 8572 | exit(1); |
8567 | 8573 | } |
8574 | + | |
8575 | + /* On 32-bit hosts, QEMU is limited by virtual address space */ | |
8576 | + if (value > (2047 << 20) | |
8577 | +#ifndef USE_KQEMU | |
8578 | + && HOST_LONG_BITS == 32 | |
8579 | +#endif | |
8580 | + ) { | |
8581 | + fprintf(stderr, "qemu: at most 2047 MB RAM can be simulated\n"); | |
8582 | + exit(1); | |
8583 | + } | |
8584 | + if (value != (uint64_t)(ram_addr_t)value) { | |
8585 | + fprintf(stderr, "qemu: ram size too large\n"); | |
8586 | + exit(1); | |
8587 | + } | |
8588 | + ram_size = value; | |
8568 | 8589 | break; |
8590 | + } | |
8569 | 8591 | case QEMU_OPTION_d: |
8570 | 8592 | { |
8571 | 8593 | int mask; | ... | ... |