Commit 9617efe8e78fe977c8ddbb18d7b14b532ab07c3e
1 parent
e14a693d
Another bunch of mips host support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2788 c046a42c-6fe2-441c-8c8c-71466251a162
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3 changed files
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24 additions
and
5 deletions
Makefile.target
... | ... | @@ -181,7 +181,7 @@ BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld |
181 | 181 | endif |
182 | 182 | |
183 | 183 | ifeq ($(ARCH),mips) |
184 | -OP_CFLAGS+=-G 0 -fomit-frame-pointer -fno-delayed-branch | |
184 | +OP_CFLAGS+=-mabi=32 -G0 -fno-PIC -mno-abicalls -fomit-frame-pointer -fno-delayed-branch -Wa,-O0 | |
185 | 185 | ifeq ($(WORDS_BIGENDIAN),yes) |
186 | 186 | BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld |
187 | 187 | else |
... | ... | @@ -190,7 +190,7 @@ endif |
190 | 190 | endif |
191 | 191 | |
192 | 192 | ifeq ($(ARCH),mips64) |
193 | -OP_CFLAGS+=-G 0 -fomit-frame-pointer -fno-delayed-branch | |
193 | +OP_CFLAGS+=-mabi=n32 -G0 -fno-PIC -mno-abicalls -fomit-frame-pointer -fno-delayed-branch -Wa,-O0 | |
194 | 194 | ifeq ($(WORDS_BIGENDIAN),yes) |
195 | 195 | BASE_LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld |
196 | 196 | else | ... | ... |
cpu-exec.c
... | ... | @@ -1545,9 +1545,10 @@ int cpu_signal_handler(int host_signum, void *pinfo, |
1545 | 1545 | |
1546 | 1546 | #elif defined(__mips__) |
1547 | 1547 | |
1548 | -int cpu_signal_handler(int host_signum, struct siginfo *info, | |
1548 | +int cpu_signal_handler(int host_signum, void *pinfo, | |
1549 | 1549 | void *puc) |
1550 | 1550 | { |
1551 | + siginfo_t *info = pinfo; | |
1551 | 1552 | struct ucontext *uc = puc; |
1552 | 1553 | greg_t pc = uc->uc_mcontext.pc; |
1553 | 1554 | int is_write; | ... | ... |
dyngen.c
... | ... | @@ -124,6 +124,14 @@ |
124 | 124 | #define elf_check_arch(x) ((x) == EM_MIPS) |
125 | 125 | #define ELF_USES_RELOC |
126 | 126 | |
127 | +#elif defined(HOST_MIPS64) | |
128 | + | |
129 | +/* Assume n32 ABI here, which is ELF32. */ | |
130 | +#define ELF_CLASS ELFCLASS32 | |
131 | +#define ELF_ARCH EM_MIPS | |
132 | +#define elf_check_arch(x) ((x) == EM_MIPS) | |
133 | +#define ELF_USES_RELOCA | |
134 | + | |
127 | 135 | #else |
128 | 136 | #error unsupported CPU - please update the code |
129 | 137 | #endif |
... | ... | @@ -1648,7 +1656,7 @@ void gen_code(const char *name, host_ulong offset, host_ulong size, |
1648 | 1656 | error("rts expected at the end of %s", name); |
1649 | 1657 | copy_size = p - p_start; |
1650 | 1658 | } |
1651 | -#elif defined(HOST_MIPS) | |
1659 | +#elif defined(HOST_MIPS) || defined(HOST_MIPS64) | |
1652 | 1660 | { |
1653 | 1661 | #define INSN_RETURN 0x03e00008 |
1654 | 1662 | #define INSN_NOP 0x00000000 |
... | ... | @@ -2510,7 +2518,7 @@ void gen_code(const char *name, host_ulong offset, host_ulong size, |
2510 | 2518 | } |
2511 | 2519 | } |
2512 | 2520 | } |
2513 | -#elif defined(HOST_MIPS) | |
2521 | +#elif defined(HOST_MIPS) || defined(HOST_MIPS64) | |
2514 | 2522 | { |
2515 | 2523 | for (i = 0, rel = relocs; i < nb_relocs; i++, rel++) { |
2516 | 2524 | if (rel->r_offset >= start_offset && rel->r_offset < start_offset + copy_size) { |
... | ... | @@ -2528,6 +2536,16 @@ void gen_code(const char *name, host_ulong offset, host_ulong size, |
2528 | 2536 | addend = get32((uint32_t *)(text + rel->r_offset)); |
2529 | 2537 | reloc_offset = rel->r_offset - start_offset; |
2530 | 2538 | switch (type) { |
2539 | + case R_MIPS_26: | |
2540 | + fprintf(outfile, " /* R_MIPS_26 RELOC, offset 0x%x, name %s */\n", | |
2541 | + rel->r_offset, sym_name); | |
2542 | + fprintf(outfile, | |
2543 | + " *(uint32_t *)(gen_code_ptr + 0x%x) = " | |
2544 | + "(0x%x & ~0x3fffff) " | |
2545 | + "| ((0x%x + ((%s - (*(uint32_t *)(gen_code_ptr + 0x%x))) >> 2)) " | |
2546 | + " & 0x3fffff);\n", | |
2547 | + reloc_offset, addend, addend, name, reloc_offset); | |
2548 | + break; | |
2531 | 2549 | case R_MIPS_HI16: |
2532 | 2550 | fprintf(outfile, " /* R_MIPS_HI16 RELOC, offset 0x%x, name %s */\n", |
2533 | 2551 | rel->r_offset, sym_name); | ... | ... |