Commit 9467d44c4d5d9a2f1e0b4e3e0239320cbf81c1d2

Authored by ths
1 parent a8fcf883

Move target-specific defines to the target directories.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
cpu-all.h
@@ -692,77 +692,6 @@ int page_get_flags(target_ulong address); @@ -692,77 +692,6 @@ int page_get_flags(target_ulong address);
692 void page_set_flags(target_ulong start, target_ulong end, int flags); 692 void page_set_flags(target_ulong start, target_ulong end, int flags);
693 void page_unprotect_range(target_ulong data, target_ulong data_size); 693 void page_unprotect_range(target_ulong data, target_ulong data_size);
694 694
695 -#define SINGLE_CPU_DEFINES  
696 -#ifdef SINGLE_CPU_DEFINES  
697 -  
698 -#if defined(TARGET_I386)  
699 -  
700 -#define CPUState CPUX86State  
701 -#define cpu_init cpu_x86_init  
702 -#define cpu_exec cpu_x86_exec  
703 -#define cpu_gen_code cpu_x86_gen_code  
704 -#define cpu_signal_handler cpu_x86_signal_handler  
705 -  
706 -#elif defined(TARGET_ARM)  
707 -  
708 -#define CPUState CPUARMState  
709 -#define cpu_init cpu_arm_init  
710 -#define cpu_exec cpu_arm_exec  
711 -#define cpu_gen_code cpu_arm_gen_code  
712 -#define cpu_signal_handler cpu_arm_signal_handler  
713 -  
714 -#elif defined(TARGET_SPARC)  
715 -  
716 -#define CPUState CPUSPARCState  
717 -#define cpu_init cpu_sparc_init  
718 -#define cpu_exec cpu_sparc_exec  
719 -#define cpu_gen_code cpu_sparc_gen_code  
720 -#define cpu_signal_handler cpu_sparc_signal_handler  
721 -  
722 -#elif defined(TARGET_PPC)  
723 -  
724 -#define CPUState CPUPPCState  
725 -#define cpu_init cpu_ppc_init  
726 -#define cpu_exec cpu_ppc_exec  
727 -#define cpu_gen_code cpu_ppc_gen_code  
728 -#define cpu_signal_handler cpu_ppc_signal_handler  
729 -  
730 -#elif defined(TARGET_M68K)  
731 -#define CPUState CPUM68KState  
732 -#define cpu_init cpu_m68k_init  
733 -#define cpu_exec cpu_m68k_exec  
734 -#define cpu_gen_code cpu_m68k_gen_code  
735 -#define cpu_signal_handler cpu_m68k_signal_handler  
736 -  
737 -#elif defined(TARGET_MIPS)  
738 -#define CPUState CPUMIPSState  
739 -#define cpu_init cpu_mips_init  
740 -#define cpu_exec cpu_mips_exec  
741 -#define cpu_gen_code cpu_mips_gen_code  
742 -#define cpu_signal_handler cpu_mips_signal_handler  
743 -  
744 -#elif defined(TARGET_SH4)  
745 -#define CPUState CPUSH4State  
746 -#define cpu_init cpu_sh4_init  
747 -#define cpu_exec cpu_sh4_exec  
748 -#define cpu_gen_code cpu_sh4_gen_code  
749 -#define cpu_signal_handler cpu_sh4_signal_handler  
750 -  
751 -#elif defined(TARGET_ALPHA)  
752 -#define CPUState CPUAlphaState  
753 -#define cpu_init cpu_alpha_init  
754 -#define cpu_exec cpu_alpha_exec  
755 -#define cpu_gen_code cpu_alpha_gen_code  
756 -#define cpu_signal_handler cpu_alpha_signal_handler  
757 -  
758 -#else  
759 -  
760 -#error unsupported target CPU  
761 -  
762 -#endif  
763 -  
764 -#endif /* SINGLE_CPU_DEFINES */  
765 -  
766 CPUState *cpu_copy(CPUState *env); 695 CPUState *cpu_copy(CPUState *env);
767 696
768 void cpu_dump_state(CPUState *env, FILE *f, 697 void cpu_dump_state(CPUState *env, FILE *f,
target-alpha/cpu.h
@@ -300,6 +300,12 @@ struct CPUAlphaState { @@ -300,6 +300,12 @@ struct CPUAlphaState {
300 pal_handler_t *pal_handler; 300 pal_handler_t *pal_handler;
301 }; 301 };
302 302
  303 +#define CPUState CPUAlphaState
  304 +#define cpu_init cpu_alpha_init
  305 +#define cpu_exec cpu_alpha_exec
  306 +#define cpu_gen_code cpu_alpha_gen_code
  307 +#define cpu_signal_handler cpu_alpha_signal_handler
  308 +
303 #include "cpu-all.h" 309 #include "cpu-all.h"
304 310
305 enum { 311 enum {
target-arm/cpu.h
@@ -285,6 +285,13 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, @@ -285,6 +285,13 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
285 architecture revisions. Maybe an a configure option to disable them. */ 285 architecture revisions. Maybe an a configure option to disable them. */
286 #define TARGET_PAGE_BITS 10 286 #define TARGET_PAGE_BITS 10
287 #endif 287 #endif
  288 +
  289 +#define CPUState CPUARMState
  290 +#define cpu_init cpu_arm_init
  291 +#define cpu_exec cpu_arm_exec
  292 +#define cpu_gen_code cpu_arm_gen_code
  293 +#define cpu_signal_handler cpu_arm_signal_handler
  294 +
288 #include "cpu-all.h" 295 #include "cpu-all.h"
289 296
290 #endif 297 #endif
target-i386/cpu.h
@@ -661,6 +661,13 @@ static inline int cpu_get_time_fast(void) @@ -661,6 +661,13 @@ static inline int cpu_get_time_fast(void)
661 #endif 661 #endif
662 662
663 #define TARGET_PAGE_BITS 12 663 #define TARGET_PAGE_BITS 12
  664 +
  665 +#define CPUState CPUX86State
  666 +#define cpu_init cpu_x86_init
  667 +#define cpu_exec cpu_x86_exec
  668 +#define cpu_gen_code cpu_x86_gen_code
  669 +#define cpu_signal_handler cpu_x86_signal_handler
  670 +
664 #include "cpu-all.h" 671 #include "cpu-all.h"
665 672
666 #endif /* CPU_I386_H */ 673 #endif /* CPU_I386_H */
target-m68k/cpu.h
@@ -216,6 +216,13 @@ void register_m68k_insns (CPUM68KState *env); @@ -216,6 +216,13 @@ void register_m68k_insns (CPUM68KState *env);
216 /* Smallest TLB entry size is 1k. */ 216 /* Smallest TLB entry size is 1k. */
217 #define TARGET_PAGE_BITS 10 217 #define TARGET_PAGE_BITS 10
218 #endif 218 #endif
  219 +
  220 +#define CPUState CPUM68KState
  221 +#define cpu_init cpu_m68k_init
  222 +#define cpu_exec cpu_m68k_exec
  223 +#define cpu_gen_code cpu_m68k_gen_code
  224 +#define cpu_signal_handler cpu_m68k_signal_handler
  225 +
219 #include "cpu-all.h" 226 #include "cpu-all.h"
220 227
221 #endif 228 #endif
target-mips/cpu.h
@@ -317,6 +317,12 @@ int mips_find_by_name (const unsigned char *name, mips_def_t **def); @@ -317,6 +317,12 @@ int mips_find_by_name (const unsigned char *name, mips_def_t **def);
317 void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); 317 void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
318 int cpu_mips_register (CPUMIPSState *env, mips_def_t *def); 318 int cpu_mips_register (CPUMIPSState *env, mips_def_t *def);
319 319
  320 +#define CPUState CPUMIPSState
  321 +#define cpu_init cpu_mips_init
  322 +#define cpu_exec cpu_mips_exec
  323 +#define cpu_gen_code cpu_mips_gen_code
  324 +#define cpu_signal_handler cpu_mips_signal_handler
  325 +
320 #include "cpu-all.h" 326 #include "cpu-all.h"
321 327
322 /* Memory access type : 328 /* Memory access type :
target-ppc/cpu.h
@@ -899,6 +899,12 @@ int ppcemb_tlb_search (CPUPPCState *env, target_ulong address); @@ -899,6 +899,12 @@ int ppcemb_tlb_search (CPUPPCState *env, target_ulong address);
899 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp); 899 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp);
900 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val); 900 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val);
901 901
  902 +#define CPUState CPUPPCState
  903 +#define cpu_init cpu_ppc_init
  904 +#define cpu_exec cpu_ppc_exec
  905 +#define cpu_gen_code cpu_ppc_gen_code
  906 +#define cpu_signal_handler cpu_ppc_signal_handler
  907 +
902 #include "cpu-all.h" 908 #include "cpu-all.h"
903 909
904 /*****************************************************************************/ 910 /*****************************************************************************/
target-sh4/cpu.h
@@ -126,6 +126,12 @@ int cpu_sh4_signal_handler(int host_signum, void *pinfo, @@ -126,6 +126,12 @@ int cpu_sh4_signal_handler(int host_signum, void *pinfo,
126 126
127 #include "softfloat.h" 127 #include "softfloat.h"
128 128
  129 +#define CPUState CPUSH4State
  130 +#define cpu_init cpu_sh4_init
  131 +#define cpu_exec cpu_sh4_exec
  132 +#define cpu_gen_code cpu_sh4_gen_code
  133 +#define cpu_signal_handler cpu_sh4_signal_handler
  134 +
129 #include "cpu-all.h" 135 #include "cpu-all.h"
130 136
131 /* Memory access type */ 137 /* Memory access type */
target-sparc/cpu.h
@@ -302,6 +302,12 @@ void do_tick_set_count(void *opaque, uint64_t count); @@ -302,6 +302,12 @@ void do_tick_set_count(void *opaque, uint64_t count);
302 uint64_t do_tick_get_count(void *opaque); 302 uint64_t do_tick_get_count(void *opaque);
303 void do_tick_set_limit(void *opaque, uint64_t limit); 303 void do_tick_set_limit(void *opaque, uint64_t limit);
304 304
  305 +#define CPUState CPUSPARCState
  306 +#define cpu_init cpu_sparc_init
  307 +#define cpu_exec cpu_sparc_exec
  308 +#define cpu_gen_code cpu_sparc_gen_code
  309 +#define cpu_signal_handler cpu_sparc_signal_handler
  310 +
305 #include "cpu-all.h" 311 #include "cpu-all.h"
306 312
307 #endif 313 #endif