Commit 93fcfe39a0383377e647b821c9f165fd927cd4e0
1 parent
6cec5487
Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevel global variables to use the new qemu_log*() macros. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
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40 changed files
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295 additions
and
471 deletions
block-raw-posix.c
... | ... | @@ -67,8 +67,8 @@ |
67 | 67 | |
68 | 68 | //#define DEBUG_BLOCK |
69 | 69 | #if defined(DEBUG_BLOCK) |
70 | -#define DEBUG_BLOCK_PRINT(formatCstr, args...) do { if (loglevel != 0) \ | |
71 | - { fprintf(logfile, formatCstr, ##args); fflush(logfile); } } while (0) | |
70 | +#define DEBUG_BLOCK_PRINT(formatCstr, args...) do { if (qemu_log_enabled()) \ | |
71 | + { qemu_log(formatCstr, ##args); fflush(logfile); } } while (0) | |
72 | 72 | #else |
73 | 73 | #define DEBUG_BLOCK_PRINT(formatCstr, args...) |
74 | 74 | #endif | ... | ... |
bsd-user/elfload.c
... | ... | @@ -1456,7 +1456,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs, |
1456 | 1456 | |
1457 | 1457 | free(elf_phdata); |
1458 | 1458 | |
1459 | - if (loglevel) | |
1459 | + if (qemu_log_enabled()) | |
1460 | 1460 | load_symbols(&elf_ex, bprm->fd); |
1461 | 1461 | |
1462 | 1462 | if (interpreter_type != INTERPRETER_AOUT) close(bprm->fd); | ... | ... |
bsd-user/main.c
... | ... | @@ -533,21 +533,19 @@ int main(int argc, char **argv) |
533 | 533 | |
534 | 534 | free(target_environ); |
535 | 535 | |
536 | - if (loglevel) { | |
537 | - page_dump(logfile); | |
538 | - | |
539 | - fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk); | |
540 | - fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code); | |
541 | - fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n", | |
542 | - info->start_code); | |
543 | - fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n", | |
544 | - info->start_data); | |
545 | - fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data); | |
546 | - fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n", | |
547 | - info->start_stack); | |
548 | - fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk); | |
549 | - fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry); | |
550 | - } | |
536 | + log_page_dump(); | |
537 | + | |
538 | + qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk); | |
539 | + qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code); | |
540 | + qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n", | |
541 | + info->start_code); | |
542 | + qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n", | |
543 | + info->start_data); | |
544 | + qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data); | |
545 | + qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n", | |
546 | + info->start_stack); | |
547 | + qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk); | |
548 | + qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry); | |
551 | 549 | |
552 | 550 | target_set_brk(info->brk); |
553 | 551 | syscall_init(); | ... | ... |
cpu-exec.c
... | ... | @@ -390,9 +390,7 @@ int cpu_exec(CPUState *env1) |
390 | 390 | svm_check_intercept(SVM_EXIT_INTR); |
391 | 391 | env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ); |
392 | 392 | intno = cpu_get_pic_interrupt(env); |
393 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | |
394 | - fprintf(logfile, "Servicing hardware INT=0x%02x\n", intno); | |
395 | - } | |
393 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno); | |
396 | 394 | do_interrupt(intno, 0, 0, 0, 1); |
397 | 395 | /* ensure that no TB jump will be modified as |
398 | 396 | the program flow was changed */ |
... | ... | @@ -405,8 +403,7 @@ int cpu_exec(CPUState *env1) |
405 | 403 | /* FIXME: this should respect TPR */ |
406 | 404 | svm_check_intercept(SVM_EXIT_VINTR); |
407 | 405 | intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector)); |
408 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
409 | - fprintf(logfile, "Servicing virtual hardware INT=0x%02x\n", intno); | |
406 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno); | |
410 | 407 | do_interrupt(intno, 0, 0, 0, 1); |
411 | 408 | env->interrupt_request &= ~CPU_INTERRUPT_VIRQ; |
412 | 409 | next_tb = 0; |
... | ... | @@ -540,28 +537,28 @@ int cpu_exec(CPUState *env1) |
540 | 537 | regs_to_env(); |
541 | 538 | #if defined(TARGET_I386) |
542 | 539 | env->eflags = env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK); |
543 | - cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP); | |
540 | + log_cpu_state(env, X86_DUMP_CCOP); | |
544 | 541 | env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); |
545 | 542 | #elif defined(TARGET_ARM) |
546 | - cpu_dump_state(env, logfile, fprintf, 0); | |
543 | + log_cpu_state(env, 0); | |
547 | 544 | #elif defined(TARGET_SPARC) |
548 | - cpu_dump_state(env, logfile, fprintf, 0); | |
545 | + log_cpu_state(env, 0); | |
549 | 546 | #elif defined(TARGET_PPC) |
550 | - cpu_dump_state(env, logfile, fprintf, 0); | |
547 | + log_cpu_state(env, 0); | |
551 | 548 | #elif defined(TARGET_M68K) |
552 | 549 | cpu_m68k_flush_flags(env, env->cc_op); |
553 | 550 | env->cc_op = CC_OP_FLAGS; |
554 | 551 | env->sr = (env->sr & 0xffe0) |
555 | 552 | | env->cc_dest | (env->cc_x << 4); |
556 | - cpu_dump_state(env, logfile, fprintf, 0); | |
553 | + log_cpu_state(env, 0); | |
557 | 554 | #elif defined(TARGET_MIPS) |
558 | - cpu_dump_state(env, logfile, fprintf, 0); | |
555 | + log_cpu_state(env, 0); | |
559 | 556 | #elif defined(TARGET_SH4) |
560 | - cpu_dump_state(env, logfile, fprintf, 0); | |
557 | + log_cpu_state(env, 0); | |
561 | 558 | #elif defined(TARGET_ALPHA) |
562 | - cpu_dump_state(env, logfile, fprintf, 0); | |
559 | + log_cpu_state(env, 0); | |
563 | 560 | #elif defined(TARGET_CRIS) |
564 | - cpu_dump_state(env, logfile, fprintf, 0); | |
561 | + log_cpu_state(env, 0); | |
565 | 562 | #else |
566 | 563 | #error unsupported target CPU |
567 | 564 | #endif |
... | ... | @@ -579,11 +576,9 @@ int cpu_exec(CPUState *env1) |
579 | 576 | tb_invalidated_flag = 0; |
580 | 577 | } |
581 | 578 | #ifdef DEBUG_EXEC |
582 | - if ((loglevel & CPU_LOG_EXEC)) { | |
583 | - fprintf(logfile, "Trace 0x%08lx [" TARGET_FMT_lx "] %s\n", | |
584 | - (long)tb->tc_ptr, tb->pc, | |
585 | - lookup_symbol(tb->pc)); | |
586 | - } | |
579 | + qemu_log_mask(CPU_LOG_EXEC, "Trace 0x%08lx [" TARGET_FMT_lx "] %s\n", | |
580 | + (long)tb->tc_ptr, tb->pc, | |
581 | + lookup_symbol(tb->pc)); | |
587 | 582 | #endif |
588 | 583 | /* see if we can patch the calling TB. When the TB |
589 | 584 | spans two pages, we cannot safely do a direct | ... | ... |
darwin-user/commpage.c
... | ... | @@ -35,9 +35,9 @@ |
35 | 35 | //#define DEBUG_COMMPAGE |
36 | 36 | |
37 | 37 | #ifdef DEBUG_COMMPAGE |
38 | -# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); printf(__VA_ARGS__); } while(0) | |
38 | +# define DPRINTF(...) do { qemu_log(__VA_ARGS__); printf(__VA_ARGS__); } while(0) | |
39 | 39 | #else |
40 | -# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); } while(0) | |
40 | +# define DPRINTF(...) do { qemu_log(__VA_ARGS__); } while(0) | |
41 | 41 | #endif |
42 | 42 | |
43 | 43 | /******************************************************************** | ... | ... |
darwin-user/machload.c
... | ... | @@ -39,9 +39,9 @@ |
39 | 39 | //#define DEBUG_MACHLOAD |
40 | 40 | |
41 | 41 | #ifdef DEBUG_MACHLOAD |
42 | -# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); printf(__VA_ARGS__); } while(0) | |
42 | +# define DPRINTF(...) do { qemu_log(__VA_ARGS__); printf(__VA_ARGS__); } while(0) | |
43 | 43 | #else |
44 | -# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); } while(0) | |
44 | +# define DPRINTF(...) do { qemu_log(__VA_ARGS__); } while(0) | |
45 | 45 | #endif |
46 | 46 | |
47 | 47 | # define check_mach_header(x) (x.magic == MH_CIGAM) | ... | ... |
darwin-user/main.c
... | ... | @@ -160,10 +160,8 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val) |
160 | 160 | do { \ |
161 | 161 | fprintf(stderr, fmt , ##args); \ |
162 | 162 | cpu_dump_state(env, stderr, fprintf, 0); \ |
163 | - if (loglevel != 0) { \ | |
164 | - fprintf(logfile, fmt , ##args); \ | |
165 | - cpu_dump_state(env, logfile, fprintf, 0); \ | |
166 | - } \ | |
163 | + qemu_log(fmt, ##args); \ | |
164 | + log_cpu_state(env, 0); \ | |
167 | 165 | } while (0) |
168 | 166 | |
169 | 167 | void cpu_loop(CPUPPCState *env) | ... | ... |
darwin-user/syscall.c
... | ... | @@ -69,7 +69,7 @@ |
69 | 69 | # define DEBUG_ENABLE_ALL() static int __DEBUG_qemu_user_force_enable = 1 |
70 | 70 | DEBUG_ENABLE_ALL(); |
71 | 71 | |
72 | -# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); \ | |
72 | +# define DPRINTF(...) do { qemu_log(__VA_ARGS__); \ | |
73 | 73 | if(__DEBUG_qemu_user_force_enable) fprintf(stderr, __VA_ARGS__); \ |
74 | 74 | } while(0) |
75 | 75 | #else |
... | ... | @@ -77,7 +77,7 @@ |
77 | 77 | # define DEBUG_BEGIN_ENABLE |
78 | 78 | # define DEBUG_END_ENABLE |
79 | 79 | |
80 | -# define DPRINTF(...) do { if(loglevel) fprintf(logfile, __VA_ARGS__); } while(0) | |
80 | +# define DPRINTF(...) do { qemu_log(__VA_ARGS__); } while(0) | |
81 | 81 | #endif |
82 | 82 | |
83 | 83 | enum { | ... | ... |
exec.c
... | ... | @@ -1004,12 +1004,10 @@ static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int le |
1004 | 1004 | int offset, b; |
1005 | 1005 | #if 0 |
1006 | 1006 | if (1) { |
1007 | - if (loglevel) { | |
1008 | - fprintf(logfile, "modifying code at 0x%x size=%d EIP=%x PC=%08x\n", | |
1009 | - cpu_single_env->mem_io_vaddr, len, | |
1010 | - cpu_single_env->eip, | |
1011 | - cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base); | |
1012 | - } | |
1007 | + qemu_log("modifying code at 0x%x size=%d EIP=%x PC=%08x\n", | |
1008 | + cpu_single_env->mem_io_vaddr, len, | |
1009 | + cpu_single_env->eip, | |
1010 | + cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base); | |
1013 | 1011 | } |
1014 | 1012 | #endif |
1015 | 1013 | p = page_find(start >> TARGET_PAGE_BITS); |
... | ... | @@ -1634,17 +1632,17 @@ void cpu_abort(CPUState *env, const char *fmt, ...) |
1634 | 1632 | #else |
1635 | 1633 | cpu_dump_state(env, stderr, fprintf, 0); |
1636 | 1634 | #endif |
1637 | - if (logfile) { | |
1638 | - fprintf(logfile, "qemu: fatal: "); | |
1639 | - vfprintf(logfile, fmt, ap2); | |
1640 | - fprintf(logfile, "\n"); | |
1635 | + if (qemu_log_enabled()) { | |
1636 | + qemu_log("qemu: fatal: "); | |
1637 | + qemu_log_vprintf(fmt, ap2); | |
1638 | + qemu_log("\n"); | |
1641 | 1639 | #ifdef TARGET_I386 |
1642 | - cpu_dump_state(env, logfile, fprintf, X86_DUMP_FPU | X86_DUMP_CCOP); | |
1640 | + log_cpu_state(env, X86_DUMP_FPU | X86_DUMP_CCOP); | |
1643 | 1641 | #else |
1644 | - cpu_dump_state(env, logfile, fprintf, 0); | |
1642 | + log_cpu_state(env, 0); | |
1645 | 1643 | #endif |
1646 | 1644 | fflush(logfile); |
1647 | - fclose(logfile); | |
1645 | + qemu_log_close(); | |
1648 | 1646 | } |
1649 | 1647 | va_end(ap2); |
1650 | 1648 | va_end(ap); | ... | ... |
hw/alpha_palcode.c
... | ... | @@ -1061,13 +1061,11 @@ void call_pal (CPUState *env, int palcode) |
1061 | 1061 | { |
1062 | 1062 | target_long ret; |
1063 | 1063 | |
1064 | - if (logfile != NULL) | |
1065 | - fprintf(logfile, "%s: palcode %02x\n", __func__, palcode); | |
1064 | + qemu_log("%s: palcode %02x\n", __func__, palcode); | |
1066 | 1065 | switch (palcode) { |
1067 | 1066 | case 0x83: |
1068 | 1067 | /* CALLSYS */ |
1069 | - if (logfile != NULL) | |
1070 | - fprintf(logfile, "CALLSYS n " TARGET_FMT_ld "\n", env->ir[0]); | |
1068 | + qemu_log("CALLSYS n " TARGET_FMT_ld "\n", env->ir[0]); | |
1071 | 1069 | ret = do_syscall(env, env->ir[IR_V0], env->ir[IR_A0], env->ir[IR_A1], |
1072 | 1070 | env->ir[IR_A2], env->ir[IR_A3], env->ir[IR_A4], |
1073 | 1071 | env->ir[IR_A5]); |
... | ... | @@ -1082,18 +1080,15 @@ void call_pal (CPUState *env, int palcode) |
1082 | 1080 | case 0x9E: |
1083 | 1081 | /* RDUNIQUE */ |
1084 | 1082 | env->ir[IR_V0] = env->unique; |
1085 | - if (logfile != NULL) | |
1086 | - fprintf(logfile, "RDUNIQUE: " TARGET_FMT_lx "\n", env->unique); | |
1083 | + qemu_log("RDUNIQUE: " TARGET_FMT_lx "\n", env->unique); | |
1087 | 1084 | break; |
1088 | 1085 | case 0x9F: |
1089 | 1086 | /* WRUNIQUE */ |
1090 | 1087 | env->unique = env->ir[IR_A0]; |
1091 | - if (logfile != NULL) | |
1092 | - fprintf(logfile, "WRUNIQUE: " TARGET_FMT_lx "\n", env->unique); | |
1088 | + qemu_log("WRUNIQUE: " TARGET_FMT_lx "\n", env->unique); | |
1093 | 1089 | break; |
1094 | 1090 | default: |
1095 | - if (logfile != NULL) | |
1096 | - fprintf(logfile, "%s: unhandled palcode %02x\n", | |
1091 | + qemu_log("%s: unhandled palcode %02x\n", | |
1097 | 1092 | __func__, palcode); |
1098 | 1093 | exit(1); |
1099 | 1094 | } | ... | ... |
hw/mips_timer.c
hw/ppc.c
... | ... | @@ -32,20 +32,14 @@ |
32 | 32 | //#define PPC_DEBUG_TB |
33 | 33 | |
34 | 34 | #ifdef PPC_DEBUG_IRQ |
35 | -# define LOG_IRQ(...) do { \ | |
36 | - if (loglevel & CPU_LOG_INT) \ | |
37 | - fprintf(logfile, ## __VA_ARGS__); \ | |
38 | - } while (0) | |
35 | +# define LOG_IRQ(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__) | |
39 | 36 | #else |
40 | 37 | # define LOG_IRQ(...) do { } while (0) |
41 | 38 | #endif |
42 | 39 | |
43 | 40 | |
44 | 41 | #ifdef PPC_DEBUG_TB |
45 | -# define LOG_TB(...) do { \ | |
46 | - if (loglevel) \ | |
47 | - fprintf(logfile, ## __VA_ARGS__); \ | |
48 | - } while (0) | |
42 | +# define LOG_TB(...) qemu_log(__VA_ARGS__) | |
49 | 43 | #else |
50 | 44 | # define LOG_TB(...) do { } while (0) |
51 | 45 | #endif | ... | ... |
hw/ppc4xx_devs.c
... | ... | @@ -33,10 +33,7 @@ |
33 | 33 | |
34 | 34 | |
35 | 35 | #ifdef DEBUG_UIC |
36 | -# define LOG_UIC(...) do { \ | |
37 | - if (loglevel & CPU_LOG_INT) \ | |
38 | - fprintf(logfile, ## __VA_ARGS__); \ | |
39 | - } while (0) | |
36 | +# define LOG_UIC(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__) | |
40 | 37 | #else |
41 | 38 | # define LOG_UIC(...) do { } while (0) |
42 | 39 | #endif | ... | ... |
hw/ppc_prep.c
... | ... | @@ -53,18 +53,13 @@ |
53 | 53 | #define PPC_IO_DPRINTF(fmt, args...) \ |
54 | 54 | do { \ |
55 | 55 | if (loglevel & CPU_LOG_IOPORT) { \ |
56 | - fprintf(logfile, "%s: " fmt, __func__ , ##args); \ | |
56 | + qemu_log("%s: " fmt, __func__ , ##args); \ | |
57 | 57 | } else { \ |
58 | 58 | printf("%s : " fmt, __func__ , ##args); \ |
59 | 59 | } \ |
60 | 60 | } while (0) |
61 | 61 | #elif defined (DEBUG_PPC_IO) |
62 | -#define PPC_IO_DPRINTF(fmt, args...) \ | |
63 | -do { \ | |
64 | - if (loglevel & CPU_LOG_IOPORT) { \ | |
65 | - fprintf(logfile, "%s: " fmt, __func__ , ##args); \ | |
66 | - } \ | |
67 | -} while (0) | |
62 | +#define PPC_IO_DPRINTF(fmt, args...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__) | |
68 | 63 | #else |
69 | 64 | #define PPC_IO_DPRINTF(fmt, args...) do { } while (0) |
70 | 65 | #endif | ... | ... |
kqemu.c
... | ... | @@ -49,15 +49,8 @@ |
49 | 49 | |
50 | 50 | |
51 | 51 | #ifdef DEBUG |
52 | -# define LOG_INT(...) do { \ | |
53 | - if (loglevel & CPU_LOG_INT) \ | |
54 | - fprintf(logfile, ## __VA_ARGS__); \ | |
55 | - } while (0) | |
56 | -# define LOG_INT_STATE(env) \ | |
57 | - do { \ | |
58 | - if (loglevel & CPU_LOG_INT) \ | |
59 | - cpu_dump_state(env, logfile, fprintf, 0); \ | |
60 | - } while (0) | |
52 | +# define LOG_INT(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__) | |
53 | +# define LOG_INT_STATE(env) log_cpu_state_mask(CPU_LOG_INT, (env), 0) | |
61 | 54 | #else |
62 | 55 | # define LOG_INT(...) do { } while (0) |
63 | 56 | # define LOG_INT_STATE(env) do { } while (0) | ... | ... |
linux-user/elfload.c
... | ... | @@ -1454,7 +1454,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs, |
1454 | 1454 | |
1455 | 1455 | free(elf_phdata); |
1456 | 1456 | |
1457 | - if (loglevel) | |
1457 | + if (qemu_log_enabled()) | |
1458 | 1458 | load_symbols(&elf_ex, bprm->fd); |
1459 | 1459 | |
1460 | 1460 | if (interpreter_type != INTERPRETER_AOUT) close(bprm->fd); | ... | ... |
linux-user/main.c
... | ... | @@ -1057,10 +1057,8 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val) |
1057 | 1057 | do { \ |
1058 | 1058 | fprintf(stderr, fmt , ##args); \ |
1059 | 1059 | cpu_dump_state(env, stderr, fprintf, 0); \ |
1060 | - if (loglevel != 0) { \ | |
1061 | - fprintf(logfile, fmt , ##args); \ | |
1062 | - cpu_dump_state(env, logfile, fprintf, 0); \ | |
1063 | - } \ | |
1060 | + qemu_log(fmt, ##args); \ | |
1061 | + log_cpu_state(env, 0); \ | |
1064 | 1062 | } while (0) |
1065 | 1063 | |
1066 | 1064 | void cpu_loop(CPUPPCState *env) |
... | ... | @@ -2396,21 +2394,19 @@ int main(int argc, char **argv, char **envp) |
2396 | 2394 | |
2397 | 2395 | free(target_environ); |
2398 | 2396 | |
2399 | - if (loglevel) { | |
2400 | - page_dump(logfile); | |
2401 | - | |
2402 | - fprintf(logfile, "start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk); | |
2403 | - fprintf(logfile, "end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code); | |
2404 | - fprintf(logfile, "start_code 0x" TARGET_ABI_FMT_lx "\n", | |
2405 | - info->start_code); | |
2406 | - fprintf(logfile, "start_data 0x" TARGET_ABI_FMT_lx "\n", | |
2407 | - info->start_data); | |
2408 | - fprintf(logfile, "end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data); | |
2409 | - fprintf(logfile, "start_stack 0x" TARGET_ABI_FMT_lx "\n", | |
2410 | - info->start_stack); | |
2411 | - fprintf(logfile, "brk 0x" TARGET_ABI_FMT_lx "\n", info->brk); | |
2412 | - fprintf(logfile, "entry 0x" TARGET_ABI_FMT_lx "\n", info->entry); | |
2413 | - } | |
2397 | + log_page_dump(); | |
2398 | + | |
2399 | + qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk); | |
2400 | + qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code); | |
2401 | + qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n", | |
2402 | + info->start_code); | |
2403 | + qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n", | |
2404 | + info->start_data); | |
2405 | + qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data); | |
2406 | + qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n", | |
2407 | + info->start_stack); | |
2408 | + qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk); | |
2409 | + qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry); | |
2414 | 2410 | |
2415 | 2411 | target_set_brk(info->brk); |
2416 | 2412 | syscall_init(); | ... | ... |
linux-user/vm86.c
target-alpha/translate.c
... | ... | @@ -39,10 +39,7 @@ |
39 | 39 | |
40 | 40 | |
41 | 41 | #ifdef ALPHA_DEBUG_DISAS |
42 | -# define LOG_DISAS(...) do { \ | |
43 | - if (logfile) \ | |
44 | - fprintf(logfile, ## __VA_ARGS__); \ | |
45 | - } while (0) | |
42 | +# define LOG_DISAS(...) qemu_log(__VA_ARGS__) | |
46 | 43 | #else |
47 | 44 | # define LOG_DISAS(...) do { } while (0) |
48 | 45 | #endif |
... | ... | @@ -2444,13 +2441,11 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, |
2444 | 2441 | tb->icount = num_insns; |
2445 | 2442 | } |
2446 | 2443 | #if defined ALPHA_DEBUG_DISAS |
2447 | - if (loglevel & CPU_LOG_TB_CPU) { | |
2448 | - cpu_dump_state(env, logfile, fprintf, 0); | |
2449 | - } | |
2444 | + log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0); | |
2450 | 2445 | if (loglevel & CPU_LOG_TB_IN_ASM) { |
2451 | - fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); | |
2452 | - target_disas(logfile, pc_start, ctx.pc - pc_start, 1); | |
2453 | - fprintf(logfile, "\n"); | |
2446 | + qemu_log("IN: %s\n", lookup_symbol(pc_start)); | |
2447 | + log_target_disas(pc_start, ctx.pc - pc_start, 1); | |
2448 | + qemu_log("\n"); | |
2454 | 2449 | } |
2455 | 2450 | #endif |
2456 | 2451 | } | ... | ... |
target-arm/translate.c
... | ... | @@ -8871,10 +8871,10 @@ done_generating: |
8871 | 8871 | |
8872 | 8872 | #ifdef DEBUG_DISAS |
8873 | 8873 | if (loglevel & CPU_LOG_TB_IN_ASM) { |
8874 | - fprintf(logfile, "----------------\n"); | |
8875 | - fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); | |
8876 | - target_disas(logfile, pc_start, dc->pc - pc_start, env->thumb); | |
8877 | - fprintf(logfile, "\n"); | |
8874 | + qemu_log("----------------\n"); | |
8875 | + qemu_log("IN: %s\n", lookup_symbol(pc_start)); | |
8876 | + log_target_disas(pc_start, dc->pc - pc_start, env->thumb); | |
8877 | + qemu_log("\n"); | |
8878 | 8878 | } |
8879 | 8879 | #endif |
8880 | 8880 | if (search_pc) { | ... | ... |
target-cris/helper.c
target-cris/mmu.c
target-cris/op_helper.c
... | ... | @@ -30,7 +30,7 @@ |
30 | 30 | |
31 | 31 | #ifdef CRIS_OP_HELPER_DEBUG |
32 | 32 | #define D(x) x |
33 | -#define D_LOG(...) fprintf(logfile, ## __VA_ARGS__) | |
33 | +#define D_LOG(...) qemu_log(__VA__ARGS__) | |
34 | 34 | #else |
35 | 35 | #define D(x) |
36 | 36 | #define D_LOG(...) do { } while (0) |
... | ... | @@ -117,7 +117,7 @@ void helper_spc_write(uint32_t new_spc) |
117 | 117 | |
118 | 118 | void helper_dump(uint32_t a0, uint32_t a1, uint32_t a2) |
119 | 119 | { |
120 | - (fprintf(logfile, "%s: a0=%x a1=%x\n", __func__, a0, a1)); | |
120 | + qemu_log("%s: a0=%x a1=%x\n", __func__, a0, a1); | |
121 | 121 | } |
122 | 122 | |
123 | 123 | /* Used by the tlb decoder. */ | ... | ... |
target-cris/translate.c
... | ... | @@ -44,10 +44,7 @@ |
44 | 44 | |
45 | 45 | #define DISAS_CRIS 0 |
46 | 46 | #if DISAS_CRIS |
47 | -# define LOG_DIS(...) do { \ | |
48 | - if (loglevel & CPU_LOG_TB_IN_ASM) \ | |
49 | - fprintf(logfile, ## __VA_ARGS__); \ | |
50 | - } while (0) | |
47 | +# define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) | |
51 | 48 | #else |
52 | 49 | # define LOG_DIS(...) do { } while (0) |
53 | 50 | #endif |
... | ... | @@ -131,7 +128,7 @@ typedef struct DisasContext { |
131 | 128 | static void gen_BUG(DisasContext *dc, const char *file, int line) |
132 | 129 | { |
133 | 130 | printf ("BUG: pc=%x %s %d\n", dc->pc, file, line); |
134 | - fprintf (logfile, "BUG: pc=%x %s %d\n", dc->pc, file, line); | |
131 | + qemu_log("BUG: pc=%x %s %d\n", dc->pc, file, line); | |
135 | 132 | cpu_abort(dc->env, "%s:%d\n", file, line); |
136 | 133 | } |
137 | 134 | |
... | ... | @@ -798,7 +795,7 @@ static void cris_alu_op_exec(DisasContext *dc, int op, |
798 | 795 | t_gen_subx_carry(dc, dst); |
799 | 796 | break; |
800 | 797 | default: |
801 | - fprintf (logfile, "illegal ALU op.\n"); | |
798 | + qemu_log("illegal ALU op.\n"); | |
802 | 799 | BUG(); |
803 | 800 | break; |
804 | 801 | } |
... | ... | @@ -3147,8 +3144,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, |
3147 | 3144 | int num_insns; |
3148 | 3145 | int max_insns; |
3149 | 3146 | |
3150 | - if (!logfile) | |
3151 | - logfile = stderr; | |
3147 | + qemu_log_try_set_file(stderr); | |
3152 | 3148 | |
3153 | 3149 | /* Odd PC indicates that branch is rexecuting due to exception in the |
3154 | 3150 | * delayslot, like in real hw. |
... | ... | @@ -3184,7 +3180,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, |
3184 | 3180 | dc->cpustate_changed = 0; |
3185 | 3181 | |
3186 | 3182 | if (loglevel & CPU_LOG_TB_IN_ASM) { |
3187 | - fprintf(logfile, | |
3183 | + qemu_log( | |
3188 | 3184 | "srch=%d pc=%x %x flg=%llx bt=%x ds=%u ccs=%x\n" |
3189 | 3185 | "pid=%x usp=%x\n" |
3190 | 3186 | "%x.%x.%x.%x\n" |
... | ... | @@ -3202,8 +3198,8 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, |
3202 | 3198 | env->regs[10], env->regs[11], |
3203 | 3199 | env->regs[12], env->regs[13], |
3204 | 3200 | env->regs[14], env->regs[15]); |
3205 | - fprintf(logfile, "--------------\n"); | |
3206 | - fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); | |
3201 | + qemu_log("--------------\n"); | |
3202 | + qemu_log("IN: %s\n", lookup_symbol(pc_start)); | |
3207 | 3203 | } |
3208 | 3204 | |
3209 | 3205 | next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; |
... | ... | @@ -3336,8 +3332,8 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, |
3336 | 3332 | #ifdef DEBUG_DISAS |
3337 | 3333 | #if !DISAS_CRIS |
3338 | 3334 | if (loglevel & CPU_LOG_TB_IN_ASM) { |
3339 | - target_disas(logfile, pc_start, dc->pc - pc_start, 0); | |
3340 | - fprintf(logfile, "\nisize=%d osize=%zd\n", | |
3335 | + log_target_disas(pc_start, dc->pc - pc_start, 0); | |
3336 | + qemu_log("\nisize=%d osize=%zd\n", | |
3341 | 3337 | dc->pc - pc_start, gen_opc_ptr - gen_opc_buf); |
3342 | 3338 | } |
3343 | 3339 | #endif | ... | ... |
target-i386/op_helper.c
... | ... | @@ -26,14 +26,9 @@ |
26 | 26 | |
27 | 27 | |
28 | 28 | #ifdef DEBUG_PCALL |
29 | -# define LOG_PCALL(...) do { \ | |
30 | - if (loglevel & CPU_LOG_PCALL) \ | |
31 | - fprintf(logfile, ## __VA_ARGS__); \ | |
32 | - } while (0) | |
33 | -# define LOG_PCALL_STATE(env) do { \ | |
34 | - if (loglevel & CPU_LOG_PCALL) \ | |
35 | - cpu_dump_state((env), logfile, fprintf, X86_DUMP_CCOP); \ | |
36 | - } while (0) | |
29 | +# define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__) | |
30 | +# define LOG_PCALL_STATE(env) \ | |
31 | + log_cpu_state_mask(CPU_LOG_PCALL, (env), X86_DUMP_CCOP) | |
37 | 32 | #else |
38 | 33 | # define LOG_PCALL(...) do { } while (0) |
39 | 34 | # define LOG_PCALL_STATE(env) do { } while (0) |
... | ... | @@ -43,8 +38,7 @@ |
43 | 38 | #if 0 |
44 | 39 | #define raise_exception_err(a, b)\ |
45 | 40 | do {\ |
46 | - if (logfile)\ | |
47 | - fprintf(logfile, "raise_exception line=%d\n", __LINE__);\ | |
41 | + qemu_log("raise_exception line=%d\n", __LINE__);\ | |
48 | 42 | (raise_exception_err)(a, b);\ |
49 | 43 | } while (0) |
50 | 44 | #endif |
... | ... | @@ -1215,29 +1209,29 @@ void do_interrupt(int intno, int is_int, int error_code, |
1215 | 1209 | if (loglevel & CPU_LOG_INT) { |
1216 | 1210 | if ((env->cr[0] & CR0_PE_MASK)) { |
1217 | 1211 | static int count; |
1218 | - fprintf(logfile, "%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx, | |
1212 | + qemu_log("%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx, | |
1219 | 1213 | count, intno, error_code, is_int, |
1220 | 1214 | env->hflags & HF_CPL_MASK, |
1221 | 1215 | env->segs[R_CS].selector, EIP, |
1222 | 1216 | (int)env->segs[R_CS].base + EIP, |
1223 | 1217 | env->segs[R_SS].selector, ESP); |
1224 | 1218 | if (intno == 0x0e) { |
1225 | - fprintf(logfile, " CR2=" TARGET_FMT_lx, env->cr[2]); | |
1219 | + qemu_log(" CR2=" TARGET_FMT_lx, env->cr[2]); | |
1226 | 1220 | } else { |
1227 | - fprintf(logfile, " EAX=" TARGET_FMT_lx, EAX); | |
1221 | + qemu_log(" EAX=" TARGET_FMT_lx, EAX); | |
1228 | 1222 | } |
1229 | - fprintf(logfile, "\n"); | |
1230 | - cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP); | |
1223 | + qemu_log("\n"); | |
1224 | + log_cpu_state(env, X86_DUMP_CCOP); | |
1231 | 1225 | #if 0 |
1232 | 1226 | { |
1233 | 1227 | int i; |
1234 | 1228 | uint8_t *ptr; |
1235 | - fprintf(logfile, " code="); | |
1229 | + qemu_log(" code="); | |
1236 | 1230 | ptr = env->segs[R_CS].base + env->eip; |
1237 | 1231 | for(i = 0; i < 16; i++) { |
1238 | - fprintf(logfile, " %02x", ldub(ptr + i)); | |
1232 | + qemu_log(" %02x", ldub(ptr + i)); | |
1239 | 1233 | } |
1240 | - fprintf(logfile, "\n"); | |
1234 | + qemu_log("\n"); | |
1241 | 1235 | } |
1242 | 1236 | #endif |
1243 | 1237 | count++; |
... | ... | @@ -1270,8 +1264,7 @@ static int check_exception(int intno, int *error_code) |
1270 | 1264 | int second_contributory = intno == 0 || |
1271 | 1265 | (intno >= 10 && intno <= 13); |
1272 | 1266 | |
1273 | - if (loglevel & CPU_LOG_INT) | |
1274 | - fprintf(logfile, "check_exception old: 0x%x new 0x%x\n", | |
1267 | + qemu_log_mask(CPU_LOG_INT, "check_exception old: 0x%x new 0x%x\n", | |
1275 | 1268 | env->old_exception, intno); |
1276 | 1269 | |
1277 | 1270 | if (env->old_exception == EXCP08_DBLE) |
... | ... | @@ -1352,10 +1345,8 @@ void do_smm_enter(void) |
1352 | 1345 | SegmentCache *dt; |
1353 | 1346 | int i, offset; |
1354 | 1347 | |
1355 | - if (loglevel & CPU_LOG_INT) { | |
1356 | - fprintf(logfile, "SMM: enter\n"); | |
1357 | - cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP); | |
1358 | - } | |
1348 | + qemu_log_mask(CPU_LOG_INT, "SMM: enter\n"); | |
1349 | + log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP); | |
1359 | 1350 | |
1360 | 1351 | env->hflags |= HF_SMM_MASK; |
1361 | 1352 | cpu_smm_update(env); |
... | ... | @@ -1595,10 +1586,8 @@ void helper_rsm(void) |
1595 | 1586 | env->hflags &= ~HF_SMM_MASK; |
1596 | 1587 | cpu_smm_update(env); |
1597 | 1588 | |
1598 | - if (loglevel & CPU_LOG_INT) { | |
1599 | - fprintf(logfile, "SMM: after RSM\n"); | |
1600 | - cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP); | |
1601 | - } | |
1589 | + qemu_log_mask(CPU_LOG_INT, "SMM: after RSM\n"); | |
1590 | + log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP); | |
1602 | 1591 | } |
1603 | 1592 | |
1604 | 1593 | #endif /* !CONFIG_USER_ONLY */ |
... | ... | @@ -2156,7 +2145,7 @@ void helper_load_seg(int seg_reg, int selector) |
2156 | 2145 | get_seg_limit(e1, e2), |
2157 | 2146 | e2); |
2158 | 2147 | #if 0 |
2159 | - fprintf(logfile, "load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx flags=%08x\n", | |
2148 | + qemu_log("load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx flags=%08x\n", | |
2160 | 2149 | selector, (unsigned long)sc->base, sc->limit, sc->flags); |
2161 | 2150 | #endif |
2162 | 2151 | } |
... | ... | @@ -4774,8 +4763,7 @@ void helper_vmrun(int aflag, int next_eip_addend) |
4774 | 4763 | else |
4775 | 4764 | addr = (uint32_t)EAX; |
4776 | 4765 | |
4777 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
4778 | - fprintf(logfile,"vmrun! " TARGET_FMT_lx "\n", addr); | |
4766 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmrun! " TARGET_FMT_lx "\n", addr); | |
4779 | 4767 | |
4780 | 4768 | env->vm_vmcb = addr; |
4781 | 4769 | |
... | ... | @@ -4895,8 +4883,7 @@ void helper_vmrun(int aflag, int next_eip_addend) |
4895 | 4883 | uint32_t event_inj_err = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj_err)); |
4896 | 4884 | stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj), event_inj & ~SVM_EVTINJ_VALID); |
4897 | 4885 | |
4898 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
4899 | - fprintf(logfile, "Injecting(%#hx): ", valid_err); | |
4886 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "Injecting(%#hx): ", valid_err); | |
4900 | 4887 | /* FIXME: need to implement valid_err */ |
4901 | 4888 | switch (event_inj & SVM_EVTINJ_TYPE_MASK) { |
4902 | 4889 | case SVM_EVTINJ_TYPE_INTR: |
... | ... | @@ -4904,8 +4891,7 @@ void helper_vmrun(int aflag, int next_eip_addend) |
4904 | 4891 | env->error_code = event_inj_err; |
4905 | 4892 | env->exception_is_int = 0; |
4906 | 4893 | env->exception_next_eip = -1; |
4907 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
4908 | - fprintf(logfile, "INTR"); | |
4894 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "INTR"); | |
4909 | 4895 | /* XXX: is it always correct ? */ |
4910 | 4896 | do_interrupt(vector, 0, 0, 0, 1); |
4911 | 4897 | break; |
... | ... | @@ -4914,8 +4900,7 @@ void helper_vmrun(int aflag, int next_eip_addend) |
4914 | 4900 | env->error_code = event_inj_err; |
4915 | 4901 | env->exception_is_int = 0; |
4916 | 4902 | env->exception_next_eip = EIP; |
4917 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
4918 | - fprintf(logfile, "NMI"); | |
4903 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "NMI"); | |
4919 | 4904 | cpu_loop_exit(); |
4920 | 4905 | break; |
4921 | 4906 | case SVM_EVTINJ_TYPE_EXEPT: |
... | ... | @@ -4923,8 +4908,7 @@ void helper_vmrun(int aflag, int next_eip_addend) |
4923 | 4908 | env->error_code = event_inj_err; |
4924 | 4909 | env->exception_is_int = 0; |
4925 | 4910 | env->exception_next_eip = -1; |
4926 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
4927 | - fprintf(logfile, "EXEPT"); | |
4911 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "EXEPT"); | |
4928 | 4912 | cpu_loop_exit(); |
4929 | 4913 | break; |
4930 | 4914 | case SVM_EVTINJ_TYPE_SOFT: |
... | ... | @@ -4932,13 +4916,11 @@ void helper_vmrun(int aflag, int next_eip_addend) |
4932 | 4916 | env->error_code = event_inj_err; |
4933 | 4917 | env->exception_is_int = 1; |
4934 | 4918 | env->exception_next_eip = EIP; |
4935 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
4936 | - fprintf(logfile, "SOFT"); | |
4919 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "SOFT"); | |
4937 | 4920 | cpu_loop_exit(); |
4938 | 4921 | break; |
4939 | 4922 | } |
4940 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
4941 | - fprintf(logfile, " %#x %#x\n", env->exception_index, env->error_code); | |
4923 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, " %#x %#x\n", env->exception_index, env->error_code); | |
4942 | 4924 | } |
4943 | 4925 | } |
4944 | 4926 | |
... | ... | @@ -4958,8 +4940,7 @@ void helper_vmload(int aflag) |
4958 | 4940 | else |
4959 | 4941 | addr = (uint32_t)EAX; |
4960 | 4942 | |
4961 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
4962 | - fprintf(logfile,"vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n", | |
4943 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n", | |
4963 | 4944 | addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)), |
4964 | 4945 | env->segs[R_FS].base); |
4965 | 4946 | |
... | ... | @@ -4994,8 +4975,7 @@ void helper_vmsave(int aflag) |
4994 | 4975 | else |
4995 | 4976 | addr = (uint32_t)EAX; |
4996 | 4977 | |
4997 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
4998 | - fprintf(logfile,"vmsave! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n", | |
4978 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmsave! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n", | |
4999 | 4979 | addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)), |
5000 | 4980 | env->segs[R_FS].base); |
5001 | 4981 | |
... | ... | @@ -5143,8 +5123,7 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) |
5143 | 5123 | { |
5144 | 5124 | uint32_t int_ctl; |
5145 | 5125 | |
5146 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
5147 | - fprintf(logfile,"vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n", | |
5126 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n", | |
5148 | 5127 | exit_code, exit_info_1, |
5149 | 5128 | ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2)), |
5150 | 5129 | EIP); | ... | ... |
target-i386/translate.c
... | ... | @@ -7675,21 +7675,19 @@ static inline void gen_intermediate_code_internal(CPUState *env, |
7675 | 7675 | } |
7676 | 7676 | |
7677 | 7677 | #ifdef DEBUG_DISAS |
7678 | - if (loglevel & CPU_LOG_TB_CPU) { | |
7679 | - cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP); | |
7680 | - } | |
7678 | + log_cpu_state_mask(CPU_LOG_TB_CPU, env, X86_DUMP_CCOP); | |
7681 | 7679 | if (loglevel & CPU_LOG_TB_IN_ASM) { |
7682 | 7680 | int disas_flags; |
7683 | - fprintf(logfile, "----------------\n"); | |
7684 | - fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); | |
7681 | + qemu_log("----------------\n"); | |
7682 | + qemu_log("IN: %s\n", lookup_symbol(pc_start)); | |
7685 | 7683 | #ifdef TARGET_X86_64 |
7686 | 7684 | if (dc->code64) |
7687 | 7685 | disas_flags = 2; |
7688 | 7686 | else |
7689 | 7687 | #endif |
7690 | 7688 | disas_flags = !dc->code32; |
7691 | - target_disas(logfile, pc_start, pc_ptr - pc_start, disas_flags); | |
7692 | - fprintf(logfile, "\n"); | |
7689 | + log_target_disas(pc_start, pc_ptr - pc_start, disas_flags); | |
7690 | + qemu_log("\n"); | |
7693 | 7691 | } |
7694 | 7692 | #endif |
7695 | 7693 | |
... | ... | @@ -7716,13 +7714,13 @@ void gen_pc_load(CPUState *env, TranslationBlock *tb, |
7716 | 7714 | #ifdef DEBUG_DISAS |
7717 | 7715 | if (loglevel & CPU_LOG_TB_OP) { |
7718 | 7716 | int i; |
7719 | - fprintf(logfile, "RESTORE:\n"); | |
7717 | + qemu_log("RESTORE:\n"); | |
7720 | 7718 | for(i = 0;i <= pc_pos; i++) { |
7721 | 7719 | if (gen_opc_instr_start[i]) { |
7722 | - fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]); | |
7720 | + qemu_log("0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]); | |
7723 | 7721 | } |
7724 | 7722 | } |
7725 | - fprintf(logfile, "spc=0x%08lx pc_pos=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n", | |
7723 | + qemu_log("spc=0x%08lx pc_pos=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n", | |
7726 | 7724 | searched_pc, pc_pos, gen_opc_pc[pc_pos] - tb->cs_base, |
7727 | 7725 | (uint32_t)tb->cs_base); |
7728 | 7726 | } | ... | ... |
target-m68k/translate.c
... | ... | @@ -165,7 +165,7 @@ typedef void (*disas_proc)(DisasContext *, uint16_t); |
165 | 165 | #define DISAS_INSN(name) \ |
166 | 166 | static void real_disas_##name (DisasContext *s, uint16_t insn); \ |
167 | 167 | static void disas_##name (DisasContext *s, uint16_t insn) { \ |
168 | - if (logfile) fprintf(logfile, "Dispatch " #name "\n"); \ | |
168 | + qemu_log("Dispatch " #name "\n"); \ | |
169 | 169 | real_disas_##name(s, insn); } \ |
170 | 170 | static void real_disas_##name (DisasContext *s, uint16_t insn) |
171 | 171 | #else |
... | ... | @@ -3064,10 +3064,10 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, |
3064 | 3064 | |
3065 | 3065 | #ifdef DEBUG_DISAS |
3066 | 3066 | if (loglevel & CPU_LOG_TB_IN_ASM) { |
3067 | - fprintf(logfile, "----------------\n"); | |
3068 | - fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); | |
3069 | - target_disas(logfile, pc_start, dc->pc - pc_start, 0); | |
3070 | - fprintf(logfile, "\n"); | |
3067 | + qemu_log("----------------\n"); | |
3068 | + qemu_log("IN: %s\n", lookup_symbol(pc_start)); | |
3069 | + log_target_disas(pc_start, dc->pc - pc_start, 0); | |
3070 | + qemu_log("\n"); | |
3071 | 3071 | } |
3072 | 3072 | #endif |
3073 | 3073 | if (search_pc) { | ... | ... |
target-mips/helper.c
... | ... | @@ -117,10 +117,7 @@ static int get_physical_address (CPUState *env, target_ulong *physical, |
117 | 117 | int ret = TLBRET_MATCH; |
118 | 118 | |
119 | 119 | #if 0 |
120 | - if (logfile) { | |
121 | - fprintf(logfile, "user mode %d h %08x\n", | |
122 | - user_mode, env->hflags); | |
123 | - } | |
120 | + qemu_log("user mode %d h %08x\n", user_mode, env->hflags); | |
124 | 121 | #endif |
125 | 122 | |
126 | 123 | if (address <= (int32_t)0x7FFFFFFFUL) { |
... | ... | @@ -198,9 +195,8 @@ static int get_physical_address (CPUState *env, target_ulong *physical, |
198 | 195 | } |
199 | 196 | } |
200 | 197 | #if 0 |
201 | - if (logfile) { | |
202 | - fprintf(logfile, TARGET_FMT_lx " %d %d => " TARGET_FMT_lx " %d (%d)\n", | |
203 | - address, rw, access_type, *physical, *prot, ret); | |
198 | + qemu_log(TARGET_FMT_lx " %d %d => " TARGET_FMT_lx " %d (%d)\n", | |
199 | + address, rw, access_type, *physical, *prot, ret); | |
204 | 200 | } |
205 | 201 | #endif |
206 | 202 | |
... | ... | @@ -233,13 +229,11 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
233 | 229 | int access_type; |
234 | 230 | int ret = 0; |
235 | 231 | |
236 | - if (logfile) { | |
237 | 232 | #if 0 |
238 | - cpu_dump_state(env, logfile, fprintf, 0); | |
233 | + log_cpu_state(env, 0); | |
239 | 234 | #endif |
240 | - fprintf(logfile, "%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d smmu %d\n", | |
241 | - __func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu); | |
242 | - } | |
235 | + qemu_log("%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d smmu %d\n", | |
236 | + __func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu); | |
243 | 237 | |
244 | 238 | rw &= 1; |
245 | 239 | |
... | ... | @@ -252,10 +246,8 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, |
252 | 246 | #else |
253 | 247 | ret = get_physical_address(env, &physical, &prot, |
254 | 248 | address, rw, access_type); |
255 | - if (logfile) { | |
256 | - fprintf(logfile, "%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_lx " prot %d\n", | |
257 | - __func__, address, ret, physical, prot); | |
258 | - } | |
249 | + qemu_log("%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_lx " prot %d\n", | |
250 | + __func__, address, ret, physical, prot); | |
259 | 251 | if (ret == TLBRET_MATCH) { |
260 | 252 | ret = tlb_set_page(env, address & TARGET_PAGE_MASK, |
261 | 253 | physical & TARGET_PAGE_MASK, prot, |
... | ... | @@ -357,14 +349,14 @@ void do_interrupt (CPUState *env) |
357 | 349 | int cause = -1; |
358 | 350 | const char *name; |
359 | 351 | |
360 | - if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) { | |
352 | + if (qemu_log_enabled() && env->exception_index != EXCP_EXT_INTERRUPT) { | |
361 | 353 | if (env->exception_index < 0 || env->exception_index > EXCP_LAST) |
362 | 354 | name = "unknown"; |
363 | 355 | else |
364 | 356 | name = excp_names[env->exception_index]; |
365 | 357 | |
366 | - fprintf(logfile, "%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n", | |
367 | - __func__, env->active_tc.PC, env->CP0_EPC, name); | |
358 | + qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n", | |
359 | + __func__, env->active_tc.PC, env->CP0_EPC, name); | |
368 | 360 | } |
369 | 361 | if (env->exception_index == EXCP_EXT_INTERRUPT && |
370 | 362 | (env->hflags & MIPS_HFLAG_DM)) |
... | ... | @@ -558,15 +550,12 @@ void do_interrupt (CPUState *env) |
558 | 550 | env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC); |
559 | 551 | break; |
560 | 552 | default: |
561 | - if (logfile) { | |
562 | - fprintf(logfile, "Invalid MIPS exception %d. Exiting\n", | |
563 | - env->exception_index); | |
564 | - } | |
553 | + qemu_log("Invalid MIPS exception %d. Exiting\n", env->exception_index); | |
565 | 554 | printf("Invalid MIPS exception %d. Exiting\n", env->exception_index); |
566 | 555 | exit(1); |
567 | 556 | } |
568 | - if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) { | |
569 | - fprintf(logfile, "%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n" | |
557 | + if (qemu_log_enabled() && env->exception_index != EXCP_EXT_INTERRUPT) { | |
558 | + qemu_log("%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n" | |
570 | 559 | " S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n", |
571 | 560 | __func__, env->active_tc.PC, env->CP0_EPC, cause, |
572 | 561 | env->CP0_Status, env->CP0_Cause, env->CP0_BadVAddr, | ... | ... |
target-mips/op_helper.c
... | ... | @@ -29,8 +29,8 @@ |
29 | 29 | void do_raise_exception_err (uint32_t exception, int error_code) |
30 | 30 | { |
31 | 31 | #if 1 |
32 | - if (logfile && exception < 0x100) | |
33 | - fprintf(logfile, "%s: %d %d\n", __func__, exception, error_code); | |
32 | + if (exception < 0x100) | |
33 | + qemu_log("%s: %d %d\n", __func__, exception, error_code); | |
34 | 34 | #endif |
35 | 35 | env->exception_index = exception; |
36 | 36 | env->error_code = error_code; |
... | ... | @@ -1342,21 +1342,21 @@ void do_mtc0_datahi (target_ulong t0) |
1342 | 1342 | |
1343 | 1343 | void do_mtc0_status_debug(uint32_t old, uint32_t val) |
1344 | 1344 | { |
1345 | - fprintf(logfile, "Status %08x (%08x) => %08x (%08x) Cause %08x", | |
1345 | + qemu_log("Status %08x (%08x) => %08x (%08x) Cause %08x", | |
1346 | 1346 | old, old & env->CP0_Cause & CP0Ca_IP_mask, |
1347 | 1347 | val, val & env->CP0_Cause & CP0Ca_IP_mask, |
1348 | 1348 | env->CP0_Cause); |
1349 | 1349 | switch (env->hflags & MIPS_HFLAG_KSU) { |
1350 | - case MIPS_HFLAG_UM: fputs(", UM\n", logfile); break; | |
1351 | - case MIPS_HFLAG_SM: fputs(", SM\n", logfile); break; | |
1352 | - case MIPS_HFLAG_KM: fputs("\n", logfile); break; | |
1350 | + case MIPS_HFLAG_UM: qemu_log(", UM\n"); break; | |
1351 | + case MIPS_HFLAG_SM: qemu_log(", SM\n"); break; | |
1352 | + case MIPS_HFLAG_KM: qemu_log("\n"); break; | |
1353 | 1353 | default: cpu_abort(env, "Invalid MMU mode!\n"); break; |
1354 | 1354 | } |
1355 | 1355 | } |
1356 | 1356 | |
1357 | 1357 | void do_mtc0_status_irqraise_debug(void) |
1358 | 1358 | { |
1359 | - fprintf(logfile, "Raise pending IRQs\n"); | |
1359 | + qemu_log("Raise pending IRQs\n"); | |
1360 | 1360 | } |
1361 | 1361 | |
1362 | 1362 | /* MIPS MT functions */ |
... | ... | @@ -1705,35 +1705,38 @@ target_ulong do_ei (void) |
1705 | 1705 | |
1706 | 1706 | static void debug_pre_eret (void) |
1707 | 1707 | { |
1708 | - fprintf(logfile, "ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, | |
1709 | - env->active_tc.PC, env->CP0_EPC); | |
1710 | - if (env->CP0_Status & (1 << CP0St_ERL)) | |
1711 | - fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC); | |
1712 | - if (env->hflags & MIPS_HFLAG_DM) | |
1713 | - fprintf(logfile, " DEPC " TARGET_FMT_lx, env->CP0_DEPC); | |
1714 | - fputs("\n", logfile); | |
1708 | + if (loglevel & CPU_LOG_EXEC) { | |
1709 | + qemu_log("ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, | |
1710 | + env->active_tc.PC, env->CP0_EPC); | |
1711 | + if (env->CP0_Status & (1 << CP0St_ERL)) | |
1712 | + qemu_log(" ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC); | |
1713 | + if (env->hflags & MIPS_HFLAG_DM) | |
1714 | + qemu_log(" DEPC " TARGET_FMT_lx, env->CP0_DEPC); | |
1715 | + qemu_log("\n"); | |
1716 | + } | |
1715 | 1717 | } |
1716 | 1718 | |
1717 | 1719 | static void debug_post_eret (void) |
1718 | 1720 | { |
1719 | - fprintf(logfile, " => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, | |
1720 | - env->active_tc.PC, env->CP0_EPC); | |
1721 | - if (env->CP0_Status & (1 << CP0St_ERL)) | |
1722 | - fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC); | |
1723 | - if (env->hflags & MIPS_HFLAG_DM) | |
1724 | - fprintf(logfile, " DEPC " TARGET_FMT_lx, env->CP0_DEPC); | |
1725 | - switch (env->hflags & MIPS_HFLAG_KSU) { | |
1726 | - case MIPS_HFLAG_UM: fputs(", UM\n", logfile); break; | |
1727 | - case MIPS_HFLAG_SM: fputs(", SM\n", logfile); break; | |
1728 | - case MIPS_HFLAG_KM: fputs("\n", logfile); break; | |
1729 | - default: cpu_abort(env, "Invalid MMU mode!\n"); break; | |
1721 | + if (loglevel & CPU_LOG_EXEC) { | |
1722 | + qemu_log(" => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, | |
1723 | + env->active_tc.PC, env->CP0_EPC); | |
1724 | + if (env->CP0_Status & (1 << CP0St_ERL)) | |
1725 | + qemu_log(" ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC); | |
1726 | + if (env->hflags & MIPS_HFLAG_DM) | |
1727 | + qemu_log(" DEPC " TARGET_FMT_lx, env->CP0_DEPC); | |
1728 | + switch (env->hflags & MIPS_HFLAG_KSU) { | |
1729 | + case MIPS_HFLAG_UM: qemu_log(", UM\n"); break; | |
1730 | + case MIPS_HFLAG_SM: qemu_log(", SM\n"); break; | |
1731 | + case MIPS_HFLAG_KM: qemu_log("\n"); break; | |
1732 | + default: cpu_abort(env, "Invalid MMU mode!\n"); break; | |
1733 | + } | |
1730 | 1734 | } |
1731 | 1735 | } |
1732 | 1736 | |
1733 | 1737 | void do_eret (void) |
1734 | 1738 | { |
1735 | - if (loglevel & CPU_LOG_EXEC) | |
1736 | - debug_pre_eret(); | |
1739 | + debug_pre_eret(); | |
1737 | 1740 | if (env->CP0_Status & (1 << CP0St_ERL)) { |
1738 | 1741 | env->active_tc.PC = env->CP0_ErrorEPC; |
1739 | 1742 | env->CP0_Status &= ~(1 << CP0St_ERL); |
... | ... | @@ -1742,20 +1745,17 @@ void do_eret (void) |
1742 | 1745 | env->CP0_Status &= ~(1 << CP0St_EXL); |
1743 | 1746 | } |
1744 | 1747 | compute_hflags(env); |
1745 | - if (loglevel & CPU_LOG_EXEC) | |
1746 | - debug_post_eret(); | |
1748 | + debug_post_eret(); | |
1747 | 1749 | env->CP0_LLAddr = 1; |
1748 | 1750 | } |
1749 | 1751 | |
1750 | 1752 | void do_deret (void) |
1751 | 1753 | { |
1752 | - if (loglevel & CPU_LOG_EXEC) | |
1753 | - debug_pre_eret(); | |
1754 | + debug_pre_eret(); | |
1754 | 1755 | env->active_tc.PC = env->CP0_DEPC; |
1755 | 1756 | env->hflags &= MIPS_HFLAG_DM; |
1756 | 1757 | compute_hflags(env); |
1757 | - if (loglevel & CPU_LOG_EXEC) | |
1758 | - debug_post_eret(); | |
1758 | + debug_post_eret(); | |
1759 | 1759 | env->CP0_LLAddr = 1; |
1760 | 1760 | } |
1761 | 1761 | #endif /* !CONFIG_USER_ONLY */ | ... | ... |
target-mips/translate.c
... | ... | @@ -514,18 +514,11 @@ static const char *fregnames_h[] = |
514 | 514 | "h24", "h25", "h26", "h27", "h28", "h29", "h30", "h31", }; |
515 | 515 | |
516 | 516 | #ifdef MIPS_DEBUG_DISAS |
517 | -#define MIPS_DEBUG(fmt, args...) \ | |
518 | -do { \ | |
519 | - if (loglevel & CPU_LOG_TB_IN_ASM) { \ | |
520 | - fprintf(logfile, TARGET_FMT_lx ": %08x " fmt "\n", \ | |
521 | - ctx->pc, ctx->opcode , ##args); \ | |
522 | - } \ | |
523 | -} while (0) | |
524 | -#define LOG_DISAS(...) \ | |
525 | - do { \ | |
526 | - if (loglevel & CPU_LOG_TB_IN_ASM) \ | |
527 | - fprintf(logfile, ## __VA_ARGS__); \ | |
528 | - } while (0) | |
517 | +#define MIPS_DEBUG(fmt, args...) \ | |
518 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, \ | |
519 | + TARGET_FMT_lx ": %08x " fmt "\n", \ | |
520 | + ctx->pc, ctx->opcode , ##args) | |
521 | +#define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) | |
529 | 522 | #else |
530 | 523 | #define MIPS_DEBUG(fmt, args...) do { } while(0) |
531 | 524 | #define LOG_DISAS(...) do { } while (0) |
... | ... | @@ -8180,8 +8173,8 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, |
8180 | 8173 | int num_insns; |
8181 | 8174 | int max_insns; |
8182 | 8175 | |
8183 | - if (search_pc && loglevel) | |
8184 | - fprintf (logfile, "search pc %d\n", search_pc); | |
8176 | + if (search_pc) | |
8177 | + qemu_log("search pc %d\n", search_pc); | |
8185 | 8178 | |
8186 | 8179 | pc_start = tb->pc; |
8187 | 8180 | /* Leave some spare opc slots for branch handling. */ |
... | ... | @@ -8203,11 +8196,9 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, |
8203 | 8196 | if (max_insns == 0) |
8204 | 8197 | max_insns = CF_COUNT_MASK; |
8205 | 8198 | #ifdef DEBUG_DISAS |
8206 | - if (loglevel & CPU_LOG_TB_CPU) { | |
8207 | - fprintf(logfile, "------------------------------------------------\n"); | |
8208 | - /* FIXME: This may print out stale hflags from env... */ | |
8209 | - cpu_dump_state(env, logfile, fprintf, 0); | |
8210 | - } | |
8199 | + qemu_log_mask(CPU_LOG_TB_CPU, "------------------------------------------------\n"); | |
8200 | + /* FIXME: This may print out stale hflags from env... */ | |
8201 | + log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0); | |
8211 | 8202 | #endif |
8212 | 8203 | LOG_DISAS("\ntb %p idx %d hflags %04x\n", tb, ctx.mem_idx, ctx.hflags); |
8213 | 8204 | gen_icount_start(); |
... | ... | @@ -8299,13 +8290,11 @@ done_generating: |
8299 | 8290 | #ifdef DEBUG_DISAS |
8300 | 8291 | LOG_DISAS("\n"); |
8301 | 8292 | if (loglevel & CPU_LOG_TB_IN_ASM) { |
8302 | - fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); | |
8303 | - target_disas(logfile, pc_start, ctx.pc - pc_start, 0); | |
8304 | - fprintf(logfile, "\n"); | |
8305 | - } | |
8306 | - if (loglevel & CPU_LOG_TB_CPU) { | |
8307 | - fprintf(logfile, "---------------- %d %08x\n", ctx.bstate, ctx.hflags); | |
8293 | + qemu_log("IN: %s\n", lookup_symbol(pc_start)); | |
8294 | + log_target_disas(pc_start, ctx.pc - pc_start, 0); | |
8295 | + qemu_log("\n"); | |
8308 | 8296 | } |
8297 | + qemu_log_mask(CPU_LOG_TB_CPU, "---------------- %d %08x\n", ctx.bstate, ctx.hflags); | |
8309 | 8298 | #endif |
8310 | 8299 | } |
8311 | 8300 | ... | ... |
target-ppc/helper.c
... | ... | @@ -40,14 +40,8 @@ |
40 | 40 | //#define FLUSH_ALL_TLBS |
41 | 41 | |
42 | 42 | #ifdef DEBUG_MMU |
43 | -# define LOG_MMU(...) do { \ | |
44 | - if (loglevel) \ | |
45 | - fprintf(logfile, ## __VA_ARGS__); \ | |
46 | - } while (0) | |
47 | -# define LOG_MMU_STATE(env) do { \ | |
48 | - if (loglevel) \ | |
49 | - cpu_dump_state(env, logfile, fprintf, 0); \ | |
50 | - } while (0) | |
43 | +# define LOG_MMU(...) qemu_log(__VA_ARGS__) | |
44 | +# define LOG_MMU_STATE(env) log_cpu_state((env), 0) | |
51 | 45 | #else |
52 | 46 | # define LOG_MMU(...) do { } while (0) |
53 | 47 | # define LOG_MMU_STATE(...) do { } while (0) |
... | ... | @@ -55,37 +49,25 @@ |
55 | 49 | |
56 | 50 | |
57 | 51 | #ifdef DEBUG_SOFTWARE_TLB |
58 | -# define LOG_SWTLB(...) do { \ | |
59 | - if (loglevel) \ | |
60 | - fprintf(logfile, ## __VA_ARGS__); \ | |
61 | - } while (0) | |
52 | +# define LOG_SWTLB(...) qemu_log(__VA_ARGS__) | |
62 | 53 | #else |
63 | 54 | # define LOG_SWTLB(...) do { } while (0) |
64 | 55 | #endif |
65 | 56 | |
66 | 57 | #ifdef DEBUG_BATS |
67 | -# define LOG_BATS(...) do { \ | |
68 | - if (loglevel) \ | |
69 | - fprintf(logfile, ## __VA_ARGS__); \ | |
70 | - } while (0) | |
58 | +# define LOG_BATS(...) qemu_log(__VA_ARGS__) | |
71 | 59 | #else |
72 | 60 | # define LOG_BATS(...) do { } while (0) |
73 | 61 | #endif |
74 | 62 | |
75 | 63 | #ifdef DEBUG_SLB |
76 | -# define LOG_SLB(...) do { \ | |
77 | - if (loglevel) \ | |
78 | - fprintf(logfile, ## __VA_ARGS__); \ | |
79 | - } while (0) | |
64 | +# define LOG_SLB(...) qemu_log(__VA_ARGS__) | |
80 | 65 | #else |
81 | 66 | # define LOG_SLB(...) do { } while (0) |
82 | 67 | #endif |
83 | 68 | |
84 | 69 | #ifdef DEBUG_EXCEPTIONS |
85 | -# define LOG_EXCP(...) do { \ | |
86 | - if (loglevel) \ | |
87 | - fprintf(logfile, ## __VA_ARGS__); \ | |
88 | - } while (0) | |
70 | +# define LOG_EXCP(...) qemu_log(__VA_ARGS__) | |
89 | 71 | #else |
90 | 72 | # define LOG_EXCP(...) do { } while (0) |
91 | 73 | #endif |
... | ... | @@ -257,8 +239,7 @@ static always_inline int _pte_check (mmu_ctx_t *ctx, int is_64b, |
257 | 239 | if (ctx->raddr != (target_phys_addr_t)-1ULL) { |
258 | 240 | /* all matches should have equal RPN, WIMG & PP */ |
259 | 241 | if ((ctx->raddr & mmask) != (pte1 & mmask)) { |
260 | - if (loglevel != 0) | |
261 | - fprintf(logfile, "Bad RPN/WIMG/PP\n"); | |
242 | + qemu_log("Bad RPN/WIMG/PP\n"); | |
262 | 243 | return -3; |
263 | 244 | } |
264 | 245 | } |
... | ... | @@ -988,11 +969,11 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, |
988 | 969 | } |
989 | 970 | } |
990 | 971 | #if defined (DUMP_PAGE_TABLES) |
991 | - if (loglevel != 0) { | |
972 | + if (qemu_log_enabled()) { | |
992 | 973 | target_phys_addr_t curaddr; |
993 | 974 | uint32_t a0, a1, a2, a3; |
994 | - fprintf(logfile, "Page table: " PADDRX " len " PADDRX "\n", | |
995 | - sdr, mask + 0x80); | |
975 | + qemu_log("Page table: " PADDRX " len " PADDRX "\n", | |
976 | + sdr, mask + 0x80); | |
996 | 977 | for (curaddr = sdr; curaddr < (sdr + mask + 0x80); |
997 | 978 | curaddr += 16) { |
998 | 979 | a0 = ldl_phys(curaddr); |
... | ... | @@ -1000,8 +981,8 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, |
1000 | 981 | a2 = ldl_phys(curaddr + 8); |
1001 | 982 | a3 = ldl_phys(curaddr + 12); |
1002 | 983 | if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) { |
1003 | - fprintf(logfile, PADDRX ": %08x %08x %08x %08x\n", | |
1004 | - curaddr, a0, a1, a2, a3); | |
984 | + qemu_log(PADDRX ": %08x %08x %08x %08x\n", | |
985 | + curaddr, a0, a1, a2, a3); | |
1005 | 986 | } |
1006 | 987 | } |
1007 | 988 | } |
... | ... | @@ -1037,10 +1018,8 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, |
1037 | 1018 | /* eciwx or ecowx */ |
1038 | 1019 | return -4; |
1039 | 1020 | default: |
1040 | - if (logfile) { | |
1041 | - fprintf(logfile, "ERROR: instruction should not need " | |
1021 | + qemu_log("ERROR: instruction should not need " | |
1042 | 1022 | "address translation\n"); |
1043 | - } | |
1044 | 1023 | return -4; |
1045 | 1024 | } |
1046 | 1025 | if ((rw == 1 || ctx->key != 1) && (rw == 0 || ctx->key != 0)) { |
... | ... | @@ -1064,8 +1043,7 @@ static always_inline int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb, |
1064 | 1043 | |
1065 | 1044 | /* Check valid flag */ |
1066 | 1045 | if (!(tlb->prot & PAGE_VALID)) { |
1067 | - if (loglevel != 0) | |
1068 | - fprintf(logfile, "%s: TLB %d not valid\n", __func__, i); | |
1046 | + qemu_log("%s: TLB %d not valid\n", __func__, i); | |
1069 | 1047 | return -1; |
1070 | 1048 | } |
1071 | 1049 | mask = ~(tlb->size - 1); |
... | ... | @@ -1335,9 +1313,7 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr, |
1335 | 1313 | int ret; |
1336 | 1314 | |
1337 | 1315 | #if 0 |
1338 | - if (loglevel != 0) { | |
1339 | - fprintf(logfile, "%s\n", __func__); | |
1340 | - } | |
1316 | + qemu_log("%s\n", __func__); | |
1341 | 1317 | #endif |
1342 | 1318 | if ((access_type == ACCESS_CODE && msr_ir == 0) || |
1343 | 1319 | (access_type != ACCESS_CODE && msr_dr == 0)) { |
... | ... | @@ -1388,10 +1364,8 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr, |
1388 | 1364 | } |
1389 | 1365 | } |
1390 | 1366 | #if 0 |
1391 | - if (loglevel != 0) { | |
1392 | - fprintf(logfile, "%s address " ADDRX " => %d " PADDRX "\n", | |
1367 | + qemu_log("%s address " ADDRX " => %d " PADDRX "\n", | |
1393 | 1368 | __func__, eaddr, ret, ctx->raddr); |
1394 | - } | |
1395 | 1369 | #endif |
1396 | 1370 | |
1397 | 1371 | return ret; |
... | ... | @@ -2016,7 +1990,7 @@ void ppc_hw_interrupt (CPUState *env) |
2016 | 1990 | #else /* defined (CONFIG_USER_ONLY) */ |
2017 | 1991 | static always_inline void dump_syscall (CPUState *env) |
2018 | 1992 | { |
2019 | - fprintf(logfile, "syscall r0=" REGX " r3=" REGX " r4=" REGX | |
1993 | + qemu_log_mask(CPU_LOG_INT, "syscall r0=" REGX " r3=" REGX " r4=" REGX | |
2020 | 1994 | " r5=" REGX " r6=" REGX " nip=" ADDRX "\n", |
2021 | 1995 | ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), ppc_dump_gpr(env, 4), |
2022 | 1996 | ppc_dump_gpr(env, 5), ppc_dump_gpr(env, 6), env->nip); |
... | ... | @@ -2042,10 +2016,8 @@ static always_inline void powerpc_excp (CPUState *env, |
2042 | 2016 | lpes1 = 1; |
2043 | 2017 | } |
2044 | 2018 | |
2045 | - if (loglevel & CPU_LOG_INT) { | |
2046 | - fprintf(logfile, "Raise exception at " ADDRX " => %08x (%02x)\n", | |
2047 | - env->nip, excp, env->error_code); | |
2048 | - } | |
2019 | + qemu_log_mask(CPU_LOG_INT, "Raise exception at " ADDRX " => %08x (%02x)\n", | |
2020 | + env->nip, excp, env->error_code); | |
2049 | 2021 | msr = env->msr; |
2050 | 2022 | new_msr = msr; |
2051 | 2023 | srr0 = SPR_SRR0; |
... | ... | @@ -2079,8 +2051,8 @@ static always_inline void powerpc_excp (CPUState *env, |
2079 | 2051 | /* Machine check exception is not enabled. |
2080 | 2052 | * Enter checkstop state. |
2081 | 2053 | */ |
2082 | - if (loglevel != 0) { | |
2083 | - fprintf(logfile, "Machine check while not allowed. " | |
2054 | + if (qemu_log_enabled()) { | |
2055 | + qemu_log("Machine check while not allowed. " | |
2084 | 2056 | "Entering checkstop state\n"); |
2085 | 2057 | } else { |
2086 | 2058 | fprintf(stderr, "Machine check while not allowed. " |
... | ... | @@ -2200,9 +2172,7 @@ static always_inline void powerpc_excp (CPUState *env, |
2200 | 2172 | return; |
2201 | 2173 | } |
2202 | 2174 | } |
2203 | - if (loglevel & CPU_LOG_INT) { | |
2204 | - dump_syscall(env); | |
2205 | - } | |
2175 | + dump_syscall(env); | |
2206 | 2176 | new_msr &= ~((target_ulong)1 << MSR_RI); |
2207 | 2177 | lev = env->error_code; |
2208 | 2178 | if (lev == 1 || (lpes0 == 0 && lpes1 == 0)) |
... | ... | @@ -2416,7 +2386,7 @@ static always_inline void powerpc_excp (CPUState *env, |
2416 | 2386 | case POWERPC_EXCP_7x5: |
2417 | 2387 | tlb_miss: |
2418 | 2388 | #if defined (DEBUG_SOFTWARE_TLB) |
2419 | - if (loglevel != 0) { | |
2389 | + if (qemu_log_enabled()) { | |
2420 | 2390 | const unsigned char *es; |
2421 | 2391 | target_ulong *miss, *cmp; |
2422 | 2392 | int en; |
... | ... | @@ -2434,7 +2404,7 @@ static always_inline void powerpc_excp (CPUState *env, |
2434 | 2404 | miss = &env->spr[SPR_DMISS]; |
2435 | 2405 | cmp = &env->spr[SPR_DCMP]; |
2436 | 2406 | } |
2437 | - fprintf(logfile, "6xx %sTLB miss: %cM " ADDRX " %cC " ADDRX | |
2407 | + qemu_log("6xx %sTLB miss: %cM " ADDRX " %cC " ADDRX | |
2438 | 2408 | " H1 " ADDRX " H2 " ADDRX " %08x\n", |
2439 | 2409 | es, en, *miss, en, *cmp, |
2440 | 2410 | env->spr[SPR_HASH1], env->spr[SPR_HASH2], |
... | ... | @@ -2449,7 +2419,7 @@ static always_inline void powerpc_excp (CPUState *env, |
2449 | 2419 | case POWERPC_EXCP_74xx: |
2450 | 2420 | tlb_miss_74xx: |
2451 | 2421 | #if defined (DEBUG_SOFTWARE_TLB) |
2452 | - if (loglevel != 0) { | |
2422 | + if (qemu_log_enabled()) { | |
2453 | 2423 | const unsigned char *es; |
2454 | 2424 | target_ulong *miss, *cmp; |
2455 | 2425 | int en; |
... | ... | @@ -2467,7 +2437,7 @@ static always_inline void powerpc_excp (CPUState *env, |
2467 | 2437 | miss = &env->spr[SPR_TLBMISS]; |
2468 | 2438 | cmp = &env->spr[SPR_PTEHI]; |
2469 | 2439 | } |
2470 | - fprintf(logfile, "74xx %sTLB miss: %cM " ADDRX " %cC " ADDRX | |
2440 | + qemu_log("74xx %sTLB miss: %cM " ADDRX " %cC " ADDRX | |
2471 | 2441 | " %08x\n", |
2472 | 2442 | es, en, *miss, en, *cmp, env->error_code); |
2473 | 2443 | } |
... | ... | @@ -2619,11 +2589,9 @@ void ppc_hw_interrupt (CPUPPCState *env) |
2619 | 2589 | int hdice; |
2620 | 2590 | |
2621 | 2591 | #if 0 |
2622 | - if (loglevel & CPU_LOG_INT) { | |
2623 | - fprintf(logfile, "%s: %p pending %08x req %08x me %d ee %d\n", | |
2592 | + qemu_log_mask(CPU_LOG_INT, "%s: %p pending %08x req %08x me %d ee %d\n", | |
2624 | 2593 | __func__, env, env->pending_interrupts, |
2625 | 2594 | env->interrupt_request, (int)msr_me, (int)msr_ee); |
2626 | - } | |
2627 | 2595 | #endif |
2628 | 2596 | /* External reset */ |
2629 | 2597 | if (env->pending_interrupts & (1 << PPC_INTERRUPT_RESET)) { |
... | ... | @@ -2735,16 +2703,8 @@ void ppc_hw_interrupt (CPUPPCState *env) |
2735 | 2703 | |
2736 | 2704 | void cpu_dump_rfi (target_ulong RA, target_ulong msr) |
2737 | 2705 | { |
2738 | - FILE *f; | |
2739 | - | |
2740 | - if (logfile) { | |
2741 | - f = logfile; | |
2742 | - } else { | |
2743 | - f = stdout; | |
2744 | - return; | |
2745 | - } | |
2746 | - fprintf(f, "Return from exception at " ADDRX " with flags " ADDRX "\n", | |
2747 | - RA, msr); | |
2706 | + qemu_log("Return from exception at " ADDRX " with flags " ADDRX "\n", | |
2707 | + RA, msr); | |
2748 | 2708 | } |
2749 | 2709 | |
2750 | 2710 | void cpu_ppc_reset (void *opaque) | ... | ... |
target-ppc/op_helper.c
... | ... | @@ -29,10 +29,7 @@ |
29 | 29 | //#define DEBUG_SOFTWARE_TLB |
30 | 30 | |
31 | 31 | #ifdef DEBUG_SOFTWARE_TLB |
32 | -# define LOG_SWTLB(...) do { \ | |
33 | - if (loglevel) \ | |
34 | - fprintf(logfile, ## __VA_ARGS__); \ | |
35 | - } while (0) | |
32 | +# define LOG_SWTLB(...) qemu_log(__VA_ARGS__) | |
36 | 33 | #else |
37 | 34 | # define LOG_SWTLB(...) do { } while (0) |
38 | 35 | #endif |
... | ... | @@ -84,18 +81,14 @@ void helper_store_cr (target_ulong val, uint32_t mask) |
84 | 81 | /* SPR accesses */ |
85 | 82 | void helper_load_dump_spr (uint32_t sprn) |
86 | 83 | { |
87 | - if (loglevel != 0) { | |
88 | - fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n", | |
84 | + qemu_log("Read SPR %d %03x => " ADDRX "\n", | |
89 | 85 | sprn, sprn, env->spr[sprn]); |
90 | - } | |
91 | 86 | } |
92 | 87 | |
93 | 88 | void helper_store_dump_spr (uint32_t sprn) |
94 | 89 | { |
95 | - if (loglevel != 0) { | |
96 | - fprintf(logfile, "Write SPR %d %03x <= " ADDRX "\n", | |
90 | + qemu_log("Write SPR %d %03x <= " ADDRX "\n", | |
97 | 91 | sprn, sprn, env->spr[sprn]); |
98 | - } | |
99 | 92 | } |
100 | 93 | |
101 | 94 | target_ulong helper_load_tbl (void) |
... | ... | @@ -192,10 +185,8 @@ void helper_store_hid0_601 (target_ulong val) |
192 | 185 | env->hflags_nmsr &= ~(1 << MSR_LE); |
193 | 186 | env->hflags_nmsr |= (1 << MSR_LE) & (((val >> 3) & 1) << MSR_LE); |
194 | 187 | env->hflags |= env->hflags_nmsr; |
195 | - if (loglevel != 0) { | |
196 | - fprintf(logfile, "%s: set endianness to %c => " ADDRX "\n", | |
188 | + qemu_log("%s: set endianness to %c => " ADDRX "\n", | |
197 | 189 | __func__, val & 0x8 ? 'l' : 'b', env->hflags); |
198 | - } | |
199 | 190 | } |
200 | 191 | env->spr[SPR_HID0] = (uint32_t)val; |
201 | 192 | } |
... | ... | @@ -1870,15 +1861,11 @@ target_ulong helper_load_dcr (target_ulong dcrn) |
1870 | 1861 | target_ulong val = 0; |
1871 | 1862 | |
1872 | 1863 | if (unlikely(env->dcr_env == NULL)) { |
1873 | - if (loglevel != 0) { | |
1874 | - fprintf(logfile, "No DCR environment\n"); | |
1875 | - } | |
1864 | + qemu_log("No DCR environment\n"); | |
1876 | 1865 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1877 | 1866 | POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
1878 | 1867 | } else if (unlikely(ppc_dcr_read(env->dcr_env, dcrn, &val) != 0)) { |
1879 | - if (loglevel != 0) { | |
1880 | - fprintf(logfile, "DCR read error %d %03x\n", (int)dcrn, (int)dcrn); | |
1881 | - } | |
1868 | + qemu_log("DCR read error %d %03x\n", (int)dcrn, (int)dcrn); | |
1882 | 1869 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1883 | 1870 | POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
1884 | 1871 | } |
... | ... | @@ -1888,15 +1875,11 @@ target_ulong helper_load_dcr (target_ulong dcrn) |
1888 | 1875 | void helper_store_dcr (target_ulong dcrn, target_ulong val) |
1889 | 1876 | { |
1890 | 1877 | if (unlikely(env->dcr_env == NULL)) { |
1891 | - if (loglevel != 0) { | |
1892 | - fprintf(logfile, "No DCR environment\n"); | |
1893 | - } | |
1878 | + qemu_log("No DCR environment\n"); | |
1894 | 1879 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1895 | 1880 | POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); |
1896 | 1881 | } else if (unlikely(ppc_dcr_write(env->dcr_env, dcrn, val) != 0)) { |
1897 | - if (loglevel != 0) { | |
1898 | - fprintf(logfile, "DCR write error %d %03x\n", (int)dcrn, (int)dcrn); | |
1899 | - } | |
1882 | + qemu_log("DCR write error %d %03x\n", (int)dcrn, (int)dcrn); | |
1900 | 1883 | helper_raise_exception_err(POWERPC_EXCP_PROGRAM, |
1901 | 1884 | POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); |
1902 | 1885 | } | ... | ... |
target-ppc/translate.c
... | ... | @@ -43,10 +43,7 @@ |
43 | 43 | //#define DO_PPC_STATISTICS |
44 | 44 | |
45 | 45 | #ifdef PPC_DEBUG_DISAS |
46 | -# define LOG_DISAS(...) do { \ | |
47 | - if (loglevel & CPU_LOG_TB_IN_ASM) \ | |
48 | - fprintf(logfile, ## __VA_ARGS__); \ | |
49 | - } while (0) | |
46 | +# define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) | |
50 | 47 | #else |
51 | 48 | # define LOG_DISAS(...) do { } while (0) |
52 | 49 | #endif |
... | ... | @@ -3900,10 +3897,8 @@ static always_inline void gen_op_mfspr (DisasContext *ctx) |
3900 | 3897 | * allowing userland application to read the PVR |
3901 | 3898 | */ |
3902 | 3899 | if (sprn != SPR_PVR) { |
3903 | - if (loglevel != 0) { | |
3904 | - fprintf(logfile, "Trying to read privileged spr %d %03x at " | |
3900 | + qemu_log("Trying to read privileged spr %d %03x at " | |
3905 | 3901 | ADDRX "\n", sprn, sprn, ctx->nip); |
3906 | - } | |
3907 | 3902 | printf("Trying to read privileged spr %d %03x at " ADDRX "\n", |
3908 | 3903 | sprn, sprn, ctx->nip); |
3909 | 3904 | } |
... | ... | @@ -3911,10 +3906,8 @@ static always_inline void gen_op_mfspr (DisasContext *ctx) |
3911 | 3906 | } |
3912 | 3907 | } else { |
3913 | 3908 | /* Not defined */ |
3914 | - if (loglevel != 0) { | |
3915 | - fprintf(logfile, "Trying to read invalid spr %d %03x at " | |
3909 | + qemu_log("Trying to read invalid spr %d %03x at " | |
3916 | 3910 | ADDRX "\n", sprn, sprn, ctx->nip); |
3917 | - } | |
3918 | 3911 | printf("Trying to read invalid spr %d %03x at " ADDRX "\n", |
3919 | 3912 | sprn, sprn, ctx->nip); |
3920 | 3913 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR); |
... | ... | @@ -4046,20 +4039,16 @@ GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC) |
4046 | 4039 | (*write_cb)(ctx, sprn, rS(ctx->opcode)); |
4047 | 4040 | } else { |
4048 | 4041 | /* Privilege exception */ |
4049 | - if (loglevel != 0) { | |
4050 | - fprintf(logfile, "Trying to write privileged spr %d %03x at " | |
4042 | + qemu_log("Trying to write privileged spr %d %03x at " | |
4051 | 4043 | ADDRX "\n", sprn, sprn, ctx->nip); |
4052 | - } | |
4053 | 4044 | printf("Trying to write privileged spr %d %03x at " ADDRX "\n", |
4054 | 4045 | sprn, sprn, ctx->nip); |
4055 | 4046 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
4056 | 4047 | } |
4057 | 4048 | } else { |
4058 | 4049 | /* Not defined */ |
4059 | - if (loglevel != 0) { | |
4060 | - fprintf(logfile, "Trying to write invalid spr %d %03x at " | |
4050 | + qemu_log("Trying to write invalid spr %d %03x at " | |
4061 | 4051 | ADDRX "\n", sprn, sprn, ctx->nip); |
4062 | - } | |
4063 | 4052 | printf("Trying to write invalid spr %d %03x at " ADDRX "\n", |
4064 | 4053 | sprn, sprn, ctx->nip); |
4065 | 4054 | gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR); |
... | ... | @@ -8267,11 +8256,11 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, |
8267 | 8256 | } |
8268 | 8257 | /* Is opcode *REALLY* valid ? */ |
8269 | 8258 | if (unlikely(handler->handler == &gen_invalid)) { |
8270 | - if (loglevel != 0) { | |
8271 | - fprintf(logfile, "invalid/unsupported opcode: " | |
8272 | - "%02x - %02x - %02x (%08x) " ADDRX " %d\n", | |
8273 | - opc1(ctx.opcode), opc2(ctx.opcode), | |
8274 | - opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir); | |
8259 | + if (qemu_log_enabled()) { | |
8260 | + qemu_log("invalid/unsupported opcode: " | |
8261 | + "%02x - %02x - %02x (%08x) " ADDRX " %d\n", | |
8262 | + opc1(ctx.opcode), opc2(ctx.opcode), | |
8263 | + opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir); | |
8275 | 8264 | } else { |
8276 | 8265 | printf("invalid/unsupported opcode: " |
8277 | 8266 | "%02x - %02x - %02x (%08x) " ADDRX " %d\n", |
... | ... | @@ -8280,12 +8269,12 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, |
8280 | 8269 | } |
8281 | 8270 | } else { |
8282 | 8271 | if (unlikely((ctx.opcode & handler->inval) != 0)) { |
8283 | - if (loglevel != 0) { | |
8284 | - fprintf(logfile, "invalid bits: %08x for opcode: " | |
8285 | - "%02x - %02x - %02x (%08x) " ADDRX "\n", | |
8286 | - ctx.opcode & handler->inval, opc1(ctx.opcode), | |
8287 | - opc2(ctx.opcode), opc3(ctx.opcode), | |
8288 | - ctx.opcode, ctx.nip - 4); | |
8272 | + if (qemu_log_enabled()) { | |
8273 | + qemu_log("invalid bits: %08x for opcode: " | |
8274 | + "%02x - %02x - %02x (%08x) " ADDRX "\n", | |
8275 | + ctx.opcode & handler->inval, opc1(ctx.opcode), | |
8276 | + opc2(ctx.opcode), opc3(ctx.opcode), | |
8277 | + ctx.opcode, ctx.nip - 4); | |
8289 | 8278 | } else { |
8290 | 8279 | printf("invalid bits: %08x for opcode: " |
8291 | 8280 | "%02x - %02x - %02x (%08x) " ADDRX "\n", |
... | ... | @@ -8343,17 +8332,15 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, |
8343 | 8332 | tb->icount = num_insns; |
8344 | 8333 | } |
8345 | 8334 | #if defined(DEBUG_DISAS) |
8346 | - if (loglevel & CPU_LOG_TB_CPU) { | |
8347 | - fprintf(logfile, "---------------- excp: %04x\n", ctx.exception); | |
8348 | - cpu_dump_state(env, logfile, fprintf, 0); | |
8349 | - } | |
8335 | + qemu_log_mask(CPU_LOG_TB_CPU, "---------------- excp: %04x\n", ctx.exception); | |
8336 | + log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0); | |
8350 | 8337 | if (loglevel & CPU_LOG_TB_IN_ASM) { |
8351 | 8338 | int flags; |
8352 | 8339 | flags = env->bfd_mach; |
8353 | 8340 | flags |= ctx.le_mode << 16; |
8354 | - fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); | |
8355 | - target_disas(logfile, pc_start, ctx.nip - pc_start, flags); | |
8356 | - fprintf(logfile, "\n"); | |
8341 | + qemu_log("IN: %s\n", lookup_symbol(pc_start)); | |
8342 | + log_target_disas(pc_start, ctx.nip - pc_start, flags); | |
8343 | + qemu_log("\n"); | |
8357 | 8344 | } |
8358 | 8345 | #endif |
8359 | 8346 | } | ... | ... |
target-sh4/helper.c
... | ... | @@ -151,9 +151,9 @@ void do_interrupt(CPUState * env) |
151 | 151 | expname = do_irq ? "interrupt" : "???"; |
152 | 152 | break; |
153 | 153 | } |
154 | - fprintf(logfile, "exception 0x%03x [%s] raised\n", | |
155 | - irq_vector, expname); | |
156 | - cpu_dump_state(env, logfile, fprintf, 0); | |
154 | + qemu_log("exception 0x%03x [%s] raised\n", | |
155 | + irq_vector, expname); | |
156 | + log_cpu_state(env, 0); | |
157 | 157 | } |
158 | 158 | |
159 | 159 | env->ssr = env->sr; | ... | ... |
target-sh4/translate.c
... | ... | @@ -1840,11 +1840,9 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb, |
1840 | 1840 | ctx.features = env->features; |
1841 | 1841 | |
1842 | 1842 | #ifdef DEBUG_DISAS |
1843 | - if (loglevel & CPU_LOG_TB_CPU) { | |
1844 | - fprintf(logfile, | |
1845 | - "------------------------------------------------\n"); | |
1846 | - cpu_dump_state(env, logfile, fprintf, 0); | |
1847 | - } | |
1843 | + qemu_log_mask(CPU_LOG_TB_CPU, | |
1844 | + "------------------------------------------------\n"); | |
1845 | + log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0); | |
1848 | 1846 | #endif |
1849 | 1847 | |
1850 | 1848 | ii = -1; |
... | ... | @@ -1937,13 +1935,12 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb, |
1937 | 1935 | |
1938 | 1936 | #ifdef DEBUG_DISAS |
1939 | 1937 | #ifdef SH4_DEBUG_DISAS |
1940 | - if (loglevel & CPU_LOG_TB_IN_ASM) | |
1941 | - fprintf(logfile, "\n"); | |
1938 | + qemu_log_mask(CPU_LOG_TB_IN_ASM, "\n"); | |
1942 | 1939 | #endif |
1943 | 1940 | if (loglevel & CPU_LOG_TB_IN_ASM) { |
1944 | - fprintf(logfile, "IN:\n"); /* , lookup_symbol(pc_start)); */ | |
1945 | - target_disas(logfile, pc_start, ctx.pc - pc_start, 0); | |
1946 | - fprintf(logfile, "\n"); | |
1941 | + qemu_log("IN:\n"); /* , lookup_symbol(pc_start)); */ | |
1942 | + log_target_disas(pc_start, ctx.pc - pc_start, 0); | |
1943 | + qemu_log("\n"); | |
1947 | 1944 | } |
1948 | 1945 | #endif |
1949 | 1946 | } | ... | ... |
target-sparc/op_helper.c
... | ... | @@ -2829,23 +2829,23 @@ void do_interrupt(CPUState *env) |
2829 | 2829 | name = "Unknown"; |
2830 | 2830 | } |
2831 | 2831 | |
2832 | - fprintf(logfile, "%6d: %s (v=%04x) pc=%016" PRIx64 " npc=%016" PRIx64 | |
2832 | + qemu_log("%6d: %s (v=%04x) pc=%016" PRIx64 " npc=%016" PRIx64 | |
2833 | 2833 | " SP=%016" PRIx64 "\n", |
2834 | 2834 | count, name, intno, |
2835 | 2835 | env->pc, |
2836 | 2836 | env->npc, env->regwptr[6]); |
2837 | - cpu_dump_state(env, logfile, fprintf, 0); | |
2837 | + log_cpu_state(env, 0); | |
2838 | 2838 | #if 0 |
2839 | 2839 | { |
2840 | 2840 | int i; |
2841 | 2841 | uint8_t *ptr; |
2842 | 2842 | |
2843 | - fprintf(logfile, " code="); | |
2843 | + qemu_log(" code="); | |
2844 | 2844 | ptr = (uint8_t *)env->pc; |
2845 | 2845 | for(i = 0; i < 16; i++) { |
2846 | - fprintf(logfile, " %02x", ldub(ptr + i)); | |
2846 | + qemu_log(" %02x", ldub(ptr + i)); | |
2847 | 2847 | } |
2848 | - fprintf(logfile, "\n"); | |
2848 | + qemu_log("\n"); | |
2849 | 2849 | } |
2850 | 2850 | #endif |
2851 | 2851 | count++; |
... | ... | @@ -2956,22 +2956,22 @@ void do_interrupt(CPUState *env) |
2956 | 2956 | name = "Unknown"; |
2957 | 2957 | } |
2958 | 2958 | |
2959 | - fprintf(logfile, "%6d: %s (v=%02x) pc=%08x npc=%08x SP=%08x\n", | |
2959 | + qemu_log("%6d: %s (v=%02x) pc=%08x npc=%08x SP=%08x\n", | |
2960 | 2960 | count, name, intno, |
2961 | 2961 | env->pc, |
2962 | 2962 | env->npc, env->regwptr[6]); |
2963 | - cpu_dump_state(env, logfile, fprintf, 0); | |
2963 | + log_cpu_state(env, 0); | |
2964 | 2964 | #if 0 |
2965 | 2965 | { |
2966 | 2966 | int i; |
2967 | 2967 | uint8_t *ptr; |
2968 | 2968 | |
2969 | - fprintf(logfile, " code="); | |
2969 | + qemu_log(" code="); | |
2970 | 2970 | ptr = (uint8_t *)env->pc; |
2971 | 2971 | for(i = 0; i < 16; i++) { |
2972 | - fprintf(logfile, " %02x", ldub(ptr + i)); | |
2972 | + qemu_log(" %02x", ldub(ptr + i)); | |
2973 | 2973 | } |
2974 | - fprintf(logfile, "\n"); | |
2974 | + qemu_log("\n"); | |
2975 | 2975 | } |
2976 | 2976 | #endif |
2977 | 2977 | count++; | ... | ... |
target-sparc/translate.c
... | ... | @@ -4829,8 +4829,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb, |
4829 | 4829 | } |
4830 | 4830 | } |
4831 | 4831 | if (spc) { |
4832 | - if (loglevel > 0) | |
4833 | - fprintf(logfile, "Search PC...\n"); | |
4832 | + qemu_log("Search PC...\n"); | |
4834 | 4833 | j = gen_opc_ptr - gen_opc_buf; |
4835 | 4834 | if (lj < j) { |
4836 | 4835 | lj++; |
... | ... | @@ -4897,9 +4896,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb, |
4897 | 4896 | while (lj <= j) |
4898 | 4897 | gen_opc_instr_start[lj++] = 0; |
4899 | 4898 | #if 0 |
4900 | - if (loglevel > 0) { | |
4901 | - page_dump(logfile); | |
4902 | - } | |
4899 | + log_page_dump(); | |
4903 | 4900 | #endif |
4904 | 4901 | gen_opc_jump_pc[0] = dc->jump_pc[0]; |
4905 | 4902 | gen_opc_jump_pc[1] = dc->jump_pc[1]; |
... | ... | @@ -4909,10 +4906,10 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb, |
4909 | 4906 | } |
4910 | 4907 | #ifdef DEBUG_DISAS |
4911 | 4908 | if (loglevel & CPU_LOG_TB_IN_ASM) { |
4912 | - fprintf(logfile, "--------------\n"); | |
4913 | - fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); | |
4914 | - target_disas(logfile, pc_start, last_pc + 4 - pc_start, 0); | |
4915 | - fprintf(logfile, "\n"); | |
4909 | + qemu_log("--------------\n"); | |
4910 | + qemu_log("IN: %s\n", lookup_symbol(pc_start)); | |
4911 | + log_target_disas(pc_start, last_pc + 4 - pc_start, 0); | |
4912 | + qemu_log("\n"); | |
4916 | 4913 | } |
4917 | 4914 | #endif |
4918 | 4915 | } | ... | ... |
tcg/tcg.c
... | ... | @@ -1879,9 +1879,9 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, |
1879 | 1879 | |
1880 | 1880 | #ifdef DEBUG_DISAS |
1881 | 1881 | if (unlikely(loglevel & CPU_LOG_TB_OP)) { |
1882 | - fprintf(logfile, "OP:\n"); | |
1882 | + qemu_log("OP:\n"); | |
1883 | 1883 | tcg_dump_ops(s, logfile); |
1884 | - fprintf(logfile, "\n"); | |
1884 | + qemu_log("\n"); | |
1885 | 1885 | } |
1886 | 1886 | #endif |
1887 | 1887 | |
... | ... | @@ -1895,9 +1895,9 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, |
1895 | 1895 | |
1896 | 1896 | #ifdef DEBUG_DISAS |
1897 | 1897 | if (unlikely(loglevel & CPU_LOG_TB_OP_OPT)) { |
1898 | - fprintf(logfile, "OP after la:\n"); | |
1898 | + qemu_log("OP after la:\n"); | |
1899 | 1899 | tcg_dump_ops(s, logfile); |
1900 | - fprintf(logfile, "\n"); | |
1900 | + qemu_log("\n"); | |
1901 | 1901 | } |
1902 | 1902 | #endif |
1903 | 1903 | ... | ... |
translate-all.c
... | ... | @@ -128,9 +128,9 @@ int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr) |
128 | 128 | |
129 | 129 | #ifdef DEBUG_DISAS |
130 | 130 | if (loglevel & CPU_LOG_TB_OUT_ASM) { |
131 | - fprintf(logfile, "OUT: [size=%d]\n", *gen_code_size_ptr); | |
132 | - disas(logfile, tb->tc_ptr, *gen_code_size_ptr); | |
133 | - fprintf(logfile, "\n"); | |
131 | + qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr); | |
132 | + log_disas(tb->tc_ptr, *gen_code_size_ptr); | |
133 | + qemu_log("\n"); | |
134 | 134 | fflush(logfile); |
135 | 135 | } |
136 | 136 | #endif | ... | ... |
vl.c
... | ... | @@ -156,10 +156,7 @@ |
156 | 156 | |
157 | 157 | |
158 | 158 | #ifdef DEBUG_IOPORT |
159 | -# define LOG_IOPORT(...) do { \ | |
160 | - if (loglevel & CPU_LOG_IOPORT) \ | |
161 | - fprintf(logfile, ## __VA_ARGS__); \ | |
162 | - } while (0) | |
159 | +# define LOG_IOPORT(...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__) | |
163 | 160 | #else |
164 | 161 | # define LOG_IOPORT(...) do { } while (0) |
165 | 162 | #endif | ... | ... |