Commit 9278480e8f9155fc3b3ce459efd12b500a611b7f

Authored by ths
1 parent 7385ac0b

Fix CLO calculation for MIPS64. And a small code cleanup.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3428 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 5 additions and 5 deletions
target-mips/op.c
@@ -543,9 +543,9 @@ void op_clo (void) @@ -543,9 +543,9 @@ void op_clo (void)
543 T0 = 32; 543 T0 = 32;
544 } else { 544 } else {
545 for (n = 0; n < 32; n++) { 545 for (n = 0; n < 32; n++) {
546 - if (!(T0 & (1 << 31))) 546 + if (!(((int32_t)T0) & (1 << 31)))
547 break; 547 break;
548 - T0 = T0 << 1; 548 + T0 <<= 1;
549 } 549 }
550 T0 = n; 550 T0 = n;
551 } 551 }
@@ -562,7 +562,7 @@ void op_clz (void) @@ -562,7 +562,7 @@ void op_clz (void)
562 for (n = 0; n < 32; n++) { 562 for (n = 0; n < 32; n++) {
563 if (T0 & (1 << 31)) 563 if (T0 & (1 << 31))
564 break; 564 break;
565 - T0 = T0 << 1; 565 + T0 <<= 1;
566 } 566 }
567 T0 = n; 567 T0 = n;
568 } 568 }
@@ -747,7 +747,7 @@ void op_dclo (void) @@ -747,7 +747,7 @@ void op_dclo (void)
747 for (n = 0; n < 64; n++) { 747 for (n = 0; n < 64; n++) {
748 if (!(T0 & (1ULL << 63))) 748 if (!(T0 & (1ULL << 63)))
749 break; 749 break;
750 - T0 = T0 << 1; 750 + T0 <<= 1;
751 } 751 }
752 T0 = n; 752 T0 = n;
753 } 753 }
@@ -764,7 +764,7 @@ void op_dclz (void) @@ -764,7 +764,7 @@ void op_dclz (void)
764 for (n = 0; n < 64; n++) { 764 for (n = 0; n < 64; n++) {
765 if (T0 & (1ULL << 63)) 765 if (T0 & (1ULL << 63))
766 break; 766 break;
767 - T0 = T0 << 1; 767 + T0 <<= 1;
768 } 768 }
769 T0 = n; 769 T0 = n;
770 } 770 }