gwj / at91sam9263 · Commits

Commit 925fd0f202e430fc18e1e4986cc066ea44504c9e

Authored by ths
1 parent 70705261

Fix sign-extension of VPN field in TLB, by Herve Poussineau. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2433 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 3 changed files with 3 additions and 3 deletions
target-mips/helper.c
  View file @925fd0f
@@ -41,12 +41,12 @@ enum { @@ -41,12 +41,12 @@ enum {
41 static int map_address (CPUState *env, target_ulong *physical, int *prot, 41 static int map_address (CPUState *env, target_ulong *physical, int *prot,
42 target_ulong address, int rw, int access_type) 42 target_ulong address, int rw, int access_type)
43 { 43 {
  44 + uint8_t ASID = env->CP0_EntryHi & 0xFF;
44 int i; 45 int i;
45 46
46 for (i = 0; i < env->tlb_in_use; i++) { 47 for (i = 0; i < env->tlb_in_use; i++) {
47 tlb_t *tlb = &env->tlb[i]; 48 tlb_t *tlb = &env->tlb[i];
48 /* 1k pages are not supported. */ 49 /* 1k pages are not supported. */
49 - uint8_t ASID = env->CP0_EntryHi & 0xFF;  
50 target_ulong mask = tlb->PageMask | 0x1FFF; 50 target_ulong mask = tlb->PageMask | 0x1FFF;
51 target_ulong tag = address & ~mask; 51 target_ulong tag = address & ~mask;
52 int n; 52 int n;
target-mips/op.c
  View file @925fd0f
@@ -1340,7 +1340,7 @@ void op_mtc0_entryhi (void) @@ -1340,7 +1340,7 @@ void op_mtc0_entryhi (void)
1340 1340
1341 /* 1k pages not implemented */ 1341 /* 1k pages not implemented */
1342 /* Ignore MIPS64 TLB for now */ 1342 /* Ignore MIPS64 TLB for now */
1343 - val = (int32_t)T0 & 0xFFFFE0FF; 1343 + val = (target_ulong)(int32_t)T0 & ~(target_ulong)0x1F00;
1344 old = env->CP0_EntryHi; 1344 old = env->CP0_EntryHi;
1345 env->CP0_EntryHi = val; 1345 env->CP0_EntryHi = val;
1346 /* If the ASID changes, flush qemu's TLB. */ 1346 /* If the ASID changes, flush qemu's TLB. */
target-mips/op_helper.c
  View file @925fd0f
@@ -395,7 +395,7 @@ static void fill_tlb (int idx) @@ -395,7 +395,7 @@ static void fill_tlb (int idx)
395 395
396 /* XXX: detect conflicting TLBs and raise a MCHECK exception when needed */ 396 /* XXX: detect conflicting TLBs and raise a MCHECK exception when needed */
397 tlb = &env->tlb[idx]; 397 tlb = &env->tlb[idx];
398 - tlb->VPN = env->CP0_EntryHi & (int32_t)0xFFFFE000; 398 + tlb->VPN = env->CP0_EntryHi & ~(target_ulong)0x1FFF;
399 tlb->ASID = env->CP0_EntryHi & 0xFF; 399 tlb->ASID = env->CP0_EntryHi & 0xFF;
400 tlb->PageMask = env->CP0_PageMask; 400 tlb->PageMask = env->CP0_PageMask;
401 tlb->G = env->CP0_EntryLo0 & env->CP0_EntryLo1 & 1; 401 tlb->G = env->CP0_EntryLo0 & env->CP0_EntryLo1 & 1;