gwj / at91sam9263 · Commits

Commit 920c608ef3ea8306b744b41e5f29b886baa99379

Authored by ths
1 parent f76981b1

Simplify conditional FP moves. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4913 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 5 additions and 10 deletions
target-mips/translate.c
  View file @920c608
... ... @@ -5998,6 +5998,7 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
5998 5998 TCGCond cond;
5999 5999 TCGv t0 = tcg_temp_local_new(TCG_TYPE_TL);
6000 6000 TCGv t1 = tcg_temp_local_new(TCG_TYPE_TL);
  6001 + TCGv r_tmp = tcg_temp_local_new(TCG_TYPE_I32);
6001 6002  
6002 6003 if (cc)
6003 6004 ccbit = 1 << (24 + cc);
... ... @@ -6010,17 +6011,11 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
6010 6011  
6011 6012 gen_load_gpr(t0, rd);
6012 6013 gen_load_gpr(t1, rs);
6013   - {
6014   - TCGv r_ptr = tcg_temp_new(TCG_TYPE_PTR);
6015   - TCGv r_tmp = tcg_temp_local_new(TCG_TYPE_I32);
  6014 + tcg_gen_ld_i32(r_tmp, current_fpu, offsetof(CPUMIPSFPUContext, fcr31));
  6015 + tcg_gen_andi_i32(r_tmp, r_tmp, ccbit);
  6016 + tcg_gen_brcondi_i32(cond, r_tmp, 0, l1);
  6017 + tcg_temp_free(r_tmp);
6016 6018  
6017   - tcg_gen_ld_ptr(r_ptr, cpu_env, offsetof(CPUState, fpu));
6018   - tcg_gen_ld_i32(r_tmp, r_ptr, offsetof(CPUMIPSFPUContext, fcr31));
6019   - tcg_temp_free(r_ptr);
6020   - tcg_gen_andi_i32(r_tmp, r_tmp, ccbit);
6021   - tcg_gen_brcondi_i32(cond, r_tmp, 0, l1);
6022   - tcg_temp_free(r_tmp);
6023   - }
6024 6019 tcg_gen_mov_tl(t0, t1);
6025 6020 tcg_temp_free(t1);
6026 6021  
... ...