Commit 9133e39b8473ee118c756b7e9356b0e5dbe6e18d
1 parent
4369415f
Push common interrupt variables to cpu-defs.h (Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
10 changed files
with
4 additions
and
18 deletions
cpu-defs.h
@@ -160,6 +160,10 @@ typedef struct CPUTLBEntry { | @@ -160,6 +160,10 @@ typedef struct CPUTLBEntry { | ||
160 | int nb_watchpoints; \ | 160 | int nb_watchpoints; \ |
161 | int watchpoint_hit; \ | 161 | int watchpoint_hit; \ |
162 | \ | 162 | \ |
163 | + /* Core interrupt code */ \ | ||
164 | + jmp_buf jmp_env; \ | ||
165 | + int exception_index; \ | ||
166 | + \ | ||
163 | void *next_cpu; /* next CPU sharing TB cache */ \ | 167 | void *next_cpu; /* next CPU sharing TB cache */ \ |
164 | int cpu_index; /* CPU index (informative) */ \ | 168 | int cpu_index; /* CPU index (informative) */ \ |
165 | /* user data */ \ | 169 | /* user data */ \ |
target-alpha/cpu.h
@@ -282,11 +282,9 @@ struct CPUAlphaState { | @@ -282,11 +282,9 @@ struct CPUAlphaState { | ||
282 | /* Those resources are used only in Qemu core */ | 282 | /* Those resources are used only in Qemu core */ |
283 | CPU_COMMON | 283 | CPU_COMMON |
284 | 284 | ||
285 | - jmp_buf jmp_env; | ||
286 | int user_mode_only; /* user mode only simulation */ | 285 | int user_mode_only; /* user mode only simulation */ |
287 | uint32_t hflags; | 286 | uint32_t hflags; |
288 | 287 | ||
289 | - int exception_index; | ||
290 | int error_code; | 288 | int error_code; |
291 | int interrupt_request; | 289 | int interrupt_request; |
292 | 290 |
target-arm/cpu.h
@@ -157,8 +157,6 @@ typedef struct CPUARMState { | @@ -157,8 +157,6 @@ typedef struct CPUARMState { | ||
157 | void *irq_opaque; | 157 | void *irq_opaque; |
158 | 158 | ||
159 | /* exception/interrupt handling */ | 159 | /* exception/interrupt handling */ |
160 | - jmp_buf jmp_env; | ||
161 | - int exception_index; | ||
162 | int interrupt_request; | 160 | int interrupt_request; |
163 | int user_mode_only; | 161 | int user_mode_only; |
164 | 162 |
target-cris/cpu.h
@@ -123,7 +123,6 @@ typedef struct CPUCRISState { | @@ -123,7 +123,6 @@ typedef struct CPUCRISState { | ||
123 | /* X flag at the time of cc snapshot. */ | 123 | /* X flag at the time of cc snapshot. */ |
124 | int cc_x; | 124 | int cc_x; |
125 | 125 | ||
126 | - int exception_index; | ||
127 | int interrupt_request; | 126 | int interrupt_request; |
128 | int interrupt_vector; | 127 | int interrupt_vector; |
129 | int fault_vector; | 128 | int fault_vector; |
@@ -158,7 +157,6 @@ typedef struct CPUCRISState { | @@ -158,7 +157,6 @@ typedef struct CPUCRISState { | ||
158 | int features; | 157 | int features; |
159 | int user_mode_only; | 158 | int user_mode_only; |
160 | 159 | ||
161 | - jmp_buf jmp_env; | ||
162 | CPU_COMMON | 160 | CPU_COMMON |
163 | } CPUCRISState; | 161 | } CPUCRISState; |
164 | 162 |
target-i386/cpu.h
@@ -552,8 +552,6 @@ typedef struct CPUX86State { | @@ -552,8 +552,6 @@ typedef struct CPUX86State { | ||
552 | uint64_t pat; | 552 | uint64_t pat; |
553 | 553 | ||
554 | /* exception/interrupt handling */ | 554 | /* exception/interrupt handling */ |
555 | - jmp_buf jmp_env; | ||
556 | - int exception_index; | ||
557 | int error_code; | 555 | int error_code; |
558 | int exception_is_int; | 556 | int exception_is_int; |
559 | target_ulong exception_next_eip; | 557 | target_ulong exception_next_eip; |
target-m68k/cpu.h
@@ -104,8 +104,6 @@ typedef struct CPUM68KState { | @@ -104,8 +104,6 @@ typedef struct CPUM68KState { | ||
104 | uint32_t t1; | 104 | uint32_t t1; |
105 | 105 | ||
106 | /* exception/interrupt handling */ | 106 | /* exception/interrupt handling */ |
107 | - jmp_buf jmp_env; | ||
108 | - int exception_index; | ||
109 | int interrupt_request; | 107 | int interrupt_request; |
110 | int user_mode_only; | 108 | int user_mode_only; |
111 | 109 |
target-mips/cpu.h
@@ -412,8 +412,6 @@ struct CPUMIPSState { | @@ -412,8 +412,6 @@ struct CPUMIPSState { | ||
412 | int32_t CP0_DESAVE; | 412 | int32_t CP0_DESAVE; |
413 | /* Qemu */ | 413 | /* Qemu */ |
414 | int interrupt_request; | 414 | int interrupt_request; |
415 | - jmp_buf jmp_env; | ||
416 | - int exception_index; | ||
417 | int error_code; | 415 | int error_code; |
418 | int user_mode_only; /* user mode only simulation */ | 416 | int user_mode_only; /* user mode only simulation */ |
419 | uint32_t hflags; /* CPU State */ | 417 | uint32_t hflags; /* CPU State */ |
target-ppc/cpu.h
@@ -646,7 +646,6 @@ struct CPUPPCState { | @@ -646,7 +646,6 @@ struct CPUPPCState { | ||
646 | int bfd_mach; | 646 | int bfd_mach; |
647 | uint32_t flags; | 647 | uint32_t flags; |
648 | 648 | ||
649 | - int exception_index; | ||
650 | int error_code; | 649 | int error_code; |
651 | int interrupt_request; | 650 | int interrupt_request; |
652 | uint32_t pending_interrupts; | 651 | uint32_t pending_interrupts; |
@@ -672,7 +671,6 @@ struct CPUPPCState { | @@ -672,7 +671,6 @@ struct CPUPPCState { | ||
672 | opc_handler_t *opcodes[0x40]; | 671 | opc_handler_t *opcodes[0x40]; |
673 | 672 | ||
674 | /* Those resources are used only in Qemu core */ | 673 | /* Those resources are used only in Qemu core */ |
675 | - jmp_buf jmp_env; | ||
676 | int user_mode_only; /* user mode only simulation */ | 674 | int user_mode_only; /* user mode only simulation */ |
677 | target_ulong hflags; /* hflags is a MSR & HFLAGS_MASK */ | 675 | target_ulong hflags; /* hflags is a MSR & HFLAGS_MASK */ |
678 | target_ulong hflags_nmsr; /* specific hflags, not comming from MSR */ | 676 | target_ulong hflags_nmsr; /* specific hflags, not comming from MSR */ |
target-sh4/cpu.h
@@ -114,10 +114,8 @@ typedef struct CPUSH4State { | @@ -114,10 +114,8 @@ typedef struct CPUSH4State { | ||
114 | uint32_t expevt; /* exception event register */ | 114 | uint32_t expevt; /* exception event register */ |
115 | uint32_t intevt; /* interrupt event register */ | 115 | uint32_t intevt; /* interrupt event register */ |
116 | 116 | ||
117 | - jmp_buf jmp_env; | ||
118 | int user_mode_only; | 117 | int user_mode_only; |
119 | int interrupt_request; | 118 | int interrupt_request; |
120 | - int exception_index; | ||
121 | CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */ | 119 | CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */ |
122 | tlb_t itlb[ITLB_SIZE]; /* instruction translation table */ | 120 | tlb_t itlb[ITLB_SIZE]; /* instruction translation table */ |
123 | void *intc_handle; | 121 | void *intc_handle; |
target-sparc/cpu.h
@@ -214,9 +214,7 @@ typedef struct CPUSPARCState { | @@ -214,9 +214,7 @@ typedef struct CPUSPARCState { | ||
214 | uint32_t pil_in; /* incoming interrupt level bitmap */ | 214 | uint32_t pil_in; /* incoming interrupt level bitmap */ |
215 | int psref; /* enable fpu */ | 215 | int psref; /* enable fpu */ |
216 | target_ulong version; | 216 | target_ulong version; |
217 | - jmp_buf jmp_env; | ||
218 | int user_mode_only; | 217 | int user_mode_only; |
219 | - int exception_index; | ||
220 | int interrupt_index; | 218 | int interrupt_index; |
221 | int interrupt_request; | 219 | int interrupt_request; |
222 | uint32_t mmu_bm; | 220 | uint32_t mmu_bm; |