Commit 90cb786c417403b15dcc28cf239913bc92a59cb6

Authored by ths
1 parent 9b686843

Avoid qemu SIGFPE for MIPS DIV, by Richard Sandiford.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4621 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 10 additions and 14 deletions
target-mips/translate.c
@@ -1902,21 +1902,17 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc, @@ -1902,21 +1902,17 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1902 1902
1903 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1); 1903 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
1904 { 1904 {
1905 - TCGv r_tmp1 = new_tmp();  
1906 - TCGv r_tmp2 = new_tmp();  
1907 - TCGv r_tmp3 = new_tmp(); 1905 + TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64);
  1906 + TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64);
1908 1907
1909 - tcg_gen_trunc_tl_i32(r_tmp1, cpu_T[0]);  
1910 - tcg_gen_trunc_tl_i32(r_tmp2, cpu_T[1]);  
1911 - tcg_gen_div_i32(r_tmp3, r_tmp1, r_tmp2);  
1912 - tcg_gen_rem_i32(r_tmp1, r_tmp1, r_tmp2);  
1913 - tcg_gen_ext_i32_tl(cpu_T[0], r_tmp3);  
1914 - tcg_gen_ext_i32_tl(cpu_T[1], r_tmp1);  
1915 - gen_store_LO(cpu_T[0], 0);  
1916 - gen_store_HI(cpu_T[1], 0);  
1917 - dead_tmp(r_tmp1);  
1918 - dead_tmp(r_tmp2);  
1919 - dead_tmp(r_tmp3); 1908 + tcg_gen_ext32s_tl(cpu_T[0], cpu_T[0]);
  1909 + tcg_gen_ext32s_tl(cpu_T[1], cpu_T[1]);
  1910 + tcg_gen_div_i64(r_tmp1, cpu_T[0], cpu_T[1]);
  1911 + tcg_gen_rem_i64(r_tmp2, cpu_T[0], cpu_T[1]);
  1912 + tcg_gen_ext32s_tl(r_tmp1, r_tmp1);
  1913 + tcg_gen_ext32s_tl(r_tmp2, r_tmp2);
  1914 + gen_store_LO(r_tmp1, 0);
  1915 + gen_store_HI(r_tmp2, 0);
1920 } 1916 }
1921 gen_set_label(l1); 1917 gen_set_label(l1);
1922 } 1918 }