Commit 902b3d5c392bb6f48ef340ad8ecc3311705d2800

Authored by malc
1 parent 4fbfcd6d

Introduce and use cache-utils.[ch]

Thanks to Segher Boessenkool and Holis Blanchard.

AIX and Darwin cache inquiry:
http://gcc.gnu.org/ml/gcc-patches/2007-08/msg00388.html

Auxiliary vectors:
http://manugarg.googlepages.com/aboutelfauxiliaryvectors

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5973 c046a42c-6fe2-441c-8c8c-71466251a162
Makefile
@@ -79,7 +79,7 @@ OBJS+=usb-serial.o usb-net.o @@ -79,7 +79,7 @@ OBJS+=usb-serial.o usb-net.o
79 OBJS+=sd.o ssi-sd.o 79 OBJS+=sd.o ssi-sd.o
80 OBJS+=bt.o bt-host.o bt-vhci.o bt-l2cap.o bt-sdp.o bt-hci.o bt-hid.o usb-bt.o 80 OBJS+=bt.o bt-host.o bt-vhci.o bt-l2cap.o bt-sdp.o bt-hci.o bt-hid.o usb-bt.o
81 OBJS+=buffered_file.o migration.o migration-tcp.o net.o qemu-sockets.o 81 OBJS+=buffered_file.o migration.o migration-tcp.o net.o qemu-sockets.o
82 -OBJS+=qemu-char.o aio.o net-checksum.o savevm.o 82 +OBJS+=qemu-char.o aio.o net-checksum.o savevm.o cache-utils.o
83 83
84 ifdef CONFIG_BRLAPI 84 ifdef CONFIG_BRLAPI
85 OBJS+= baum.o 85 OBJS+= baum.o
@@ -178,7 +178,7 @@ libqemu_common.a: $(OBJS) @@ -178,7 +178,7 @@ libqemu_common.a: $(OBJS)
178 178
179 ####################################################################### 179 #######################################################################
180 # USER_OBJS is code used by qemu userspace emulation 180 # USER_OBJS is code used by qemu userspace emulation
181 -USER_OBJS=cutils.o 181 +USER_OBJS=cutils.o cache-utils.o
182 182
183 libqemu_user.a: $(USER_OBJS) 183 libqemu_user.a: $(USER_OBJS)
184 rm -f $@ 184 rm -f $@
cache-utils.c 0 → 100644
  1 +#include "cache-utils.h"
  2 +
  3 +#ifdef __powerpc__
  4 +struct qemu_cache_conf qemu_cache_conf = {
  5 + .dcache_bsize = 16,
  6 + .icache_bsize = 16
  7 +};
  8 +
  9 +#if defined _AIX
  10 +#include <sys/systemcfg.h>
  11 +
  12 +static void ppc_init_cacheline_sizes(void)
  13 +{
  14 + qemu_cache_conf.icache_bsize = _system_configuration.icache_line;
  15 + qemu_cache_conf.dcache_bsize = _system_configuration.dcache_line;
  16 +}
  17 +
  18 +#elif defined __linux__
  19 +#include <linux/auxvec.h>
  20 +
  21 +static void ppc_init_cacheline_sizes(char **envp)
  22 +{
  23 + unsigned long *auxv;
  24 +
  25 + while (*envp++);
  26 +
  27 + for (auxv = (unsigned long *) envp; *auxv != AT_NULL; auxv += 2) {
  28 + switch (*auxv) {
  29 + case AT_DCACHEBSIZE: qemu_cache_conf.dcache_bsize = auxv[1]; break;
  30 + case AT_ICACHEBSIZE: qemu_cache_conf.icache_bsize = auxv[1]; break;
  31 + default: break;
  32 + }
  33 + }
  34 +}
  35 +
  36 +#elif defined __APPLE__
  37 +#include <sys/types.h>
  38 +#include <sys/sysctl.h>
  39 +
  40 +static void ppc_init_cacheline_sizes(void)
  41 +{
  42 + size_t len;
  43 + unsigned cacheline;
  44 + int name[2] = { CTL_HW, HW_CACHELINE };
  45 +
  46 + if (sysctl(name, 2, &cacheline, &len, NULL, 0)) {
  47 + perror("sysctl CTL_HW HW_CACHELINE failed");
  48 + } else {
  49 + qemu_cache_conf.dcache_bsize = cacheline;
  50 + qemu_cache_conf.icache_bsize = cacheline;
  51 + }
  52 +}
  53 +#endif
  54 +
  55 +#ifdef __linux__
  56 +void qemu_cache_utils_init(char **envp)
  57 +{
  58 + ppc_init_cacheline_sizes(envp);
  59 +}
  60 +#else
  61 +void qemu_cache_utils_init(char **envp)
  62 +{
  63 + (void) envp;
  64 + ppc_init_cacheline_sizes();
  65 +}
  66 +#endif
  67 +
  68 +#endif /* __powerpc__ */
cache-utils.h 0 → 100644
  1 +#ifndef QEMU_CACHE_UTILS_H
  2 +#define QEMU_CACHE_UTILS_H
  3 +
  4 +#ifdef __powerpc__
  5 +struct qemu_cache_conf {
  6 + unsigned long dcache_bsize;
  7 + unsigned long icache_bsize;
  8 +};
  9 +
  10 +extern struct qemu_cache_conf qemu_cache_conf;
  11 +
  12 +extern void qemu_cache_utils_init(char **envp);
  13 +
  14 +/* mildly adjusted code from tcg-dyngen.c */
  15 +static inline void flush_icache_range(unsigned long start, unsigned long stop)
  16 +{
  17 + unsigned long p, start1, stop1;
  18 + unsigned long dsize = qemu_cache_conf.dcache_bsize;
  19 + unsigned long isize = qemu_cache_conf.icache_bsize;
  20 +
  21 + start1 = start & ~(dsize - 1);
  22 + stop1 = (stop + dsize - 1) & ~(dsize - 1);
  23 + for (p = start1; p < stop1; p += dsize) {
  24 + asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
  25 + }
  26 + asm volatile ("sync" : : : "memory");
  27 +
  28 + start &= start & ~(isize - 1);
  29 + stop1 = (stop + isize - 1) & ~(isize - 1);
  30 + for (p = start1; p < stop1; p += isize) {
  31 + asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
  32 + }
  33 + asm volatile ("sync" : : : "memory");
  34 + asm volatile ("isync" : : : "memory");
  35 +}
  36 +
  37 +#else
  38 +#define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)
  39 +#endif
  40 +
  41 +#endif /* QEMU_CACHE_UTILS_H */
linux-user/main.c
@@ -27,6 +27,7 @@ @@ -27,6 +27,7 @@
27 27
28 #include "qemu.h" 28 #include "qemu.h"
29 #include "qemu-common.h" 29 #include "qemu-common.h"
  30 +#include "cache-utils.h"
30 /* For tb_lock */ 31 /* For tb_lock */
31 #include "exec-all.h" 32 #include "exec-all.h"
32 33
@@ -2214,7 +2215,7 @@ void init_task_state(TaskState *ts) @@ -2214,7 +2215,7 @@ void init_task_state(TaskState *ts)
2214 ts->sigqueue_table[i].next = NULL; 2215 ts->sigqueue_table[i].next = NULL;
2215 } 2216 }
2216 2217
2217 -int main(int argc, char **argv) 2218 +int main(int argc, char **argv, char **envp)
2218 { 2219 {
2219 const char *filename; 2220 const char *filename;
2220 const char *cpu_model; 2221 const char *cpu_model;
@@ -2231,6 +2232,8 @@ int main(int argc, char **argv) @@ -2231,6 +2232,8 @@ int main(int argc, char **argv)
2231 if (argc <= 1) 2232 if (argc <= 1)
2232 usage(); 2233 usage();
2233 2234
  2235 + qemu_cache_utils_init(envp);
  2236 +
2234 /* init debug */ 2237 /* init debug */
2235 cpu_set_log_filename(DEBUG_LOGFILE); 2238 cpu_set_log_filename(DEBUG_LOGFILE);
2236 2239
tcg/ppc/tcg-target.h
@@ -86,24 +86,3 @@ enum { @@ -86,24 +86,3 @@ enum {
86 #define TCG_AREG1 TCG_REG_R24 86 #define TCG_AREG1 TCG_REG_R24
87 #define TCG_AREG2 TCG_REG_R25 87 #define TCG_AREG2 TCG_REG_R25
88 #define TCG_AREG3 TCG_REG_R26 88 #define TCG_AREG3 TCG_REG_R26
89 -  
90 -/* taken directly from tcg-dyngen.c */  
91 -#define MIN_CACHE_LINE_SIZE 8 /* conservative value */  
92 -  
93 -static inline void flush_icache_range(unsigned long start, unsigned long stop)  
94 -{  
95 - unsigned long p;  
96 -  
97 - start &= ~(MIN_CACHE_LINE_SIZE - 1);  
98 - stop = (stop + MIN_CACHE_LINE_SIZE - 1) & ~(MIN_CACHE_LINE_SIZE - 1);  
99 -  
100 - for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {  
101 - asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");  
102 - }  
103 - asm volatile ("sync" : : : "memory");  
104 - for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {  
105 - asm volatile ("icbi 0,%0" : : "r"(p) : "memory");  
106 - }  
107 - asm volatile ("sync" : : : "memory");  
108 - asm volatile ("isync" : : : "memory");  
109 -}  
tcg/ppc64/tcg-target.h
@@ -82,24 +82,3 @@ enum { @@ -82,24 +82,3 @@ enum {
82 #define TCG_AREG1 TCG_REG_R24 82 #define TCG_AREG1 TCG_REG_R24
83 #define TCG_AREG2 TCG_REG_R25 83 #define TCG_AREG2 TCG_REG_R25
84 #define TCG_AREG3 TCG_REG_R26 84 #define TCG_AREG3 TCG_REG_R26
85 -  
86 -/* taken directly from tcg-dyngen.c */  
87 -#define MIN_CACHE_LINE_SIZE 8 /* conservative value */  
88 -  
89 -static inline void flush_icache_range(unsigned long start, unsigned long stop)  
90 -{  
91 - unsigned long p;  
92 -  
93 - start &= ~(MIN_CACHE_LINE_SIZE - 1);  
94 - stop = (stop + MIN_CACHE_LINE_SIZE - 1) & ~(MIN_CACHE_LINE_SIZE - 1);  
95 -  
96 - for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {  
97 - asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");  
98 - }  
99 - asm volatile ("sync" : : : "memory");  
100 - for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {  
101 - asm volatile ("icbi 0,%0" : : "r"(p) : "memory");  
102 - }  
103 - asm volatile ("sync" : : : "memory");  
104 - asm volatile ("isync" : : : "memory");  
105 -}  
tcg/tcg.c
@@ -43,6 +43,7 @@ @@ -43,6 +43,7 @@
43 43
44 #include "config.h" 44 #include "config.h"
45 #include "qemu-common.h" 45 #include "qemu-common.h"
  46 +#include "cache-utils.h"
46 47
47 /* Note: the long term plan is to reduce the dependancies on the QEMU 48 /* Note: the long term plan is to reduce the dependancies on the QEMU
48 CPU definitions. Currently they are used for qemu_ld/st 49 CPU definitions. Currently they are used for qemu_ld/st
@@ -36,6 +36,7 @@ @@ -36,6 +36,7 @@
36 #include "gdbstub.h" 36 #include "gdbstub.h"
37 #include "qemu-timer.h" 37 #include "qemu-timer.h"
38 #include "qemu-char.h" 38 #include "qemu-char.h"
  39 +#include "cache-utils.h"
39 #include "block.h" 40 #include "block.h"
40 #include "audio/audio.h" 41 #include "audio/audio.h"
41 #include "migration.h" 42 #include "migration.h"
@@ -4456,7 +4457,7 @@ static void termsig_setup(void) @@ -4456,7 +4457,7 @@ static void termsig_setup(void)
4456 4457
4457 #endif 4458 #endif
4458 4459
4459 -int main(int argc, char **argv) 4460 +int main(int argc, char **argv, char **envp)
4460 { 4461 {
4461 #ifdef CONFIG_GDBSTUB 4462 #ifdef CONFIG_GDBSTUB
4462 int use_gdbstub; 4463 int use_gdbstub;
@@ -4494,6 +4495,8 @@ int main(int argc, char **argv) @@ -4494,6 +4495,8 @@ int main(int argc, char **argv)
4494 int autostart; 4495 int autostart;
4495 const char *incoming = NULL; 4496 const char *incoming = NULL;
4496 4497
  4498 + qemu_cache_utils_init(envp);
  4499 +
4497 LIST_INIT (&vm_change_state_head); 4500 LIST_INIT (&vm_change_state_head);
4498 #ifndef _WIN32 4501 #ifndef _WIN32
4499 { 4502 {