Commit 8fec2b8c454f00d9200e6eb75c6cda73f8425c00
1 parent
31b1a7b4
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel & X) qemu_log()' statement. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
Showing
17 changed files
with
26 additions
and
26 deletions
cpu-exec.c
| @@ -532,7 +532,7 @@ int cpu_exec(CPUState *env1) | @@ -532,7 +532,7 @@ int cpu_exec(CPUState *env1) | ||
| 532 | } | 532 | } |
| 533 | } | 533 | } |
| 534 | #ifdef DEBUG_EXEC | 534 | #ifdef DEBUG_EXEC |
| 535 | - if ((loglevel & CPU_LOG_TB_CPU)) { | 535 | + if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) { |
| 536 | /* restore flags in standard format */ | 536 | /* restore flags in standard format */ |
| 537 | regs_to_env(); | 537 | regs_to_env(); |
| 538 | #if defined(TARGET_I386) | 538 | #if defined(TARGET_I386) |
hw/ppc_prep.c
| @@ -52,7 +52,7 @@ | @@ -52,7 +52,7 @@ | ||
| 52 | #if defined (HARD_DEBUG_PPC_IO) | 52 | #if defined (HARD_DEBUG_PPC_IO) |
| 53 | #define PPC_IO_DPRINTF(fmt, args...) \ | 53 | #define PPC_IO_DPRINTF(fmt, args...) \ |
| 54 | do { \ | 54 | do { \ |
| 55 | - if (loglevel & CPU_LOG_IOPORT) { \ | 55 | + if (qemu_loglevel_mask(CPU_LOG_IOPORT)) { \ |
| 56 | qemu_log("%s: " fmt, __func__ , ##args); \ | 56 | qemu_log("%s: " fmt, __func__ , ##args); \ |
| 57 | } else { \ | 57 | } else { \ |
| 58 | printf("%s : " fmt, __func__ , ##args); \ | 58 | printf("%s : " fmt, __func__ , ##args); \ |
target-alpha/translate.c
| @@ -2442,7 +2442,7 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, | @@ -2442,7 +2442,7 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, | ||
| 2442 | } | 2442 | } |
| 2443 | #if defined ALPHA_DEBUG_DISAS | 2443 | #if defined ALPHA_DEBUG_DISAS |
| 2444 | log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0); | 2444 | log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0); |
| 2445 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | 2445 | + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { |
| 2446 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); | 2446 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); |
| 2447 | log_target_disas(pc_start, ctx.pc - pc_start, 1); | 2447 | log_target_disas(pc_start, ctx.pc - pc_start, 1); |
| 2448 | qemu_log("\n"); | 2448 | qemu_log("\n"); |
target-arm/translate.c
| @@ -8870,7 +8870,7 @@ done_generating: | @@ -8870,7 +8870,7 @@ done_generating: | ||
| 8870 | *gen_opc_ptr = INDEX_op_end; | 8870 | *gen_opc_ptr = INDEX_op_end; |
| 8871 | 8871 | ||
| 8872 | #ifdef DEBUG_DISAS | 8872 | #ifdef DEBUG_DISAS |
| 8873 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | 8873 | + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { |
| 8874 | qemu_log("----------------\n"); | 8874 | qemu_log("----------------\n"); |
| 8875 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); | 8875 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); |
| 8876 | log_target_disas(pc_start, dc->pc - pc_start, env->thumb); | 8876 | log_target_disas(pc_start, dc->pc - pc_start, env->thumb); |
target-cris/translate.c
| @@ -3035,7 +3035,7 @@ cris_decoder(DisasContext *dc) | @@ -3035,7 +3035,7 @@ cris_decoder(DisasContext *dc) | ||
| 3035 | unsigned int insn_len = 2; | 3035 | unsigned int insn_len = 2; |
| 3036 | int i; | 3036 | int i; |
| 3037 | 3037 | ||
| 3038 | - if (unlikely(loglevel & CPU_LOG_TB_OP)) | 3038 | + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) |
| 3039 | tcg_gen_debug_insn_start(dc->pc); | 3039 | tcg_gen_debug_insn_start(dc->pc); |
| 3040 | 3040 | ||
| 3041 | /* Load a halfword onto the instruction register. */ | 3041 | /* Load a halfword onto the instruction register. */ |
| @@ -3179,7 +3179,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, | @@ -3179,7 +3179,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, | ||
| 3179 | 3179 | ||
| 3180 | dc->cpustate_changed = 0; | 3180 | dc->cpustate_changed = 0; |
| 3181 | 3181 | ||
| 3182 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | 3182 | + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { |
| 3183 | qemu_log( | 3183 | qemu_log( |
| 3184 | "srch=%d pc=%x %x flg=%llx bt=%x ds=%u ccs=%x\n" | 3184 | "srch=%d pc=%x %x flg=%llx bt=%x ds=%u ccs=%x\n" |
| 3185 | "pid=%x usp=%x\n" | 3185 | "pid=%x usp=%x\n" |
| @@ -3331,7 +3331,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, | @@ -3331,7 +3331,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, | ||
| 3331 | 3331 | ||
| 3332 | #ifdef DEBUG_DISAS | 3332 | #ifdef DEBUG_DISAS |
| 3333 | #if !DISAS_CRIS | 3333 | #if !DISAS_CRIS |
| 3334 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | 3334 | + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { |
| 3335 | log_target_disas(pc_start, dc->pc - pc_start, 0); | 3335 | log_target_disas(pc_start, dc->pc - pc_start, 0); |
| 3336 | qemu_log("\nisize=%d osize=%zd\n", | 3336 | qemu_log("\nisize=%d osize=%zd\n", |
| 3337 | dc->pc - pc_start, gen_opc_ptr - gen_opc_buf); | 3337 | dc->pc - pc_start, gen_opc_ptr - gen_opc_buf); |
target-i386/op_helper.c
| @@ -1206,7 +1206,7 @@ void do_interrupt_user(int intno, int is_int, int error_code, | @@ -1206,7 +1206,7 @@ void do_interrupt_user(int intno, int is_int, int error_code, | ||
| 1206 | void do_interrupt(int intno, int is_int, int error_code, | 1206 | void do_interrupt(int intno, int is_int, int error_code, |
| 1207 | target_ulong next_eip, int is_hw) | 1207 | target_ulong next_eip, int is_hw) |
| 1208 | { | 1208 | { |
| 1209 | - if (loglevel & CPU_LOG_INT) { | 1209 | + if (qemu_loglevel_mask(CPU_LOG_INT)) { |
| 1210 | if ((env->cr[0] & CR0_PE_MASK)) { | 1210 | if ((env->cr[0] & CR0_PE_MASK)) { |
| 1211 | static int count; | 1211 | static int count; |
| 1212 | qemu_log("%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx, | 1212 | qemu_log("%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx, |
target-i386/translate.c
| @@ -3961,7 +3961,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) | @@ -3961,7 +3961,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) | ||
| 3961 | target_ulong next_eip, tval; | 3961 | target_ulong next_eip, tval; |
| 3962 | int rex_w, rex_r; | 3962 | int rex_w, rex_r; |
| 3963 | 3963 | ||
| 3964 | - if (unlikely(loglevel & CPU_LOG_TB_OP)) | 3964 | + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) |
| 3965 | tcg_gen_debug_insn_start(pc_start); | 3965 | tcg_gen_debug_insn_start(pc_start); |
| 3966 | s->pc = pc_start; | 3966 | s->pc = pc_start; |
| 3967 | prefixes = 0; | 3967 | prefixes = 0; |
| @@ -7676,7 +7676,7 @@ static inline void gen_intermediate_code_internal(CPUState *env, | @@ -7676,7 +7676,7 @@ static inline void gen_intermediate_code_internal(CPUState *env, | ||
| 7676 | 7676 | ||
| 7677 | #ifdef DEBUG_DISAS | 7677 | #ifdef DEBUG_DISAS |
| 7678 | log_cpu_state_mask(CPU_LOG_TB_CPU, env, X86_DUMP_CCOP); | 7678 | log_cpu_state_mask(CPU_LOG_TB_CPU, env, X86_DUMP_CCOP); |
| 7679 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | 7679 | + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { |
| 7680 | int disas_flags; | 7680 | int disas_flags; |
| 7681 | qemu_log("----------------\n"); | 7681 | qemu_log("----------------\n"); |
| 7682 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); | 7682 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); |
| @@ -7712,7 +7712,7 @@ void gen_pc_load(CPUState *env, TranslationBlock *tb, | @@ -7712,7 +7712,7 @@ void gen_pc_load(CPUState *env, TranslationBlock *tb, | ||
| 7712 | { | 7712 | { |
| 7713 | int cc_op; | 7713 | int cc_op; |
| 7714 | #ifdef DEBUG_DISAS | 7714 | #ifdef DEBUG_DISAS |
| 7715 | - if (loglevel & CPU_LOG_TB_OP) { | 7715 | + if (qemu_loglevel_mask(CPU_LOG_TB_OP)) { |
| 7716 | int i; | 7716 | int i; |
| 7717 | qemu_log("RESTORE:\n"); | 7717 | qemu_log("RESTORE:\n"); |
| 7718 | for(i = 0;i <= pc_pos; i++) { | 7718 | for(i = 0;i <= pc_pos; i++) { |
target-m68k/translate.c
| @@ -3063,7 +3063,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, | @@ -3063,7 +3063,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, | ||
| 3063 | *gen_opc_ptr = INDEX_op_end; | 3063 | *gen_opc_ptr = INDEX_op_end; |
| 3064 | 3064 | ||
| 3065 | #ifdef DEBUG_DISAS | 3065 | #ifdef DEBUG_DISAS |
| 3066 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | 3066 | + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { |
| 3067 | qemu_log("----------------\n"); | 3067 | qemu_log("----------------\n"); |
| 3068 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); | 3068 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); |
| 3069 | log_target_disas(pc_start, dc->pc - pc_start, 0); | 3069 | log_target_disas(pc_start, dc->pc - pc_start, 0); |
target-mips/op_helper.c
| @@ -1194,7 +1194,7 @@ void do_mtc0_status (target_ulong t0) | @@ -1194,7 +1194,7 @@ void do_mtc0_status (target_ulong t0) | ||
| 1194 | old = env->CP0_Status; | 1194 | old = env->CP0_Status; |
| 1195 | env->CP0_Status = (env->CP0_Status & ~mask) | val; | 1195 | env->CP0_Status = (env->CP0_Status & ~mask) | val; |
| 1196 | compute_hflags(env); | 1196 | compute_hflags(env); |
| 1197 | - if (loglevel & CPU_LOG_EXEC) | 1197 | + if (qemu_loglevel_mask(CPU_LOG_EXEC)) |
| 1198 | do_mtc0_status_debug(old, val); | 1198 | do_mtc0_status_debug(old, val); |
| 1199 | cpu_mips_update_irq(env); | 1199 | cpu_mips_update_irq(env); |
| 1200 | } | 1200 | } |
| @@ -1705,7 +1705,7 @@ target_ulong do_ei (void) | @@ -1705,7 +1705,7 @@ target_ulong do_ei (void) | ||
| 1705 | 1705 | ||
| 1706 | static void debug_pre_eret (void) | 1706 | static void debug_pre_eret (void) |
| 1707 | { | 1707 | { |
| 1708 | - if (loglevel & CPU_LOG_EXEC) { | 1708 | + if (qemu_loglevel_mask(CPU_LOG_EXEC)) { |
| 1709 | qemu_log("ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, | 1709 | qemu_log("ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, |
| 1710 | env->active_tc.PC, env->CP0_EPC); | 1710 | env->active_tc.PC, env->CP0_EPC); |
| 1711 | if (env->CP0_Status & (1 << CP0St_ERL)) | 1711 | if (env->CP0_Status & (1 << CP0St_ERL)) |
| @@ -1718,7 +1718,7 @@ static void debug_pre_eret (void) | @@ -1718,7 +1718,7 @@ static void debug_pre_eret (void) | ||
| 1718 | 1718 | ||
| 1719 | static void debug_post_eret (void) | 1719 | static void debug_post_eret (void) |
| 1720 | { | 1720 | { |
| 1721 | - if (loglevel & CPU_LOG_EXEC) { | 1721 | + if (qemu_loglevel_mask(CPU_LOG_EXEC)) { |
| 1722 | qemu_log(" => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, | 1722 | qemu_log(" => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, |
| 1723 | env->active_tc.PC, env->CP0_EPC); | 1723 | env->active_tc.PC, env->CP0_EPC); |
| 1724 | if (env->CP0_Status & (1 << CP0St_ERL)) | 1724 | if (env->CP0_Status & (1 << CP0St_ERL)) |
target-mips/translate.c
| @@ -8289,7 +8289,7 @@ done_generating: | @@ -8289,7 +8289,7 @@ done_generating: | ||
| 8289 | } | 8289 | } |
| 8290 | #ifdef DEBUG_DISAS | 8290 | #ifdef DEBUG_DISAS |
| 8291 | LOG_DISAS("\n"); | 8291 | LOG_DISAS("\n"); |
| 8292 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | 8292 | + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { |
| 8293 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); | 8293 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); |
| 8294 | log_target_disas(pc_start, ctx.pc - pc_start, 0); | 8294 | log_target_disas(pc_start, ctx.pc - pc_start, 0); |
| 8295 | qemu_log("\n"); | 8295 | qemu_log("\n"); |
target-ppc/translate.c
| @@ -8334,7 +8334,7 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, | @@ -8334,7 +8334,7 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, | ||
| 8334 | #if defined(DEBUG_DISAS) | 8334 | #if defined(DEBUG_DISAS) |
| 8335 | qemu_log_mask(CPU_LOG_TB_CPU, "---------------- excp: %04x\n", ctx.exception); | 8335 | qemu_log_mask(CPU_LOG_TB_CPU, "---------------- excp: %04x\n", ctx.exception); |
| 8336 | log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0); | 8336 | log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0); |
| 8337 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | 8337 | + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { |
| 8338 | int flags; | 8338 | int flags; |
| 8339 | flags = env->bfd_mach; | 8339 | flags = env->bfd_mach; |
| 8340 | flags |= ctx.le_mode << 16; | 8340 | flags |= ctx.le_mode << 16; |
target-sh4/helper.c
| @@ -105,7 +105,7 @@ void do_interrupt(CPUState * env) | @@ -105,7 +105,7 @@ void do_interrupt(CPUState * env) | ||
| 105 | } | 105 | } |
| 106 | } | 106 | } |
| 107 | 107 | ||
| 108 | - if (loglevel & CPU_LOG_INT) { | 108 | + if (qemu_loglevel_mask(CPU_LOG_INT)) { |
| 109 | const char *expname; | 109 | const char *expname; |
| 110 | switch (env->exception_index) { | 110 | switch (env->exception_index) { |
| 111 | case 0x0e0: | 111 | case 0x0e0: |
target-sh4/translate.c
| @@ -1937,7 +1937,7 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb, | @@ -1937,7 +1937,7 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb, | ||
| 1937 | #ifdef SH4_DEBUG_DISAS | 1937 | #ifdef SH4_DEBUG_DISAS |
| 1938 | qemu_log_mask(CPU_LOG_TB_IN_ASM, "\n"); | 1938 | qemu_log_mask(CPU_LOG_TB_IN_ASM, "\n"); |
| 1939 | #endif | 1939 | #endif |
| 1940 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | 1940 | + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { |
| 1941 | qemu_log("IN:\n"); /* , lookup_symbol(pc_start)); */ | 1941 | qemu_log("IN:\n"); /* , lookup_symbol(pc_start)); */ |
| 1942 | log_target_disas(pc_start, ctx.pc - pc_start, 0); | 1942 | log_target_disas(pc_start, ctx.pc - pc_start, 0); |
| 1943 | qemu_log("\n"); | 1943 | qemu_log("\n"); |
target-sparc/op_helper.c
| @@ -2811,7 +2811,7 @@ void do_interrupt(CPUState *env) | @@ -2811,7 +2811,7 @@ void do_interrupt(CPUState *env) | ||
| 2811 | int intno = env->exception_index; | 2811 | int intno = env->exception_index; |
| 2812 | 2812 | ||
| 2813 | #ifdef DEBUG_PCALL | 2813 | #ifdef DEBUG_PCALL |
| 2814 | - if (loglevel & CPU_LOG_INT) { | 2814 | + if (qemu_loglevel_mask(CPU_LOG_INT)) { |
| 2815 | static int count; | 2815 | static int count; |
| 2816 | const char *name; | 2816 | const char *name; |
| 2817 | 2817 | ||
| @@ -2942,7 +2942,7 @@ void do_interrupt(CPUState *env) | @@ -2942,7 +2942,7 @@ void do_interrupt(CPUState *env) | ||
| 2942 | int cwp, intno = env->exception_index; | 2942 | int cwp, intno = env->exception_index; |
| 2943 | 2943 | ||
| 2944 | #ifdef DEBUG_PCALL | 2944 | #ifdef DEBUG_PCALL |
| 2945 | - if (loglevel & CPU_LOG_INT) { | 2945 | + if (qemu_loglevel_mask(CPU_LOG_INT)) { |
| 2946 | static int count; | 2946 | static int count; |
| 2947 | const char *name; | 2947 | const char *name; |
| 2948 | 2948 |
target-sparc/translate.c
| @@ -1933,7 +1933,7 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -1933,7 +1933,7 @@ static void disas_sparc_insn(DisasContext * dc) | ||
| 1933 | { | 1933 | { |
| 1934 | unsigned int insn, opc, rs1, rs2, rd; | 1934 | unsigned int insn, opc, rs1, rs2, rd; |
| 1935 | 1935 | ||
| 1936 | - if (unlikely(loglevel & CPU_LOG_TB_OP)) | 1936 | + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) |
| 1937 | tcg_gen_debug_insn_start(dc->pc); | 1937 | tcg_gen_debug_insn_start(dc->pc); |
| 1938 | insn = ldl_code(dc->pc); | 1938 | insn = ldl_code(dc->pc); |
| 1939 | opc = GET_FIELD(insn, 0, 1); | 1939 | opc = GET_FIELD(insn, 0, 1); |
| @@ -4905,7 +4905,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb, | @@ -4905,7 +4905,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb, | ||
| 4905 | tb->icount = num_insns; | 4905 | tb->icount = num_insns; |
| 4906 | } | 4906 | } |
| 4907 | #ifdef DEBUG_DISAS | 4907 | #ifdef DEBUG_DISAS |
| 4908 | - if (loglevel & CPU_LOG_TB_IN_ASM) { | 4908 | + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { |
| 4909 | qemu_log("--------------\n"); | 4909 | qemu_log("--------------\n"); |
| 4910 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); | 4910 | qemu_log("IN: %s\n", lookup_symbol(pc_start)); |
| 4911 | log_target_disas(pc_start, last_pc + 4 - pc_start, 0); | 4911 | log_target_disas(pc_start, last_pc + 4 - pc_start, 0); |
tcg/tcg.c
| @@ -1878,7 +1878,7 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, | @@ -1878,7 +1878,7 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, | ||
| 1878 | const TCGArg *args; | 1878 | const TCGArg *args; |
| 1879 | 1879 | ||
| 1880 | #ifdef DEBUG_DISAS | 1880 | #ifdef DEBUG_DISAS |
| 1881 | - if (unlikely(loglevel & CPU_LOG_TB_OP)) { | 1881 | + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { |
| 1882 | qemu_log("OP:\n"); | 1882 | qemu_log("OP:\n"); |
| 1883 | tcg_dump_ops(s, logfile); | 1883 | tcg_dump_ops(s, logfile); |
| 1884 | qemu_log("\n"); | 1884 | qemu_log("\n"); |
| @@ -1894,7 +1894,7 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, | @@ -1894,7 +1894,7 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, | ||
| 1894 | #endif | 1894 | #endif |
| 1895 | 1895 | ||
| 1896 | #ifdef DEBUG_DISAS | 1896 | #ifdef DEBUG_DISAS |
| 1897 | - if (unlikely(loglevel & CPU_LOG_TB_OP_OPT)) { | 1897 | + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { |
| 1898 | qemu_log("OP after la:\n"); | 1898 | qemu_log("OP after la:\n"); |
| 1899 | tcg_dump_ops(s, logfile); | 1899 | tcg_dump_ops(s, logfile); |
| 1900 | qemu_log("\n"); | 1900 | qemu_log("\n"); |
translate-all.c
| @@ -127,7 +127,7 @@ int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr) | @@ -127,7 +127,7 @@ int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr) | ||
| 127 | #endif | 127 | #endif |
| 128 | 128 | ||
| 129 | #ifdef DEBUG_DISAS | 129 | #ifdef DEBUG_DISAS |
| 130 | - if (loglevel & CPU_LOG_TB_OUT_ASM) { | 130 | + if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { |
| 131 | qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr); | 131 | qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr); |
| 132 | log_disas(tb->tc_ptr, *gen_code_size_ptr); | 132 | log_disas(tb->tc_ptr, *gen_code_size_ptr); |
| 133 | qemu_log("\n"); | 133 | qemu_log("\n"); |