Commit 8f577d3d29996ad5c60ac6419881557183806d8b
1 parent
dbe7fb91
Enable all alignment checks
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3404 c046a42c-6fe2-441c-8c8c-71466251a162
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5 additions
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48 deletions
target-sparc/translate.c
@@ -346,13 +346,6 @@ GEN32(gen_op_load_fpr_DT1, gen_op_load_fpr_DT1_fprf); | @@ -346,13 +346,6 @@ GEN32(gen_op_load_fpr_DT1, gen_op_load_fpr_DT1_fprf); | ||
346 | GEN32(gen_op_store_DT0_fpr, gen_op_store_DT0_fpr_fprf); | 346 | GEN32(gen_op_store_DT0_fpr, gen_op_store_DT0_fpr_fprf); |
347 | GEN32(gen_op_store_DT1_fpr, gen_op_store_DT1_fpr_fprf); | 347 | GEN32(gen_op_store_DT1_fpr, gen_op_store_DT1_fpr_fprf); |
348 | 348 | ||
349 | -#ifdef ALIGN_7_BUGS_FIXED | ||
350 | -#else | ||
351 | -#ifndef CONFIG_USER_ONLY | ||
352 | -#define gen_op_check_align_T0_7() | ||
353 | -#endif | ||
354 | -#endif | ||
355 | - | ||
356 | /* moves */ | 349 | /* moves */ |
357 | #ifdef CONFIG_USER_ONLY | 350 | #ifdef CONFIG_USER_ONLY |
358 | #define supervisor(dc) 0 | 351 | #define supervisor(dc) 0 |
@@ -2941,9 +2934,7 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -2941,9 +2934,7 @@ static void disas_sparc_insn(DisasContext * dc) | ||
2941 | (xop > 0x2c && xop <= 0x33) || xop == 0x1f || xop == 0x3d) { | 2934 | (xop > 0x2c && xop <= 0x33) || xop == 0x1f || xop == 0x3d) { |
2942 | switch (xop) { | 2935 | switch (xop) { |
2943 | case 0x0: /* load word */ | 2936 | case 0x0: /* load word */ |
2944 | -#ifdef CONFIG_USER_ONLY | ||
2945 | gen_op_check_align_T0_3(); | 2937 | gen_op_check_align_T0_3(); |
2946 | -#endif | ||
2947 | #ifndef TARGET_SPARC64 | 2938 | #ifndef TARGET_SPARC64 |
2948 | gen_op_ldst(ld); | 2939 | gen_op_ldst(ld); |
2949 | #else | 2940 | #else |
@@ -2954,15 +2945,13 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -2954,15 +2945,13 @@ static void disas_sparc_insn(DisasContext * dc) | ||
2954 | gen_op_ldst(ldub); | 2945 | gen_op_ldst(ldub); |
2955 | break; | 2946 | break; |
2956 | case 0x2: /* load unsigned halfword */ | 2947 | case 0x2: /* load unsigned halfword */ |
2957 | -#ifdef CONFIG_USER_ONLY | ||
2958 | gen_op_check_align_T0_1(); | 2948 | gen_op_check_align_T0_1(); |
2959 | -#endif | ||
2960 | gen_op_ldst(lduh); | 2949 | gen_op_ldst(lduh); |
2961 | break; | 2950 | break; |
2962 | case 0x3: /* load double word */ | 2951 | case 0x3: /* load double word */ |
2963 | - gen_op_check_align_T0_7(); | ||
2964 | if (rd & 1) | 2952 | if (rd & 1) |
2965 | goto illegal_insn; | 2953 | goto illegal_insn; |
2954 | + gen_op_check_align_T0_7(); | ||
2966 | gen_op_ldst(ldd); | 2955 | gen_op_ldst(ldd); |
2967 | gen_movl_T0_reg(rd + 1); | 2956 | gen_movl_T0_reg(rd + 1); |
2968 | break; | 2957 | break; |
@@ -2970,18 +2959,14 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -2970,18 +2959,14 @@ static void disas_sparc_insn(DisasContext * dc) | ||
2970 | gen_op_ldst(ldsb); | 2959 | gen_op_ldst(ldsb); |
2971 | break; | 2960 | break; |
2972 | case 0xa: /* load signed halfword */ | 2961 | case 0xa: /* load signed halfword */ |
2973 | -#ifdef CONFIG_USER_ONLY | ||
2974 | gen_op_check_align_T0_1(); | 2962 | gen_op_check_align_T0_1(); |
2975 | -#endif | ||
2976 | gen_op_ldst(ldsh); | 2963 | gen_op_ldst(ldsh); |
2977 | break; | 2964 | break; |
2978 | case 0xd: /* ldstub -- XXX: should be atomically */ | 2965 | case 0xd: /* ldstub -- XXX: should be atomically */ |
2979 | gen_op_ldst(ldstub); | 2966 | gen_op_ldst(ldstub); |
2980 | break; | 2967 | break; |
2981 | case 0x0f: /* swap register with memory. Also atomically */ | 2968 | case 0x0f: /* swap register with memory. Also atomically */ |
2982 | -#ifdef CONFIG_USER_ONLY | ||
2983 | gen_op_check_align_T0_3(); | 2969 | gen_op_check_align_T0_3(); |
2984 | -#endif | ||
2985 | gen_movl_reg_T1(rd); | 2970 | gen_movl_reg_T1(rd); |
2986 | gen_op_ldst(swap); | 2971 | gen_op_ldst(swap); |
2987 | break; | 2972 | break; |
@@ -2992,9 +2977,8 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -2992,9 +2977,8 @@ static void disas_sparc_insn(DisasContext * dc) | ||
2992 | goto illegal_insn; | 2977 | goto illegal_insn; |
2993 | if (!supervisor(dc)) | 2978 | if (!supervisor(dc)) |
2994 | goto priv_insn; | 2979 | goto priv_insn; |
2995 | -#elif CONFIG_USER_ONLY | ||
2996 | - gen_op_check_align_T0_3(); | ||
2997 | #endif | 2980 | #endif |
2981 | + gen_op_check_align_T0_3(); | ||
2998 | gen_ld_asi(insn, 4, 0); | 2982 | gen_ld_asi(insn, 4, 0); |
2999 | break; | 2983 | break; |
3000 | case 0x11: /* load unsigned byte alternate */ | 2984 | case 0x11: /* load unsigned byte alternate */ |
@@ -3012,9 +2996,8 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3012,9 +2996,8 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3012 | goto illegal_insn; | 2996 | goto illegal_insn; |
3013 | if (!supervisor(dc)) | 2997 | if (!supervisor(dc)) |
3014 | goto priv_insn; | 2998 | goto priv_insn; |
3015 | -#elif CONFIG_USER_ONLY | ||
3016 | - gen_op_check_align_T0_1(); | ||
3017 | #endif | 2999 | #endif |
3000 | + gen_op_check_align_T0_1(); | ||
3018 | gen_ld_asi(insn, 2, 0); | 3001 | gen_ld_asi(insn, 2, 0); |
3019 | break; | 3002 | break; |
3020 | case 0x13: /* load double word alternate */ | 3003 | case 0x13: /* load double word alternate */ |
@@ -3045,9 +3028,8 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3045,9 +3028,8 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3045 | goto illegal_insn; | 3028 | goto illegal_insn; |
3046 | if (!supervisor(dc)) | 3029 | if (!supervisor(dc)) |
3047 | goto priv_insn; | 3030 | goto priv_insn; |
3048 | -#elif CONFIG_USER_ONLY | ||
3049 | - gen_op_check_align_T0_1(); | ||
3050 | #endif | 3031 | #endif |
3032 | + gen_op_check_align_T0_1(); | ||
3051 | gen_ld_asi(insn, 2, 1); | 3033 | gen_ld_asi(insn, 2, 1); |
3052 | break; | 3034 | break; |
3053 | case 0x1d: /* ldstuba -- XXX: should be atomically */ | 3035 | case 0x1d: /* ldstuba -- XXX: should be atomically */ |
@@ -3065,9 +3047,8 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3065,9 +3047,8 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3065 | goto illegal_insn; | 3047 | goto illegal_insn; |
3066 | if (!supervisor(dc)) | 3048 | if (!supervisor(dc)) |
3067 | goto priv_insn; | 3049 | goto priv_insn; |
3068 | -#elif CONFIG_USER_ONLY | ||
3069 | - gen_op_check_align_T0_3(); | ||
3070 | #endif | 3050 | #endif |
3051 | + gen_op_check_align_T0_3(); | ||
3071 | gen_movl_reg_T1(rd); | 3052 | gen_movl_reg_T1(rd); |
3072 | gen_swap_asi(insn); | 3053 | gen_swap_asi(insn); |
3073 | break; | 3054 | break; |
@@ -3081,9 +3062,7 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3081,9 +3062,7 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3081 | #endif | 3062 | #endif |
3082 | #ifdef TARGET_SPARC64 | 3063 | #ifdef TARGET_SPARC64 |
3083 | case 0x08: /* V9 ldsw */ | 3064 | case 0x08: /* V9 ldsw */ |
3084 | -#ifdef CONFIG_USER_ONLY | ||
3085 | gen_op_check_align_T0_3(); | 3065 | gen_op_check_align_T0_3(); |
3086 | -#endif | ||
3087 | gen_op_ldst(ldsw); | 3066 | gen_op_ldst(ldsw); |
3088 | break; | 3067 | break; |
3089 | case 0x0b: /* V9 ldx */ | 3068 | case 0x0b: /* V9 ldx */ |
@@ -3091,9 +3070,7 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3091,9 +3070,7 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3091 | gen_op_ldst(ldx); | 3070 | gen_op_ldst(ldx); |
3092 | break; | 3071 | break; |
3093 | case 0x18: /* V9 ldswa */ | 3072 | case 0x18: /* V9 ldswa */ |
3094 | -#ifdef CONFIG_USER_ONLY | ||
3095 | gen_op_check_align_T0_3(); | 3073 | gen_op_check_align_T0_3(); |
3096 | -#endif | ||
3097 | gen_ld_asi(insn, 4, 1); | 3074 | gen_ld_asi(insn, 4, 1); |
3098 | break; | 3075 | break; |
3099 | case 0x1b: /* V9 ldxa */ | 3076 | case 0x1b: /* V9 ldxa */ |
@@ -3103,9 +3080,7 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3103,9 +3080,7 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3103 | case 0x2d: /* V9 prefetch, no effect */ | 3080 | case 0x2d: /* V9 prefetch, no effect */ |
3104 | goto skip_move; | 3081 | goto skip_move; |
3105 | case 0x30: /* V9 ldfa */ | 3082 | case 0x30: /* V9 ldfa */ |
3106 | -#ifdef CONFIG_USER_ONLY | ||
3107 | gen_op_check_align_T0_3(); | 3083 | gen_op_check_align_T0_3(); |
3108 | -#endif | ||
3109 | gen_ldf_asi(insn, 4); | 3084 | gen_ldf_asi(insn, 4); |
3110 | goto skip_move; | 3085 | goto skip_move; |
3111 | case 0x33: /* V9 lddfa */ | 3086 | case 0x33: /* V9 lddfa */ |
@@ -3129,16 +3104,12 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3129,16 +3104,12 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3129 | goto jmp_insn; | 3104 | goto jmp_insn; |
3130 | switch (xop) { | 3105 | switch (xop) { |
3131 | case 0x20: /* load fpreg */ | 3106 | case 0x20: /* load fpreg */ |
3132 | -#ifdef CONFIG_USER_ONLY | ||
3133 | gen_op_check_align_T0_3(); | 3107 | gen_op_check_align_T0_3(); |
3134 | -#endif | ||
3135 | gen_op_ldst(ldf); | 3108 | gen_op_ldst(ldf); |
3136 | gen_op_store_FT0_fpr(rd); | 3109 | gen_op_store_FT0_fpr(rd); |
3137 | break; | 3110 | break; |
3138 | case 0x21: /* load fsr */ | 3111 | case 0x21: /* load fsr */ |
3139 | -#ifdef CONFIG_USER_ONLY | ||
3140 | gen_op_check_align_T0_3(); | 3112 | gen_op_check_align_T0_3(); |
3141 | -#endif | ||
3142 | gen_op_ldst(ldf); | 3113 | gen_op_ldst(ldf); |
3143 | gen_op_ldfsr(); | 3114 | gen_op_ldfsr(); |
3144 | break; | 3115 | break; |
@@ -3157,18 +3128,14 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3157,18 +3128,14 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3157 | gen_movl_reg_T1(rd); | 3128 | gen_movl_reg_T1(rd); |
3158 | switch (xop) { | 3129 | switch (xop) { |
3159 | case 0x4: | 3130 | case 0x4: |
3160 | -#ifdef CONFIG_USER_ONLY | ||
3161 | gen_op_check_align_T0_3(); | 3131 | gen_op_check_align_T0_3(); |
3162 | -#endif | ||
3163 | gen_op_ldst(st); | 3132 | gen_op_ldst(st); |
3164 | break; | 3133 | break; |
3165 | case 0x5: | 3134 | case 0x5: |
3166 | gen_op_ldst(stb); | 3135 | gen_op_ldst(stb); |
3167 | break; | 3136 | break; |
3168 | case 0x6: | 3137 | case 0x6: |
3169 | -#ifdef CONFIG_USER_ONLY | ||
3170 | gen_op_check_align_T0_1(); | 3138 | gen_op_check_align_T0_1(); |
3171 | -#endif | ||
3172 | gen_op_ldst(sth); | 3139 | gen_op_ldst(sth); |
3173 | break; | 3140 | break; |
3174 | case 0x7: | 3141 | case 0x7: |
@@ -3187,9 +3154,7 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3187,9 +3154,7 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3187 | if (!supervisor(dc)) | 3154 | if (!supervisor(dc)) |
3188 | goto priv_insn; | 3155 | goto priv_insn; |
3189 | #endif | 3156 | #endif |
3190 | -#ifdef CONFIG_USER_ONLY | ||
3191 | gen_op_check_align_T0_3(); | 3157 | gen_op_check_align_T0_3(); |
3192 | -#endif | ||
3193 | gen_st_asi(insn, 4); | 3158 | gen_st_asi(insn, 4); |
3194 | break; | 3159 | break; |
3195 | case 0x15: | 3160 | case 0x15: |
@@ -3208,9 +3173,7 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3208,9 +3173,7 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3208 | if (!supervisor(dc)) | 3173 | if (!supervisor(dc)) |
3209 | goto priv_insn; | 3174 | goto priv_insn; |
3210 | #endif | 3175 | #endif |
3211 | -#ifdef CONFIG_USER_ONLY | ||
3212 | gen_op_check_align_T0_1(); | 3176 | gen_op_check_align_T0_1(); |
3213 | -#endif | ||
3214 | gen_st_asi(insn, 2); | 3177 | gen_st_asi(insn, 2); |
3215 | break; | 3178 | break; |
3216 | case 0x17: | 3179 | case 0x17: |
@@ -3246,9 +3209,7 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3246,9 +3209,7 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3246 | goto jmp_insn; | 3209 | goto jmp_insn; |
3247 | switch (xop) { | 3210 | switch (xop) { |
3248 | case 0x24: | 3211 | case 0x24: |
3249 | -#ifdef CONFIG_USER_ONLY | ||
3250 | gen_op_check_align_T0_3(); | 3212 | gen_op_check_align_T0_3(); |
3251 | -#endif | ||
3252 | gen_op_load_fpr_FT0(rd); | 3213 | gen_op_load_fpr_FT0(rd); |
3253 | gen_op_ldst(stf); | 3214 | gen_op_ldst(stf); |
3254 | break; | 3215 | break; |
@@ -3279,9 +3240,7 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3279,9 +3240,7 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3279 | switch (xop) { | 3240 | switch (xop) { |
3280 | #ifdef TARGET_SPARC64 | 3241 | #ifdef TARGET_SPARC64 |
3281 | case 0x34: /* V9 stfa */ | 3242 | case 0x34: /* V9 stfa */ |
3282 | -#ifdef CONFIG_USER_ONLY | ||
3283 | gen_op_check_align_T0_3(); | 3243 | gen_op_check_align_T0_3(); |
3284 | -#endif | ||
3285 | gen_op_load_fpr_FT0(rd); | 3244 | gen_op_load_fpr_FT0(rd); |
3286 | gen_stf_asi(insn, 4); | 3245 | gen_stf_asi(insn, 4); |
3287 | break; | 3246 | break; |
@@ -3291,9 +3250,7 @@ static void disas_sparc_insn(DisasContext * dc) | @@ -3291,9 +3250,7 @@ static void disas_sparc_insn(DisasContext * dc) | ||
3291 | gen_stf_asi(insn, 8); | 3250 | gen_stf_asi(insn, 8); |
3292 | break; | 3251 | break; |
3293 | case 0x3c: /* V9 casa */ | 3252 | case 0x3c: /* V9 casa */ |
3294 | -#ifdef CONFIG_USER_ONLY | ||
3295 | gen_op_check_align_T0_3(); | 3253 | gen_op_check_align_T0_3(); |
3296 | -#endif | ||
3297 | flush_T2(dc); | 3254 | flush_T2(dc); |
3298 | gen_movl_reg_T2(rd); | 3255 | gen_movl_reg_T2(rd); |
3299 | gen_cas_asi(insn); | 3256 | gen_cas_asi(insn); |