Commit 8e33c08c84b9f418dee69f79e7b579c59e77814b
1 parent
197ea35a
MIPS FPU support for the gdb stub, by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2242 c046a42c-6fe2-441c-8c8c-71466251a162
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gdbstub.c
@@ -532,11 +532,37 @@ static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | @@ -532,11 +532,37 @@ static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | ||
532 | *(uint32_t *)ptr = tswapl(env->PC); | 532 | *(uint32_t *)ptr = tswapl(env->PC); |
533 | ptr += 4; | 533 | ptr += 4; |
534 | 534 | ||
535 | +#ifdef MIPS_USES_FPU | ||
536 | + for (i = 0; i < 32; i++) | ||
537 | + { | ||
538 | + *(uint32_t *)ptr = tswapl(FPR_W (env, i)); | ||
539 | + ptr += 4; | ||
540 | + } | ||
541 | + | ||
542 | + *(uint32_t *)ptr = tswapl(env->fcr31); | ||
543 | + ptr += 4; | ||
544 | + | ||
545 | + *(uint32_t *)ptr = tswapl(env->fcr0); | ||
546 | + ptr += 4; | ||
547 | +#endif | ||
548 | + | ||
535 | /* 32 FP registers, fsr, fir, fp. Not yet implemented. */ | 549 | /* 32 FP registers, fsr, fir, fp. Not yet implemented. */ |
550 | + /* what's 'fp' mean here? */ | ||
536 | 551 | ||
537 | return ptr - mem_buf; | 552 | return ptr - mem_buf; |
538 | } | 553 | } |
539 | 554 | ||
555 | +/* convert MIPS rounding mode in FCR31 to IEEE library */ | ||
556 | +static unsigned int ieee_rm[] = | ||
557 | + { | ||
558 | + float_round_nearest_even, | ||
559 | + float_round_to_zero, | ||
560 | + float_round_up, | ||
561 | + float_round_down | ||
562 | + }; | ||
563 | +#define RESTORE_ROUNDING_MODE \ | ||
564 | + set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status) | ||
565 | + | ||
540 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | 566 | static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) |
541 | { | 567 | { |
542 | int i; | 568 | int i; |
@@ -566,6 +592,28 @@ static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | @@ -566,6 +592,28 @@ static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) | ||
566 | 592 | ||
567 | env->PC = tswapl(*(uint32_t *)ptr); | 593 | env->PC = tswapl(*(uint32_t *)ptr); |
568 | ptr += 4; | 594 | ptr += 4; |
595 | + | ||
596 | +#ifdef MIPS_USES_FPU | ||
597 | + for (i = 0; i < 32; i++) | ||
598 | + { | ||
599 | + FPR_W (env, i) = tswapl(*(uint32_t *)ptr); | ||
600 | + ptr += 4; | ||
601 | + } | ||
602 | + | ||
603 | + env->fcr31 = tswapl(*(uint32_t *)ptr) & 0x0183FFFF; | ||
604 | + ptr += 4; | ||
605 | + | ||
606 | + env->fcr0 = tswapl(*(uint32_t *)ptr); | ||
607 | + ptr += 4; | ||
608 | + | ||
609 | + /* set rounding mode */ | ||
610 | + RESTORE_ROUNDING_MODE; | ||
611 | + | ||
612 | +#ifndef CONFIG_SOFTFLOAT | ||
613 | + /* no floating point exception for native float */ | ||
614 | + SET_FP_ENABLE(env->fcr31, 0); | ||
615 | +#endif | ||
616 | +#endif | ||
569 | } | 617 | } |
570 | #elif defined (TARGET_SH4) | 618 | #elif defined (TARGET_SH4) |
571 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | 619 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |