gwj / at91sam9263 · Commits

Commit 8e27dd6f09df9ca028edffae5df5b562d9d40cae

Authored by aurel32
1 parent d6a46fe8

Add GEN_VXFORM macro for subsequent instructions. 

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6154 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 17 additions and 0 deletions
target-ppc/translate.c
  View file @8e27dd6
... ... @@ -6164,6 +6164,23 @@ GEN_VX_LOGICAL(vor, tcg_gen_or_i64, 2, 18);
6164 6164 GEN_VX_LOGICAL(vxor, tcg_gen_xor_i64, 2, 19);
6165 6165 GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 2, 20);
6166 6166  
  6167 +#define GEN_VXFORM(name, opc2, opc3) \
  6168 +GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \
  6169 +{ \
  6170 + TCGv_ptr ra, rb, rd; \
  6171 + if (unlikely(!ctx->altivec_enabled)) { \
  6172 + gen_exception(ctx, POWERPC_EXCP_VPU); \
  6173 + return; \
  6174 + } \
  6175 + ra = gen_avr_ptr(rA(ctx->opcode)); \
  6176 + rb = gen_avr_ptr(rB(ctx->opcode)); \
  6177 + rd = gen_avr_ptr(rD(ctx->opcode)); \
  6178 + gen_helper_##name (rd, ra, rb); \
  6179 + tcg_temp_free_ptr(ra); \
  6180 + tcg_temp_free_ptr(rb); \
  6181 + tcg_temp_free_ptr(rd); \
  6182 +}
  6183 +
6167 6184 /*** SPE extension ***/
6168 6185 /* Register moves */
6169 6186  
... ...