gwj / at91sam9263 · Commits

Commit 8df1ca4ba51fc3bfccc3d901584b316ae2e60bb9

Authored by ths
1 parent 9843a0d2

Allocate register pair for 64-bit registers on 32-bit host. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4730 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 2 additions and 2 deletions
tcg/tcg.c
  View file @8df1ca4
... ... @@ -423,7 +423,7 @@ TCGv tcg_temp_new_internal(TCGType type, int temp_local)
423 423 idx = s->nb_temps;
424 424 #if TCG_TARGET_REG_BITS == 32
425 425 if (type == TCG_TYPE_I64) {
426   - tcg_temp_alloc(s, s->nb_temps + 1);
  426 + tcg_temp_alloc(s, s->nb_temps + 2);
427 427 ts = &s->temps[s->nb_temps];
428 428 ts->base_type = type;
429 429 ts->type = TCG_TYPE_I32;
... ... @@ -1961,7 +1961,7 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
1961 1961 break;
1962 1962 }
1963 1963 args += def->nb_args;
1964   - next: ;
  1964 + next:
1965 1965 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
1966 1966 return op_index;
1967 1967 }
... ...