Commit 8b67546f65bb3de81ac4cbe02460ec99c0ec6229
1 parent
7ec93196
More PowerPC target cleanups:
- remove unuseful historical macros and definitions - fix comments (bugs and cosmetics) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3185 c046a42c-6fe2-441c-8c8c-71466251a162
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35 additions
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38 deletions
target-ppc/cpu.h
... | ... | @@ -30,7 +30,7 @@ typedef uint64_t ppc_gpr_t; |
30 | 30 | #define REGX "%016" PRIx64 |
31 | 31 | #define TARGET_PAGE_BITS 12 |
32 | 32 | #elif defined(TARGET_PPCEMB) |
33 | -/* e500v2 have 36 bits physical address space */ | |
33 | +/* BookE have 36 bits physical address space */ | |
34 | 34 | #define TARGET_PHYS_ADDR_BITS 64 |
35 | 35 | /* GPR are 64 bits: used by vector extension */ |
36 | 36 | typedef uint64_t ppc_gpr_t; |
... | ... | @@ -388,19 +388,19 @@ enum { |
388 | 388 | PPC_64_BRIDGE = 0x0000000004000000ULL, |
389 | 389 | /* BookE (embedded) PowerPC specification */ |
390 | 390 | PPC_BOOKE = 0x0000000008000000ULL, |
391 | - /* eieio */ | |
391 | + /* eieio */ | |
392 | 392 | PPC_MEM_EIEIO = 0x0000000010000000ULL, |
393 | - /* e500 vector instructions */ | |
393 | + /* e500 vector instructions */ | |
394 | 394 | PPC_E500_VECTOR = 0x0000000020000000ULL, |
395 | - /* PowerPC 4xx dedicated instructions */ | |
395 | + /* PowerPC 4xx dedicated instructions */ | |
396 | 396 | PPC_4xx_COMMON = 0x0000000040000000ULL, |
397 | - /* PowerPC 2.03 specification extensions */ | |
397 | + /* PowerPC 2.03 specification extensions */ | |
398 | 398 | PPC_203 = 0x0000000080000000ULL, |
399 | - /* PowerPC 2.03 SPE extension */ | |
399 | + /* PowerPC 2.03 SPE extension */ | |
400 | 400 | PPC_SPE = 0x0000000100000000ULL, |
401 | - /* PowerPC 2.03 SPE floating-point extension */ | |
401 | + /* PowerPC 2.03 SPE floating-point extension */ | |
402 | 402 | PPC_SPEFPU = 0x0000000200000000ULL, |
403 | - /* SLB management */ | |
403 | + /* SLB management */ | |
404 | 404 | PPC_SLBI = 0x0000000400000000ULL, |
405 | 405 | }; |
406 | 406 | |
... | ... | @@ -917,8 +917,6 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val); |
917 | 917 | |
918 | 918 | /*****************************************************************************/ |
919 | 919 | /* Registers definitions */ |
920 | -#define ugpr(n) (env->gpr[n]) | |
921 | - | |
922 | 920 | #define XER_SO 31 |
923 | 921 | #define XER_OV 30 |
924 | 922 | #define XER_CA 29 |
... | ... | @@ -1315,7 +1313,6 @@ enum { |
1315 | 1313 | /* may change privilege level */ |
1316 | 1314 | #define EXCP_BRANCH 0x11001 /* branch instruction */ |
1317 | 1315 | #define EXCP_SYSCALL_USER 0x12000 /* System call in user mode only */ |
1318 | -#define EXCP_INTERRUPT_CRITICAL 0x13000 /* critical IRQ */ | |
1319 | 1316 | |
1320 | 1317 | /* Error codes */ |
1321 | 1318 | enum { |
... | ... | @@ -1350,8 +1347,8 @@ enum { |
1350 | 1347 | EXCP_INVAL_FP = 0x04, /* Unimplemented mandatory fp instr */ |
1351 | 1348 | /* Privileged instruction */ |
1352 | 1349 | EXCP_PRIV = 0x30, |
1353 | - EXCP_PRIV_OPC = 0x01, | |
1354 | - EXCP_PRIV_REG = 0x02, | |
1350 | + EXCP_PRIV_OPC = 0x01, /* Privileged operation exception */ | |
1351 | + EXCP_PRIV_REG = 0x02, /* Privileged register exception */ | |
1355 | 1352 | /* Trap */ |
1356 | 1353 | EXCP_TRAP = 0x40, |
1357 | 1354 | }; | ... | ... |
target-ppc/op_helper_mem.h
... | ... | @@ -37,7 +37,7 @@ static inline void glue(st32r, MEMSUFFIX) (target_ulong EA, target_ulong data) |
37 | 37 | void glue(do_lmw, MEMSUFFIX) (int dst) |
38 | 38 | { |
39 | 39 | for (; dst < 32; dst++, T0 += 4) { |
40 | - ugpr(dst) = glue(ldl, MEMSUFFIX)((uint32_t)T0); | |
40 | + env->gpr[dst] = glue(ldl, MEMSUFFIX)((uint32_t)T0); | |
41 | 41 | } |
42 | 42 | } |
43 | 43 | |
... | ... | @@ -45,7 +45,7 @@ void glue(do_lmw, MEMSUFFIX) (int dst) |
45 | 45 | void glue(do_lmw_64, MEMSUFFIX) (int dst) |
46 | 46 | { |
47 | 47 | for (; dst < 32; dst++, T0 += 4) { |
48 | - ugpr(dst) = glue(ldl, MEMSUFFIX)((uint64_t)T0); | |
48 | + env->gpr[dst] = glue(ldl, MEMSUFFIX)((uint64_t)T0); | |
49 | 49 | } |
50 | 50 | } |
51 | 51 | #endif |
... | ... | @@ -53,7 +53,7 @@ void glue(do_lmw_64, MEMSUFFIX) (int dst) |
53 | 53 | void glue(do_stmw, MEMSUFFIX) (int src) |
54 | 54 | { |
55 | 55 | for (; src < 32; src++, T0 += 4) { |
56 | - glue(stl, MEMSUFFIX)((uint32_t)T0, ugpr(src)); | |
56 | + glue(stl, MEMSUFFIX)((uint32_t)T0, env->gpr[src]); | |
57 | 57 | } |
58 | 58 | } |
59 | 59 | |
... | ... | @@ -61,7 +61,7 @@ void glue(do_stmw, MEMSUFFIX) (int src) |
61 | 61 | void glue(do_stmw_64, MEMSUFFIX) (int src) |
62 | 62 | { |
63 | 63 | for (; src < 32; src++, T0 += 4) { |
64 | - glue(stl, MEMSUFFIX)((uint64_t)T0, ugpr(src)); | |
64 | + glue(stl, MEMSUFFIX)((uint64_t)T0, env->gpr[src]); | |
65 | 65 | } |
66 | 66 | } |
67 | 67 | #endif |
... | ... | @@ -69,7 +69,7 @@ void glue(do_stmw_64, MEMSUFFIX) (int src) |
69 | 69 | void glue(do_lmw_le, MEMSUFFIX) (int dst) |
70 | 70 | { |
71 | 71 | for (; dst < 32; dst++, T0 += 4) { |
72 | - ugpr(dst) = glue(ld32r, MEMSUFFIX)((uint32_t)T0); | |
72 | + env->gpr[dst] = glue(ld32r, MEMSUFFIX)((uint32_t)T0); | |
73 | 73 | } |
74 | 74 | } |
75 | 75 | |
... | ... | @@ -77,7 +77,7 @@ void glue(do_lmw_le, MEMSUFFIX) (int dst) |
77 | 77 | void glue(do_lmw_le_64, MEMSUFFIX) (int dst) |
78 | 78 | { |
79 | 79 | for (; dst < 32; dst++, T0 += 4) { |
80 | - ugpr(dst) = glue(ld32r, MEMSUFFIX)((uint64_t)T0); | |
80 | + env->gpr[dst] = glue(ld32r, MEMSUFFIX)((uint64_t)T0); | |
81 | 81 | } |
82 | 82 | } |
83 | 83 | #endif |
... | ... | @@ -85,7 +85,7 @@ void glue(do_lmw_le_64, MEMSUFFIX) (int dst) |
85 | 85 | void glue(do_stmw_le, MEMSUFFIX) (int src) |
86 | 86 | { |
87 | 87 | for (; src < 32; src++, T0 += 4) { |
88 | - glue(st32r, MEMSUFFIX)((uint32_t)T0, ugpr(src)); | |
88 | + glue(st32r, MEMSUFFIX)((uint32_t)T0, env->gpr[src]); | |
89 | 89 | } |
90 | 90 | } |
91 | 91 | |
... | ... | @@ -93,7 +93,7 @@ void glue(do_stmw_le, MEMSUFFIX) (int src) |
93 | 93 | void glue(do_stmw_le_64, MEMSUFFIX) (int src) |
94 | 94 | { |
95 | 95 | for (; src < 32; src++, T0 += 4) { |
96 | - glue(st32r, MEMSUFFIX)((uint64_t)T0, ugpr(src)); | |
96 | + glue(st32r, MEMSUFFIX)((uint64_t)T0, env->gpr[src]); | |
97 | 97 | } |
98 | 98 | } |
99 | 99 | #endif |
... | ... | @@ -104,7 +104,7 @@ void glue(do_lsw, MEMSUFFIX) (int dst) |
104 | 104 | int sh; |
105 | 105 | |
106 | 106 | for (; T1 > 3; T1 -= 4, T0 += 4) { |
107 | - ugpr(dst++) = glue(ldl, MEMSUFFIX)((uint32_t)T0); | |
107 | + env->gpr[dst++] = glue(ldl, MEMSUFFIX)((uint32_t)T0); | |
108 | 108 | if (unlikely(dst == 32)) |
109 | 109 | dst = 0; |
110 | 110 | } |
... | ... | @@ -113,7 +113,7 @@ void glue(do_lsw, MEMSUFFIX) (int dst) |
113 | 113 | for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) { |
114 | 114 | tmp |= glue(ldub, MEMSUFFIX)((uint32_t)T0) << sh; |
115 | 115 | } |
116 | - ugpr(dst) = tmp; | |
116 | + env->gpr[dst] = tmp; | |
117 | 117 | } |
118 | 118 | } |
119 | 119 | |
... | ... | @@ -124,7 +124,7 @@ void glue(do_lsw_64, MEMSUFFIX) (int dst) |
124 | 124 | int sh; |
125 | 125 | |
126 | 126 | for (; T1 > 3; T1 -= 4, T0 += 4) { |
127 | - ugpr(dst++) = glue(ldl, MEMSUFFIX)((uint64_t)T0); | |
127 | + env->gpr[dst++] = glue(ldl, MEMSUFFIX)((uint64_t)T0); | |
128 | 128 | if (unlikely(dst == 32)) |
129 | 129 | dst = 0; |
130 | 130 | } |
... | ... | @@ -133,7 +133,7 @@ void glue(do_lsw_64, MEMSUFFIX) (int dst) |
133 | 133 | for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) { |
134 | 134 | tmp |= glue(ldub, MEMSUFFIX)((uint64_t)T0) << sh; |
135 | 135 | } |
136 | - ugpr(dst) = tmp; | |
136 | + env->gpr[dst] = tmp; | |
137 | 137 | } |
138 | 138 | } |
139 | 139 | #endif |
... | ... | @@ -143,13 +143,13 @@ void glue(do_stsw, MEMSUFFIX) (int src) |
143 | 143 | int sh; |
144 | 144 | |
145 | 145 | for (; T1 > 3; T1 -= 4, T0 += 4) { |
146 | - glue(stl, MEMSUFFIX)((uint32_t)T0, ugpr(src++)); | |
146 | + glue(stl, MEMSUFFIX)((uint32_t)T0, env->gpr[src++]); | |
147 | 147 | if (unlikely(src == 32)) |
148 | 148 | src = 0; |
149 | 149 | } |
150 | 150 | if (unlikely(T1 != 0)) { |
151 | 151 | for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) |
152 | - glue(stb, MEMSUFFIX)((uint32_t)T0, (ugpr(src) >> sh) & 0xFF); | |
152 | + glue(stb, MEMSUFFIX)((uint32_t)T0, (env->gpr[src] >> sh) & 0xFF); | |
153 | 153 | } |
154 | 154 | } |
155 | 155 | |
... | ... | @@ -159,13 +159,13 @@ void glue(do_stsw_64, MEMSUFFIX) (int src) |
159 | 159 | int sh; |
160 | 160 | |
161 | 161 | for (; T1 > 3; T1 -= 4, T0 += 4) { |
162 | - glue(stl, MEMSUFFIX)((uint64_t)T0, ugpr(src++)); | |
162 | + glue(stl, MEMSUFFIX)((uint64_t)T0, env->gpr[src++]); | |
163 | 163 | if (unlikely(src == 32)) |
164 | 164 | src = 0; |
165 | 165 | } |
166 | 166 | if (unlikely(T1 != 0)) { |
167 | 167 | for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) |
168 | - glue(stb, MEMSUFFIX)((uint64_t)T0, (ugpr(src) >> sh) & 0xFF); | |
168 | + glue(stb, MEMSUFFIX)((uint64_t)T0, (env->gpr[src] >> sh) & 0xFF); | |
169 | 169 | } |
170 | 170 | } |
171 | 171 | #endif |
... | ... | @@ -176,7 +176,7 @@ void glue(do_lsw_le, MEMSUFFIX) (int dst) |
176 | 176 | int sh; |
177 | 177 | |
178 | 178 | for (; T1 > 3; T1 -= 4, T0 += 4) { |
179 | - ugpr(dst++) = glue(ld32r, MEMSUFFIX)((uint32_t)T0); | |
179 | + env->gpr[dst++] = glue(ld32r, MEMSUFFIX)((uint32_t)T0); | |
180 | 180 | if (unlikely(dst == 32)) |
181 | 181 | dst = 0; |
182 | 182 | } |
... | ... | @@ -185,7 +185,7 @@ void glue(do_lsw_le, MEMSUFFIX) (int dst) |
185 | 185 | for (sh = 0; T1 > 0; T1--, T0++, sh += 8) { |
186 | 186 | tmp |= glue(ldub, MEMSUFFIX)((uint32_t)T0) << sh; |
187 | 187 | } |
188 | - ugpr(dst) = tmp; | |
188 | + env->gpr[dst] = tmp; | |
189 | 189 | } |
190 | 190 | } |
191 | 191 | |
... | ... | @@ -196,7 +196,7 @@ void glue(do_lsw_le_64, MEMSUFFIX) (int dst) |
196 | 196 | int sh; |
197 | 197 | |
198 | 198 | for (; T1 > 3; T1 -= 4, T0 += 4) { |
199 | - ugpr(dst++) = glue(ld32r, MEMSUFFIX)((uint64_t)T0); | |
199 | + env->gpr[dst++] = glue(ld32r, MEMSUFFIX)((uint64_t)T0); | |
200 | 200 | if (unlikely(dst == 32)) |
201 | 201 | dst = 0; |
202 | 202 | } |
... | ... | @@ -205,7 +205,7 @@ void glue(do_lsw_le_64, MEMSUFFIX) (int dst) |
205 | 205 | for (sh = 0; T1 > 0; T1--, T0++, sh += 8) { |
206 | 206 | tmp |= glue(ldub, MEMSUFFIX)((uint64_t)T0) << sh; |
207 | 207 | } |
208 | - ugpr(dst) = tmp; | |
208 | + env->gpr[dst] = tmp; | |
209 | 209 | } |
210 | 210 | } |
211 | 211 | #endif |
... | ... | @@ -215,13 +215,13 @@ void glue(do_stsw_le, MEMSUFFIX) (int src) |
215 | 215 | int sh; |
216 | 216 | |
217 | 217 | for (; T1 > 3; T1 -= 4, T0 += 4) { |
218 | - glue(st32r, MEMSUFFIX)((uint32_t)T0, ugpr(src++)); | |
218 | + glue(st32r, MEMSUFFIX)((uint32_t)T0, env->gpr[src++]); | |
219 | 219 | if (unlikely(src == 32)) |
220 | 220 | src = 0; |
221 | 221 | } |
222 | 222 | if (unlikely(T1 != 0)) { |
223 | 223 | for (sh = 0; T1 > 0; T1--, T0++, sh += 8) |
224 | - glue(stb, MEMSUFFIX)((uint32_t)T0, (ugpr(src) >> sh) & 0xFF); | |
224 | + glue(stb, MEMSUFFIX)((uint32_t)T0, (env->gpr[src] >> sh) & 0xFF); | |
225 | 225 | } |
226 | 226 | } |
227 | 227 | |
... | ... | @@ -231,13 +231,13 @@ void glue(do_stsw_le_64, MEMSUFFIX) (int src) |
231 | 231 | int sh; |
232 | 232 | |
233 | 233 | for (; T1 > 3; T1 -= 4, T0 += 4) { |
234 | - glue(st32r, MEMSUFFIX)((uint64_t)T0, ugpr(src++)); | |
234 | + glue(st32r, MEMSUFFIX)((uint64_t)T0, env->gpr[src++]); | |
235 | 235 | if (unlikely(src == 32)) |
236 | 236 | src = 0; |
237 | 237 | } |
238 | 238 | if (unlikely(T1 != 0)) { |
239 | 239 | for (sh = 0; T1 > 0; T1--, T0++, sh += 8) |
240 | - glue(stb, MEMSUFFIX)((uint64_t)T0, (ugpr(src) >> sh) & 0xFF); | |
240 | + glue(stb, MEMSUFFIX)((uint64_t)T0, (env->gpr[src] >> sh) & 0xFF); | |
241 | 241 | } |
242 | 242 | } |
243 | 243 | #endif |
... | ... | @@ -283,7 +283,7 @@ void glue(do_POWER_lscbx, MEMSUFFIX) (int dest, int ra, int rb) |
283 | 283 | c = glue(ldub, MEMSUFFIX)((uint32_t)T0++); |
284 | 284 | /* ra (if not 0) and rb are never modified */ |
285 | 285 | if (likely(reg != rb && (ra == 0 || reg != ra))) { |
286 | - ugpr(reg) = (ugpr(reg) & ~(0xFF << d)) | (c << d); | |
286 | + env->gpr[reg] = (env->gpr[reg] & ~(0xFF << d)) | (c << d); | |
287 | 287 | } |
288 | 288 | if (unlikely(c == T2)) |
289 | 289 | break; | ... | ... |