Commit 8aadfbf0d12f39ff06d757b6b4135a93c438c04a

Authored by bellard
1 parent 40293e58

compilation fixes - added bswap - comments


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3938 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 60 additions and 41 deletions
tests/test-i386.c
... ... @@ -1065,7 +1065,7 @@ void test_bcd(void)
1065 1065 op1 = i2l(0xfbca7654);\
1066 1066 asm(#op " %" size "0, %" size "1" \
1067 1067 : "=q" (op0), opconst (op1) \
1068   - : "0" (op0), "1" (op1));\
  1068 + : "0" (op0));\
1069 1069 printf("%-10s A=" FMTLX " B=" FMTLX "\n",\
1070 1070 #op, op0, op1);\
1071 1071 }
... ... @@ -1078,7 +1078,7 @@ void test_bcd(void)
1078 1078 op2 = i2l(eax);\
1079 1079 asm(#op " %" size "0, %" size "1" \
1080 1080 : "=q" (op0), opconst (op1) \
1081   - : "0" (op0), "1" (op1), "a" (op2));\
  1081 + : "0" (op0), "a" (op2));\
1082 1082 printf("%-10s EAX=" FMTLX " A=" FMTLX " C=" FMTLX "\n",\
1083 1083 #op, op2, op0, op1);\
1084 1084 }
... ... @@ -1086,25 +1086,25 @@ void test_bcd(void)
1086 1086 void test_xchg(void)
1087 1087 {
1088 1088 #if defined(__x86_64__)
1089   - TEST_XCHG(xchgq, "", "=q");
  1089 + TEST_XCHG(xchgq, "", "+q");
1090 1090 #endif
1091   - TEST_XCHG(xchgl, "k", "=q");
1092   - TEST_XCHG(xchgw, "w", "=q");
1093   - TEST_XCHG(xchgb, "b", "=q");
  1091 + TEST_XCHG(xchgl, "k", "+q");
  1092 + TEST_XCHG(xchgw, "w", "+q");
  1093 + TEST_XCHG(xchgb, "b", "+q");
1094 1094  
1095 1095 #if defined(__x86_64__)
1096 1096 TEST_XCHG(xchgq, "", "=m");
1097 1097 #endif
1098   - TEST_XCHG(xchgl, "k", "=m");
1099   - TEST_XCHG(xchgw, "w", "=m");
1100   - TEST_XCHG(xchgb, "b", "=m");
  1098 + TEST_XCHG(xchgl, "k", "+m");
  1099 + TEST_XCHG(xchgw, "w", "+m");
  1100 + TEST_XCHG(xchgb, "b", "+m");
1101 1101  
1102 1102 #if defined(__x86_64__)
1103   - TEST_XCHG(xaddq, "", "=q");
  1103 + TEST_XCHG(xaddq, "", "+q");
1104 1104 #endif
1105   - TEST_XCHG(xaddl, "k", "=q");
1106   - TEST_XCHG(xaddw, "w", "=q");
1107   - TEST_XCHG(xaddb, "b", "=q");
  1105 + TEST_XCHG(xaddl, "k", "+q");
  1106 + TEST_XCHG(xaddw, "w", "+q");
  1107 + TEST_XCHG(xaddb, "b", "+q");
1108 1108  
1109 1109 {
1110 1110 int res;
... ... @@ -1114,39 +1114,39 @@ void test_xchg(void)
1114 1114 }
1115 1115  
1116 1116 #if defined(__x86_64__)
1117   - TEST_XCHG(xaddq, "", "=m");
  1117 + TEST_XCHG(xaddq, "", "+m");
1118 1118 #endif
1119   - TEST_XCHG(xaddl, "k", "=m");
1120   - TEST_XCHG(xaddw, "w", "=m");
1121   - TEST_XCHG(xaddb, "b", "=m");
  1119 + TEST_XCHG(xaddl, "k", "+m");
  1120 + TEST_XCHG(xaddw, "w", "+m");
  1121 + TEST_XCHG(xaddb, "b", "+m");
1122 1122  
1123 1123 #if defined(__x86_64__)
1124   - TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfbca7654);
  1124 + TEST_CMPXCHG(cmpxchgq, "", "+q", 0xfbca7654);
1125 1125 #endif
1126   - TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfbca7654);
1127   - TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
1128   - TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
  1126 + TEST_CMPXCHG(cmpxchgl, "k", "+q", 0xfbca7654);
  1127 + TEST_CMPXCHG(cmpxchgw, "w", "+q", 0xfbca7654);
  1128 + TEST_CMPXCHG(cmpxchgb, "b", "+q", 0xfbca7654);
1129 1129  
1130 1130 #if defined(__x86_64__)
1131   - TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfffefdfc);
  1131 + TEST_CMPXCHG(cmpxchgq, "", "+q", 0xfffefdfc);
1132 1132 #endif
1133   - TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfffefdfc);
1134   - TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
1135   - TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
  1133 + TEST_CMPXCHG(cmpxchgl, "k", "+q", 0xfffefdfc);
  1134 + TEST_CMPXCHG(cmpxchgw, "w", "+q", 0xfffefdfc);
  1135 + TEST_CMPXCHG(cmpxchgb, "b", "+q", 0xfffefdfc);
1136 1136  
1137 1137 #if defined(__x86_64__)
1138   - TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfbca7654);
  1138 + TEST_CMPXCHG(cmpxchgq, "", "+m", 0xfbca7654);
1139 1139 #endif
1140   - TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfbca7654);
1141   - TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
1142   - TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
  1140 + TEST_CMPXCHG(cmpxchgl, "k", "+m", 0xfbca7654);
  1141 + TEST_CMPXCHG(cmpxchgw, "w", "+m", 0xfbca7654);
  1142 + TEST_CMPXCHG(cmpxchgb, "b", "+m", 0xfbca7654);
1143 1143  
1144 1144 #if defined(__x86_64__)
1145   - TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfffefdfc);
  1145 + TEST_CMPXCHG(cmpxchgq, "", "+m", 0xfffefdfc);
1146 1146 #endif
1147   - TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfffefdfc);
1148   - TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
1149   - TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
  1147 + TEST_CMPXCHG(cmpxchgl, "k", "+m", 0xfffefdfc);
  1148 + TEST_CMPXCHG(cmpxchgw, "w", "+m", 0xfffefdfc);
  1149 + TEST_CMPXCHG(cmpxchgb, "b", "+m", 0xfffefdfc);
1150 1150  
1151 1151 {
1152 1152 uint64_t op0, op1, op2;
... ... @@ -1369,9 +1369,13 @@ void test_misc(void)
1369 1369 printf("xlat: EAX=" FMTLX "\n", res);
1370 1370  
1371 1371 #if defined(__x86_64__)
  1372 +#if 0
1372 1373 {
  1374 + /* XXX: see if Intel Core2 and AMD64 behavior really
  1375 + differ. Here we implemented the Intel way which is not
  1376 + compatible yet with QEMU. */
1373 1377 static struct __attribute__((packed)) {
1374   - uint32_t offset;
  1378 + uint64_t offset;
1375 1379 uint16_t seg;
1376 1380 } desc;
1377 1381 long cs_sel;
... ... @@ -1384,27 +1388,27 @@ void test_misc(void)
1384 1388 : "r" (cs_sel) : "memory", "cc");
1385 1389 printf("func_lret=" FMTLX "\n", res);
1386 1390  
1387   - /* NOTE: we assume that &func_lret < 4GB */
1388 1391 desc.offset = (long)&func_lret;
1389 1392 desc.seg = cs_sel;
1390 1393  
1391 1394 asm volatile ("xor %%rax, %%rax\n"
1392   - "rex64 lcall %1\n"
  1395 + "rex64 lcall *(%%rcx)\n"
1393 1396 : "=a" (res)
1394   - : "m" (desc)
  1397 + : "c" (&desc)
1395 1398 : "memory", "cc");
1396 1399 printf("func_lret2=" FMTLX "\n", res);
1397 1400  
1398 1401 asm volatile ("push %2\n"
1399 1402 "mov $ 1f, %%rax\n"
1400 1403 "push %%rax\n"
1401   - "ljmp %1\n"
  1404 + "rex64 ljmp *(%%rcx)\n"
1402 1405 "1:\n"
1403 1406 : "=a" (res)
1404   - : "m" (desc), "b" (cs_sel)
  1407 + : "c" (&desc), "b" (cs_sel)
1405 1408 : "memory", "cc");
1406 1409 printf("func_lret3=" FMTLX "\n", res);
1407 1410 }
  1411 +#endif
1408 1412 #else
1409 1413 asm volatile ("push %%cs ; call %1"
1410 1414 : "=a" (res)
... ... @@ -2029,7 +2033,7 @@ static void test_enter(void)
2029 2033 #ifdef TEST_SSE
2030 2034  
2031 2035 typedef int __m64 __attribute__ ((__mode__ (__V2SI__)));
2032   -typedef int __m128 __attribute__ ((__mode__(__V4SF__)));
  2036 +typedef float __m128 __attribute__ ((__mode__(__V4SF__)));
2033 2037  
2034 2038 typedef union {
2035 2039 double d[2];
... ... @@ -2619,6 +2623,21 @@ void test_conv(void)
2619 2623 #if defined(__x86_64__)
2620 2624 TEST_CONV_RAX_RDX(cqo);
2621 2625 #endif
  2626 +
  2627 + {
  2628 + unsigned long a, r;
  2629 + a = i2l(0x12345678);
  2630 + asm volatile("bswapl %k0" : "=r" (r) : "0" (a));
  2631 + printf("%-10s: A=" FMTLX " R=" FMTLX "\n", "bswapl", a, r);
  2632 + }
  2633 +#if defined(__x86_64__)
  2634 + {
  2635 + unsigned long a, r;
  2636 + a = i2l(0x12345678);
  2637 + asm volatile("bswapq %0" : "=r" (r) : "0" (a));
  2638 + printf("%-10s: A=" FMTLX " R=" FMTLX "\n", "bswapq", a, r);
  2639 + }
  2640 +#endif
2622 2641 }
2623 2642  
2624 2643 extern void *__start_initcall;
... ... @@ -2653,8 +2672,8 @@ int main(int argc, char **argv)
2653 2672 #ifdef TEST_VM86
2654 2673 test_vm86();
2655 2674 #endif
2656   - test_exceptions();
2657 2675 #if !defined(__x86_64__)
  2676 + test_exceptions();
2658 2677 test_self_modifying_code();
2659 2678 test_single_step();
2660 2679 #endif
... ...